Lines Matching defs:mir

788 static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir)
796 DecodedInstruction *dInsn = &mir->dalvikInsn;
800 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
802 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, P_GPR_2, true);
833 static void genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir)
835 DecodedInstruction *dInsn = &mir->dalvikInsn;
839 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
841 get_virtual_reg(mir->dalvikInsn.vB, OpndSize_32, P_GPR_2, true);
864 static void genHoistedLowerBoundCheck(CompilationUnit *cUnit, MIR *mir)
866 DecodedInstruction *dInsn = &mir->dalvikInsn;
868 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true); //array
876 static void genValidationForPredictedInline(CompilationUnit *cUnit, MIR *mir)
878 CallsiteInfo *callsiteInfo = mir->meta.callsiteInfo;
880 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, PhysicalReg_EBX, true);
888 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, 5, false);
890 nullCheck(5, false, 1, mir->dalvikInsn.vC);
902 void handleExtendedMIR(CompilationUnit *cUnit, MIR *mir)
906 switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) {
911 genHoistedChecksForCountUpLoop(cUnit, mir);
915 genHoistedChecksForCountDownLoop(cUnit, mir);
919 genHoistedLowerBoundCheck(cUnit, mir);
927 genValidationForPredictedInline(cUnit, mir);
1129 MIR *mir;
1259 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
1261 Opcode dalvikOpCode = mir->dalvikInsn.opcode;
1263 handleExtendedMIR(cUnit, mir);
1269 mir->offset, dalvikOpCode, dalvikFormat);
1270 LowOpImm *boundaryLIR = dump_special(ATOM_PSEUDO_DALVIK_BYTECODE_BOUNDARY, mir->offset);
1287 codePtr = startCodePtr + mir->offset;
1289 notHandled = lowerByteCodeJit(cUnit->method, cUnit->method->insns+mir->offset, mir);
1302 mir->offset,