Lines Matching refs:SIMCCodeEmitter
1 //===-- SIMCCodeEmitter.cpp - SI Code Emitter -------------------------------===//
59 class SIMCCodeEmitter : public AMDGPUMCCodeEmitter {
60 SIMCCodeEmitter(const SIMCCodeEmitter &); // DO NOT IMPLEMENT
61 void operator=(const SIMCCodeEmitter &); // DO NOT IMPLEMENT
67 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
71 ~SIMCCodeEmitter() { }
128 return new SIMCCodeEmitter(MCII, STI, Ctx);
131 void SIMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
140 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
161 unsigned SIMCCodeEmitter::GPRAlign(const MCInst &MI, unsigned OpNo,
167 unsigned SIMCCodeEmitter::GPR2AlignEncode(const MCInst &MI,
173 unsigned SIMCCodeEmitter::GPR4AlignEncode(const MCInst &MI,
179 uint64_t SIMCCodeEmitter::i32LiteralEncode(const MCInst &MI,
197 uint32_t SIMCCodeEmitter::SMRDmemriEncode(const MCInst &MI, unsigned OpNo,
219 uint64_t SIMCCodeEmitter::VOPPostEncode(const MCInst &MI, uint64_t Value) const{
259 unsigned SIMCCodeEmitter::getEncodingType(const MCInst &MI) const {
263 unsigned SIMCCodeEmitter::getEncodingBytes(const MCInst &MI) const {
293 unsigned SIMCCodeEmitter::getRegBinaryCode(unsigned reg) const {
301 #define SIRegisterInfo SIMCCodeEmitter