Lines Matching defs:rscreen
41 struct r600_screen *rscreen = rctx->screen;
44 pipe_mutex_lock(rscreen->fences.mutex);
46 if (!rscreen->fences.bo) {
48 rscreen->fences.bo = (struct r600_resource*)
49 pipe_buffer_create(&rscreen->screen, PIPE_BIND_CUSTOM,
51 if (!rscreen->fences.bo) {
55 rscreen->fences.data = rctx->ws->buffer_map(rscreen->fences.bo->cs_buf,
60 if (!LIST_IS_EMPTY(&rscreen->fences.pool)) {
64 LIST_FOR_EACH_ENTRY(entry, &rscreen->fences.pool, head) {
65 if (rscreen->fences.data[entry->index] != 0) {
78 if ((rscreen->fences.next_index + 1) >= 1024) {
83 index = rscreen->fences.next_index++;
91 LIST_ADD(&block->head, &rscreen->fences.blocks);
93 block = LIST_ENTRY(struct r600_fence_block, rscreen->fences.blocks.next, head);
102 rscreen->fences.data[fence->index] = 0;
103 r600_context_emit_fence(rctx, rscreen->fences.bo, fence->index, 1);
113 pipe_mutex_unlock(rscreen->fences.mutex);
206 struct r600_screen* rscreen = (struct r600_screen *)screen;
222 rctx->screen = rscreen;
223 rctx->ws = rscreen->ws;
224 rctx->family = rscreen->family;
225 rctx->chip_class = rscreen->chip_class;
366 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
368 return r600_get_family_name(rscreen->family);
373 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
374 enum radeon_family family = rscreen->family;
441 return rscreen->has_streamout ? 4 : 0;
443 return rscreen->has_streamout ? 1 : 0;
457 return rscreen->info.drm_minor >= 9 ?
469 return rscreen->info.r600_clock_crystal_freq != 0;
471 return rscreen->info.drm_minor >= 20 &&
472 rscreen->info.r600_clock_crystal_freq != 0;
486 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
487 enum radeon_family family = rscreen->family;
678 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
680 if (rscreen == NULL)
683 if (rscreen->global_pool) {
684 compute_memory_pool_delete(rscreen->global_pool);
687 if (rscreen->fences.bo) {
690 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rscreen->fences.blocks, head) {
695 rscreen->ws->buffer_unmap(rscreen->fences.bo->cs_buf);
696 pipe_resource_reference((struct pipe_resource**)&rscreen->fences.bo, NULL);
698 pipe_mutex_destroy(rscreen->fences.mutex);
700 rscreen->ws->destroy(rscreen->ws);
701 FREE(rscreen);
712 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
713 pipe_mutex_lock(rscreen->fences.mutex);
715 LIST_ADDTAIL(&(*oldf)->head, &rscreen->fences.pool);
716 pipe_mutex_unlock(rscreen->fences.mutex);
725 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
728 return rscreen->fences.data[rfence->index] != 0;
735 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
747 while (rscreen->fences.data[rfence->index] == 0) {
750 rscreen->ws->buffer_wait(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE);
756 if (!rscreen->ws->buffer_is_busy(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE))
772 return rscreen->fences.data[rfence->index] != 0;
775 static int r600_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
779 rscreen->tiling_info.num_channels = 1;
782 rscreen->tiling_info.num_channels = 2;
785 rscreen->tiling_info.num_channels = 4;
788 rscreen->tiling_info.num_channels = 8;
796 rscreen->tiling_info.num_banks = 4;
799 rscreen->tiling_info.num_banks = 8;
807 rscreen->tiling_info.group_bytes = 256;
810 rscreen->tiling_info.group_bytes = 512;
818 static int evergreen_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
822 rscreen->tiling_info.num_channels = 1;
825 rscreen->tiling_info.num_channels = 2;
828 rscreen->tiling_info.num_channels = 4;
831 rscreen->tiling_info.num_channels = 8;
839 rscreen->tiling_info.num_banks = 4;
842 rscreen->tiling_info.num_banks = 8;
845 rscreen->tiling_info.num_banks = 16;
853 rscreen->tiling_info.group_bytes = 256;
856 rscreen->tiling_info.group_bytes = 512;
864 static int r600_init_tiling(struct r600_screen *rscreen)
866 uint32_t tiling_config = rscreen->info.r600_tiling_config;
869 if (rscreen->chip_class <= R700) {
870 rscreen->tiling_info.group_bytes = 256;
872 rscreen->tiling_info.group_bytes = 512;
878 if (rscreen->chip_class <= R700) {
879 return r600_interpret_tiling(rscreen, tiling_config);
881 return evergreen_interpret_tiling(rscreen, tiling_config);
898 struct r600_screen *rscreen = (struct r600_screen*)screen;
900 return 1000000 * rscreen->ws->query_timestamp(rscreen->ws) /
901 rscreen->info.r600_clock_crystal_freq;
906 struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
908 if (rscreen == NULL) {
912 rscreen->ws = ws;
913 ws->query_info(ws, &rscreen->info);
915 rscreen->family = radeon_family_from_device(rscreen->info.pci_id);
916 if (rscreen->family == CHIP_UNKNOWN) {
917 fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
918 FREE(rscreen);
923 if (rscreen->family >= CHIP_CAYMAN) {
924 rscreen->chip_class = CAYMAN;
925 } else if (rscreen->family >= CHIP_CEDAR) {
926 rscreen->chip_class = EVERGREEN;
927 } else if (rscreen->family >= CHIP_RV770) {
928 rscreen->chip_class = R700;
930 rscreen->chip_class = R600;
934 switch (rscreen->chip_class) {
936 if (rscreen->family < CHIP_RS780) {
937 rscreen->has_streamout = rscreen->info.drm_minor >= 14;
939 rscreen->has_streamout = rscreen->info.drm_minor >= 23;
943 rscreen->has_streamout = rscreen->info.drm_minor >= 17;
947 rscreen->has_streamout = rscreen->info.drm_minor >= 14;
951 if (r600_init_tiling(rscreen)) {
952 FREE(rscreen);
956 rscreen->screen.destroy = r600_destroy_screen;
957 rscreen->screen.get_name = r600_get_name;
958 rscreen->screen.get_vendor = r600_get_vendor;
959 rscreen->screen.get_param = r600_get_param;
960 rscreen->screen.get_shader_param = r600_get_shader_param;
961 rscreen->screen.get_paramf = r600_get_paramf;
962 rscreen->screen.get_video_param = r600_get_video_param;
963 rscreen->screen.get_compute_param = r600_get_compute_param;
964 rscreen->screen.get_timestamp = r600_get_timestamp;
966 if (rscreen->chip_class >= EVERGREEN) {
967 rscreen->screen.is_format_supported = evergreen_is_format_supported;
969 rscreen->screen.is_format_supported = r600_is_format_supported;
971 rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
972 rscreen->screen.context_create = r600_create_context;
973 rscreen->screen.fence_reference = r600_fence_reference;
974 rscreen->screen.fence_signalled = r600_fence_signalled;
975 rscreen->screen.fence_finish = r600_fence_finish;
976 r600_init_screen_resource_functions(&rscreen->screen);
980 rscreen->fences.bo = NULL;
981 rscreen->fences.data = NULL;
982 rscreen->fences.next_index = 0;
983 LIST_INITHEAD(&rscreen->fences.pool);
984 LIST_INITHEAD(&rscreen->fences.blocks);
985 pipe_mutex_init(rscreen->fences.mutex);
987 rscreen->global_pool = compute_memory_pool_new(rscreen);
989 return &rscreen->screen;