/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.cpp | 95 StringRef CPU, 98 InitSystemZMCSubtargetInfo(X, TT, CPU, FS); 94 createSystemZMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/external/llvm/lib/Target/ |
H A D | TargetMachine.cpp | 48 StringRef TT, StringRef CPU, StringRef FS, 50 : TheTarget(T), TargetTriple(TT), TargetCPU(CPU), TargetFS(FS), 47 TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options) argument
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H A D | TargetMachineC.cpp | 91 char* CPU, char* Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc, 128 return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, 90 LLVMCreateTargetMachine(LLVMTargetRef T, char* Triple, char* CPU, char* Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc, LLVMCodeModel CodeModel) argument
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/external/llvm/lib/Target/X86/ |
H A D | X86TargetMachine.cpp | 34 StringRef CPU, StringRef FS, 38 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), 58 StringRef CPU, StringRef FS, 62 : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true), 79 StringRef CPU, StringRef FS, 84 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 85 Subtarget(TT, CPU, FS, Options.StackAlignmentOverride, is64Bit), 33 X86_32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 57 X86_64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 78 X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64Bit) argument
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H A D | X86Subtarget.cpp | 372 std::string CPU = local 378 resetSubtargetFeatures(CPU, FS); 382 void X86Subtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { argument 383 std::string CPUName = CPU; 384 if (!FS.empty() || !CPU.empty()) { 430 // CPUName may have been set by the CPU detection code. Make sure the 501 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, argument 504 : X86GenSubtargetInfo(TT, CPU, FS) 511 resetSubtargetFeatures(CPU, FS);
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 49 static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, argument 52 InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
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/external/chromium_org/base/ |
H A D | cpu.h | 15 class BASE_EXPORT CPU { class in namespace:base 18 CPU(); 32 // Accessors for CPU information. 49 // has_avx_hardware returns true when AVX is present in the CPU. This might
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/external/clang/lib/Driver/ |
H A D | ToolChain.cpp | 172 // Otherwise, if we have -march= choose the base CPU for that arch. 204 // If all else failed, return the most base CPU with thumb interworking 210 /// CPU. 214 static const char *getLLVMArchSuffixForARM(StringRef CPU) { argument 215 return llvm::StringSwitch<const char *>(CPU)
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H A D | Tools.cpp | 443 /// CPU. 447 static const char *getLLVMArchSuffixForARM(StringRef CPU) { argument 448 return llvm::StringSwitch<const char *>(CPU) 491 // Otherwise, if we have -march= choose the base CPU for that arch. 501 std::string CPU = llvm::sys::getHostCPUName(); local 502 if (CPU != "generic") { 505 NativeMArch = std::string("arm") + getLLVMArchSuffixForARM(CPU); 534 // If all else failed, return the most base CPU with thumb interworking 610 ArgStringList &CmdArgs, StringRef CPU) { 618 if (CPU ! 609 addFPMathArgs(const Driver &D, const Arg *A, const ArgList &Args, ArgStringList &CmdArgs, StringRef CPU) argument 1064 std::string CPU = llvm::sys::getHostCPUName(); local [all...] |
/external/llvm/lib/MC/MCDisassembler/ |
H A D | Disassembler.cpp | 38 LLVMDisasmContextRef LLVMCreateDisasmCPU(const char *Triple, const char *CPU, argument 64 const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(Triple, CPU,
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/external/llvm/lib/MC/ |
H A D | SubtargetFeature.cpp | 1 //===- SubtargetFeature.cpp - CPU characteristics Implementation ----------===// 151 // Determine the length of the longest CPU and Feature entries. 155 // Print the CPU table. 258 /// getFeatureBits - Get feature bits a CPU. 260 uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU, argument 271 "CPU table is not sorted"); 275 "CPU features table is not sorted"); 281 if (CPU == "help") 284 // Find CPU entry if CPU nam [all...] |
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64AsmBackend.cpp | 581 llvm::createAArch64AsmBackend(const Target &T, StringRef TT, StringRef CPU) { argument
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H A D | AArch64MCTargetDesc.cpp | 40 StringRef CPU, 43 InitAArch64MCSubtargetInfo(X, TT, CPU, FS); 39 createAArch64MCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 40 std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { argument 58 bool NoCPU = CPU == "generic" || CPU.empty(); 72 // Use CPU to figure out the exact features. 80 // Use CPU to figure out the exact features. 88 // Use CPU to figure out the exact features. 91 // v7 CPUs have lots of different feature sets. If no CPU is specified, 93 // the "minimum" feature set and use CPU string to figure out the exact 99 // Use CPU to figure out the exact features. 140 MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU, argument [all...] |
H A D | ARMAsmBackend.cpp | 663 MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU) { argument
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCAsmBackend.cpp | 212 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) { argument
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86AsmBackend.cpp | 69 StringRef CPU; member in class:__anon22463::X86AsmBackend 72 : MCAsmBackend(), CPU(_CPU) {} 309 // This CPU doesnt support long nops. If needed add more. 311 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 312 CPU == "pentium" || CPU == "pentium-mmx" || CPU 340 ELFX86AsmBackend(const Target &T, uint8_t _OSABI, StringRef CPU) argument 353 ELFX86_32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU) argument 363 ELFX86_64AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU) argument 375 WindowsX86AsmBackend(const Target &T, bool is64Bit, StringRef CPU) argument 387 DarwinX86AsmBackend(const Target &T, StringRef CPU) argument 393 DarwinX86_32AsmBackend(const Target &T, StringRef CPU) argument 405 DarwinX86_64AsmBackend(const Target &T, StringRef CPU) argument 452 createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU) argument 465 createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU) argument [all...] |
H A D | X86MCTargetDesc.cpp | 220 MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(StringRef TT, StringRef CPU, argument 230 std::string CPUName = CPU;
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/external/clang/tools/driver/ |
H A D | cc1as_main.cpp | 72 /// If given, the name of the target CPU to determine which instructions 74 std::string CPU; member in struct:__anon17550::AssemblerInvocation 177 Opts.CPU = Args->getLastArgValue(OPT_target_cpu); 334 STI(TheTarget->createMCSubtargetInfo(Opts.Triple, Opts.CPU, FS)); 345 MAB = TheTarget->createMCAsmBackend(Opts.Triple, Opts.CPU); 359 MCAsmBackend *MAB = TheTarget->createMCAsmBackend(Opts.Triple, Opts.CPU);
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/external/llvm/include/llvm/Support/ |
H A D | TargetRegistry.h | 94 StringRef CPU, 98 StringRef CPU, 108 StringRef CPU); 345 /// \param CPU This specifies the name of the target CPU. 348 MCSubtargetInfo *createMCSubtargetInfo(StringRef Triple, StringRef CPU, argument 352 return MCSubtargetInfoCtorFn(Triple, CPU, Features); 362 TargetMachine *createTargetMachine(StringRef Triple, StringRef CPU, argument 369 return TargetMachineCtorFn(*this, Triple, CPU, Features, Options, 376 MCAsmBackend *createMCAsmBackend(StringRef Triple, StringRef CPU) cons 1097 Allocator(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument 1121 Allocator(const Target &T, StringRef Triple, StringRef CPU) argument [all...] |
/external/llvm/tools/lto/ |
H A D | LTOModule.cpp | 280 // Set a default CPU for Darwin triples. 281 std::string CPU; local 284 CPU = "core2"; 286 CPU = "yonah"; 290 TargetMachine *target = march->createTargetMachine(TripleStr, CPU, FeatureStr,
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/external/llvm/lib/Support/ |
H A D | CommandLine.cpp | 1697 std::string CPU = sys::getHostCPUName(); local 1698 if (CPU == "generic") CPU = "(unknown)"; 1704 << " Host CPU: " << CPU << '\n';
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