| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| H A D | mixcase.asm | 0 CPU SSSE3
1 CPU SSSE3 label
|
| /external/v8/src/ |
| H A D | cpu.h | 45 // CPU
53 class CPU : public AllStatic { class in namespace:v8::internal
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 49 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS): argument
50 HexagonGenSubtargetInfo(TT, CPU, FS),
51 CPUString(CPU.str()) {
72 // Initialize scheduling itinerary for the specified CPU.
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreSubtarget.cpp | 27 const std::string &CPU, const std::string &FS)
28 : XCoreGenSubtargetInfo(TT, CPU, FS)
26 XCoreSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
|
| H A D | XCoreTargetMachine.cpp | 24 StringRef CPU, StringRef FS,
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29 Subtarget(TT, CPU, FS),
23 XCoreTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/chromium/base/ |
| H A D | cpu.cc | 17 CPU::CPU() function in class:base::CPU
82 void CPU::Initialize() {
88 // valid Ids in CPUInfo[0] and the CPU identification string in
89 // the other three array elements. The CPU identification string is
102 // Interpret CPU feature information.
|
| /external/clang/include/clang/Basic/ |
| H A D | TargetOptions.h | 32 /// If given, the name of the target CPU to generate code for.
33 std::string CPU; member in class:clang::TargetOptions
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.cpp | 28 AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS) argument
29 : AArch64GenSubtargetInfo(TT, CPU, FS), HasNEON(false), HasCrypto(false),
32 ParseSubtargetFeatures(CPU, FS);
|
| H A D | AArch64TargetMachine.cpp | 30 StringRef CPU, StringRef FS,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS),
29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.cpp | 27 const std::string &CPU,
29 MSP430GenSubtargetInfo(TT, CPU, FS) {
26 MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
|
| H A D | MSP430TargetMachine.cpp | 29 StringRef CPU,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS),
27 MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 23 NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU, argument
25 : NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0),
35 // Provide the default CPU if none
38 ParseSubtargetFeatures((CPU.empty() ? defCPU : CPU), FS);
41 if (FS.empty() && CPU.empty())
43 else if (!CPU.empty())
44 TargetName = CPU;
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
25 InstrItins = getInstrItineraryForCPU(CPU);
30 StringRef GPU = CPU;
|
| /external/libvpx/libvpx/third_party/x86inc/ |
| H A D | x86inc.asm | 188 CPU amdnop label
|
| /external/llvm/lib/Target/CppBackend/ |
| H A D | CPPTargetMachine.h | 26 StringRef CPU, StringRef FS, const TargetOptions &Options,
29 : TargetMachine(T, TT, CPU, FS, Options) {}
25 CPPTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCTargetDesc.cpp | 46 static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU, argument
49 InitSparcMCSubtargetInfo(X, TT, CPU, FS);
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.cpp | 27 SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, argument
29 SparcGenSubtargetInfo(TT, CPU, FS),
36 std::string CPUName = CPU;
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.cpp | 21 const std::string &CPU,
23 : SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
25 std::string CPUName = CPU;
20 SystemZSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) argument
|
| H A D | SystemZTargetMachine.cpp | 22 StringRef CPU, StringRef FS,
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
28 Subtarget(TT, CPU, FS),
21 SystemZTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
25 InstrItins = getInstrItineraryForCPU(CPU);
30 StringRef GPU = CPU;
|
| /external/chromium_org/base/ |
| H A D | cpu.cc | 23 CPU::CPU() function in class:base::CPU
89 void CPU::Initialize() {
95 // valid Ids in CPUInfo[0] and the CPU identification string in
96 // the other three array elements. The CPU identification string is
107 // Interpret CPU feature information.
127 // a) they are supported by the CPU,
128 // b) XSAVE is supported by the CPU and
170 CPU::IntelMicroArchitecture CPU
[all...] |
| /external/chromium_org/third_party/WebKit/Source/wtf/ |
| H A D | CPU.h | 34 /* CPU() - the target CPU architecture */
35 #define CPU(WTF_FEATURE) (defined WTF_CPU_##WTF_FEATURE && WTF_CPU_##WTF_FEATURE) macro
37 /* ==== CPU() - the target CPU architecture ==== */
39 /* This defines CPU(BIG_ENDIAN) or nothing, as appropriate. */
40 /* This defines CPU(32BIT) or CPU(64BIT), as appropriate. */
42 /* CPU(X86) - i386 / x86 32-bit */
51 /* CPU(X86_6
[all...] |
| /external/chromium_org/v8/src/ |
| H A D | cpu.cc | 254 CPU::CPU() : stepping_(0), function in class:v8::internal::CPU
284 // valid Ids in CPUInfo[0] and the CPU identification string in
285 // the other three array elements. The CPU identification string is
296 // Interpret CPU feature information.
320 // Interpret extended CPU feature information.
334 // Extract implementor from the "CPU implementer" field.
335 char* implementer = cpu_info.ExtractField("CPU implementer");
345 // Extract part number from the "CPU part" field.
346 char* part = cpu_info.ExtractField("CPU par
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 50 StringRef CPU,
53 InitHexagonMCSubtargetInfo(X, TT, CPU, FS);
49 createHexagonMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) argument
|
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUSubtarget.cpp | 25 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
26 AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) {
27 InstrItins = getInstrItineraryForCPU(CPU);
30 StringRef GPU = CPU;
|