Searched defs:FV (Results 1 - 7 of 7) sorted by relevance
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 327 const ConstantFP *FV = cast<ConstantFPSDNode>(Node)->getConstantFPValue(); local 331 getTargetLowering()->getDataLayout()->getABITypeAlignment(FV->getType()); 332 SDValue PoolAddr = getConstantPoolItemAddress(DL, FV);
|
/external/llvm/lib/IR/ |
H A D | Metadata.cpp | 339 const Function *FV = getFunctionForValue(To); local 342 if (F && FV && F != FV)
|
/external/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 374 Value *FV; local 377 FV = SimplifyBinOp(Opcode, SI->getFalseValue(), RHS, Q, MaxRecurse); 380 FV = SimplifyBinOp(Opcode, LHS, SI->getFalseValue(), Q, MaxRecurse); 385 if (TV == FV) 390 return FV; 391 if (FV && isa<UndefValue>(FV)) 396 if (TV == SI->getTrueValue() && FV == SI->getFalseValue()) 402 if ((FV && !TV) || (TV && !FV)) { 446 Value *FV = SI->getFalseValue(); local [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 1116 Value *FV = SI->getFalseValue(); local 1121 if (match(FV, m_Zero()) && match(TV, m_Sub(m_Value(N), m_Specific(A)))) 1125 if (match(TV, m_Zero()) && match(FV, m_Sub(m_Value(N), m_Specific(A))))
|
H A D | InstructionCombining.cpp | 589 Value *FV = SI->getOperand(2); local 591 if (isa<Constant>(TV) || isa<Constant>(FV)) { 609 Value *SelectFalseVal = FoldOperationIntoSelectOperand(Op, FV, this);
|
/external/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 1125 Value *FV = SI.getFalseValue(); local 1135 IRB.CreateLoad(FV, LI->getName() + ".sroa.speculate.load.false");
|
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 4666 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3); local 4676 std::swap(TV, FV); 4680 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); 4684 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), Sel1, FV); 4687 std::swap(TV, FV); // fsel is natively setge, swap operands for setlt 4692 return DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); 4695 std::swap(TV, FV); // fsel is natively setge, swap operands for setlt 4701 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), TV, FV); 4708 std::swap(TV, FV); 4713 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); [all...] |
Completed in 240 milliseconds