Searched defs:Rs (Results 1 - 7 of 7) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/swrast/
H A Ds_blend.c483 const GLfloat Rs = rgba[i][RCOMP]; local
557 sR = Rs;
562 sR = 1.0F - Rs;
635 dR = Rs;
640 dR = 1.0F - Rs;
743 r = Rs * sR + Rd * dR;
749 r = Rs * sR - Rd * dR;
755 r = Rd * dR - Rs * sR;
761 r = MIN2( Rd, Rs );
766 r = MAX2( Rd, Rs );
[all...]
/external/mesa3d/src/mesa/swrast/
H A Ds_blend.c483 const GLfloat Rs = rgba[i][RCOMP]; local
557 sR = Rs;
562 sR = 1.0F - Rs;
635 dR = Rs;
640 dR = 1.0F - Rs;
743 r = Rs * sR + Rd * dR;
749 r = Rs * sR - Rd * dR;
755 r = Rd * dR - Rs * sR;
761 r = MIN2( Rd, Rs );
766 r = MAX2( Rd, Rs );
[all...]
/external/eigen/Eigen/src/UmfPackSupport/
H A DUmfPackSupport.h84 int P[], int Q[], double Dx[], int *do_recip, double Rs[], void *Numeric)
86 return umfpack_di_get_numeric(Lp,Lj,Lx,Up,Ui,Ux,P,Q,Dx,do_recip,Rs,Numeric);
90 int P[], int Q[], std::complex<double> Dx[], int *do_recip, double Rs[], void *Numeric)
96 Dx?&dx0_real:0,0,do_recip,Rs,Numeric);
83 umfpack_get_numeric(int Lp[], int Lj[], double Lx[], int Up[], int Ui[], double Ux[], int P[], int Q[], double Dx[], int *do_recip, double Rs[], void *Numeric) argument
89 umfpack_get_numeric(int Lp[], int Lj[], std::complex<double> Lx[], int Up[], int Ui[], std::complex<double> Ux[], int P[], int Q[], std::complex<double> Dx[], int *do_recip, double Rs[], void *Numeric) argument
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp1166 // shifted. The second is Rs, the amount to shift by, and the third specifies
1172 // {11-8} = Rs
1185 unsigned Rs = MO1.getReg(); local
1186 if (Rs) {
1203 // Encode the shift operation Rs.
1204 // Encode Rs bit[11:8].
1206 return Binary | (CTX.getRegisterInfo()->getEncodingValue(Rs) << ARMII::RegRsShift);
/external/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp1028 unsigned Rs = MO1.getReg(); local
1029 if (Rs) {
1062 // Encode the shift operation Rs or shift_imm (except rrx).
1063 if (Rs) {
1064 // Encode Rs bit[11:8].
1066 return Binary | (II->getRegisterInfo().getEncodingValue(Rs) << ARMII::RegRsShift);
1439 // Encode Rs
/external/qemu/
H A Dtrace.c895 int Rs = (insn >> 8) & 15; local
905 result += 2 + _interlock_use(Rm) + _interlock_use(Rs);
910 int Rs = (insn >> 8) & 15; local
920 result += 3 + _interlock_use(Rm) + _interlock_use(Rs);
1022 int Rs = (insn >> 8) & 15; local
1023 result += 1 + _interlock_use(Rs);
1225 /* the registers can also be Rs and Rn in some cases */
/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1155 unsigned Rs = fieldFromInstruction(Val, 8, 4); local
1160 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder)))

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