Searched defs:SETCC (Results 1 - 6 of 6) sorted by relevance
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.h | 52 SETCC, enumerator in enum:llvm::MSP430ISD::__anon22342
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 73 /// This serves most of the functions of the LLVM SETCC instruction, for two 81 SETCC, enumerator in enum:llvm::AArch64ISD::NodeType
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 32 SETCC, enumerator in enum:llvm::HexagonISD::__anon22325
|
/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 339 SETCC, enumerator in enum:llvm::ISD::NodeType
|
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 95 SETCC, enumerator in enum:llvm::X86ISD::NodeType 97 // Same as SETCC except it's materialized with a sbb and the value is all 101 /// X86 FP SETCC, implemented with CMP{cc}SS/CMP{cc}SD. 595 /// getSetCCResultType - Return the value type to use for ISD::SETCC.
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 556 if (N.getOpcode() == ISD::SETCC) { 1141 case ISD::SETCC: return visitSETCC(N); 2689 TLI.isOperationLegal(ISD::SETCC, 3201 TLI.isOperationLegal(ISD::SETCC, 3462 case ISD::SETCC: 4204 if (N0.getOpcode() == ISD::SETCC) { 4231 if (N0.getOpcode() == ISD::SETCC) { 4286 if (SCC.getOpcode() == ISD::SETCC) 4324 // FIXME: Only extend SETCC N, N and SETCC 9640 SDValue SETCC = DAG.getNode(ISD::SETCC, SDLoc(N0), local [all...] |
Completed in 1027 milliseconds