/external/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 228 void MacroAssembler::Swap(Register reg1, argument 233 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 234 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); 235 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 237 mov(scratch, reg1, LeaveCC, cond); 238 mov(reg1, reg2, LeaveCC, cond); 2948 void MacroAssembler::JumpIfNotBothSmi(Register reg1, 2952 tst(reg1, Operan [all...] |
H A D | regexp-macro-assembler-arm.cc | 435 void RegExpMacroAssemblerARM::CheckNotRegistersEqual(int reg1, argument 438 __ ldr(r0, register_location(reg1));
|
/external/chromium_org/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 208 void MacroAssembler::Swap(Register reg1, argument 213 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 214 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); 215 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 217 mov(scratch, reg1, LeaveCC, cond); 218 mov(reg1, reg2, LeaveCC, cond); 2995 void MacroAssembler::JumpIfNotBothSmi(Register reg1, 2999 tst(reg1, Operan [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
H A D | register_allocate.c | 189 struct ra_reg *reg1 = ®s->regs[r1]; local 191 if (reg1->conflict_list_size == reg1->num_conflicts) { 192 reg1->conflict_list_size *= 2; 193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list, 194 unsigned int, reg1->conflict_list_size); 196 reg1->conflict_list[reg1->num_conflicts++] = r2; 197 reg1 [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | register_allocate.c | 189 struct ra_reg *reg1 = ®s->regs[r1]; local 191 if (reg1->conflict_list_size == reg1->num_conflicts) { 192 reg1->conflict_list_size *= 2; 193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list, 194 unsigned int, reg1->conflict_list_size); 196 reg1->conflict_list[reg1->num_conflicts++] = r2; 197 reg1 [all...] |
/external/pixman/pixman/ |
H A D | pixman-arm-neon-asm.h | 76 .macro pixldst1 op, elem_size, reg1, mem_operand, abits variable 78 op&.&elem_size {d®1}, [&mem_operand&, :&abits&]! 80 op&.&elem_size {d®1}, [&mem_operand&]! 84 .macro pixldst2 op, elem_size, reg1, reg2, mem_operand, abits variable 86 op&.&elem_size {d®1, d®2}, [&mem_operand&, :&abits&]! variable 88 op&.&elem_size {d®1, d®2}, [&mem_operand&]! variable 92 .macro pixldst4 op, elem_size, reg1, reg2, reg3, reg4, mem_operand, abits variable 94 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&, :&abits&]! variable 96 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&]! variable 100 .macro pixldst0 op, elem_size, reg1, id variable 104 .macro pixldst3 op, elem_size, reg1, reg2, reg3, mem_operand variable 105 op&.&elem_size {d®1, d®2, d®3}, [&mem_operand&]! variable 108 .macro pixldst30 op, elem_size, reg1, reg2, reg3, idx, mem_operand variable 109 op&.&elem_size {d®1[idx], d®2[idx], d®3[idx]}, [&mem_operand&]! variable 212 .macro pixld1_s elem_size, reg1, mem_operand variable 256 .macro pixld2_s elem_size, reg1, reg2, mem_operand variable 275 pixld1_s elem_size, reg1, mem_operand variable 280 .macro pixld0_s elem_size, reg1, idx, mem_operand variable [all...] |
H A D | pixman-arm-simd-asm.h | 99 .macro pixldst op, cond=al, numbytes, reg0, reg1, reg2, reg3, base, unaligned=0 variable 103 op&r&cond WK®1, [base], #4 variable 107 op&m&cond&ia base!, {WK®0,WK®1,WK®2,WK®3} variable 112 op&r&cond WK®1, [base], #4 variable 114 op&m&cond&ia base!, {WK®0,WK®1} 127 .macro pixst_baseupdated cond, numbytes, reg0, reg1, reg2, reg3, base variable 129 stm&cond&db base, {WK®0,WK®1,WK®2,WK®3} variable 131 stm&cond&db base, {WK®0,WK®1}
|
H A D | pixman-region.c | 295 PREFIX (_equal) (region_type_t *reg1, region_type_t *reg2) argument 301 if (reg1->extents.x1 != reg2->extents.x1) 304 if (reg1->extents.x2 != reg2->extents.x2) 307 if (reg1->extents.y1 != reg2->extents.y1) 310 if (reg1->extents.y2 != reg2->extents.y2) 313 if (PIXREGION_NUMRECTS (reg1) != PIXREGION_NUMRECTS (reg2)) 316 rects1 = PIXREGION_RECTS (reg1); 319 for (i = 0; i != PIXREGION_NUMRECTS (reg1); i++) 749 region_type_t * reg1, /* First region in operation */ 784 if (PIXREGION_NAR (reg1) || PIXREGION_NA 748 pixman_op(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2, overlap_proc_ptr overlap_func, int append_non1, int append_non2 ) argument 1157 _intersect(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2) argument 1371 _union(region_type_t *new_reg, region_type_t *reg1, region_type_t *reg2) argument 2022 _inverse(region_type_t *new_reg, region_type_t *reg1, box_type_t * inv_rect) argument [all...] |
/external/v8/src/mips/ |
H A D | regexp-macro-assembler-mips.cc | 447 void RegExpMacroAssemblerMIPS::CheckNotRegistersEqual(int reg1, argument
|
H A D | macro-assembler-mips.cc | 463 Register reg1, 483 // reg1 - Used to hold the capacity mask of the dictionary. 489 GetNumberHash(reg0, reg1); 492 lw(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset)); 493 sra(reg1, reg1, kSmiTagSize); 494 Subu(reg1, reg1, Operand(1)); 505 and_(reg2, reg2, reg1); 529 lw(reg1, FieldMemOperan 458 LoadFromNumberDictionary(Label* miss, Register elements, Register key, Register result, Register reg0, Register reg1, Register reg2) argument 4754 JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi) argument 4764 JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi) argument [all...] |
/external/v8/src/ |
H A D | regexp-macro-assembler-tracer.cc | 299 void RegExpMacroAssemblerTracer::CheckNotRegistersEqual(int reg1, argument 302 PrintF(" CheckNotRegistersEqual(reg1=%d, reg2=%d, label[%08x]);\n", 303 reg1, 306 assembler_->CheckNotRegistersEqual(reg1, reg2, on_not_equal);
|
H A D | regexp-macro-assembler-irregexp.cc | 374 void RegExpMacroAssemblerIrregexp::CheckNotRegistersEqual(int reg1, argument 377 ASSERT(reg1 >= 0); 378 ASSERT(reg1 <= kMaxRegister); 379 Emit(BC_CHECK_NOT_REGS_EQUAL, reg1);
|
/external/aac/libFDK/src/ |
H A D | fixpoint_math.cpp | 430 FIXP_DBL reg1, reg2, regtmp ; local 445 reg1 = invSqrtTab[ (INT)(val>>(DFRACT_BITS-1-(SQRT_BITS+1))) & SQRT_BITS_MASK ]; 448 regtmp= fPow2Div2(reg1); /* a = Q^2 */ 450 reg1 += (fMultDiv2(regtmp, reg1)<<4); /* Q = Q + Q*b */ 455 reg1 = fMultDiv2(reg1, reg2) << 2; 460 return(reg1);
|
/external/v8/src/ia32/ |
H A D | regexp-macro-assembler-ia32.cc | 485 void RegExpMacroAssemblerIA32::CheckNotRegistersEqual(int reg1, argument 488 __ mov(eax, register_location(reg1));
|
/external/chromium_org/third_party/sqlite/src/src/ |
H A D | build.c | 868 int reg1, reg2, reg3; local 880 reg1 = pParse->regRowid = ++pParse->nMem; 912 sqlite3VdbeAddOp2(v, OP_NewRowid, 0, reg1); 914 sqlite3VdbeAddOp3(v, OP_Insert, 0, reg3, reg1);
|
/external/qemu/tcg/ |
H A D | tcg.c | 1483 /* Allocate a register belonging to reg1 & ~reg2 */ 1484 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) argument 1489 tcg_regset_andnot(reg_ct, reg1, reg2);
|
/external/valgrind/main/VEX/priv/ |
H A D | host_s390_isel.c | 2089 HReg reg1, reg2; local 2125 reg1 = newVRegI(env); 2126 addInstr(env, s390_insn_unop(4, op, reg1, op1)); 2133 addInstr(env, s390_insn_compare(4, reg1, op2, False));
|
/external/chromium_org/v8/src/ia32/ |
H A D | lithium-codegen-ia32.cc | 549 void LCodeGen::X87LoadForUsage(X87Register reg1, X87Register reg2) { argument 550 ASSERT(x87_stack_.Contains(reg1)); 552 x87_stack_.Fxch(reg1, 1);
|
/external/chromium_org/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 484 Register reg1, 504 // reg1 - Used to hold the capacity mask of the dictionary. 510 GetNumberHash(reg0, reg1); 513 lw(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset)); 514 sra(reg1, reg1, kSmiTagSize); 515 Subu(reg1, reg1, Operand(1)); 525 and_(reg2, reg2, reg1); 549 lw(reg1, FieldMemOperan 479 LoadFromNumberDictionary(Label* miss, Register elements, Register key, Register result, Register reg0, Register reg1, Register reg2) argument 2634 Swap(Register reg1, Register reg2, Register scratch) argument 4821 JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi) argument 4831 JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi) argument 5659 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument [all...] |
/external/chromium_org/v8/src/x64/ |
H A D | lithium-codegen-x64.cc | 1123 Register reg1 = ToRegister(instr->temp()); local 1141 __ movsxlq(reg1, dividend); 1144 __ neg(reg1); 1149 __ imul(reg2, reg1);
|
/external/valgrind/main/perf/ |
H A D | tinycc.c | 16262 int mod, reg1, reg2, sib_reg1; 16284 reg1 = op->reg; 16286 reg1 = 4; 16287 g(mod + (reg << 3) + reg1); 16288 if (reg1 == 4) { 16260 int mod, reg1, reg2, sib_reg1; local
|
/external/chromium_org/third_party/sqlite/amalgamation/ |
H A D | sqlite3.c | 77884 int reg1, reg2, reg3; local [all...] |
/external/sqlite/dist/orig/ |
H A D | sqlite3.c | 82059 int reg1, reg2, reg3; local [all...] |
/external/sqlite/dist/ |
H A D | sqlite3.c | 82095 int reg1, reg2, reg3; local [all...] |