Searched refs:isReg (Results 101 - 125 of 163) sorted by relevance

1234567

/external/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp305 bool isReg() const { return Kind == k_Register; } function in class:__anon22347::MipsOperand
532 assert(RegOp.isReg() && "expected register operand kind");
576 assert(SrcRegOp.isReg() && "expected register operand kind");
578 assert(DstRegOp.isReg() && "expected register operand kind");
618 assert(RegOp.isReg() && "expected register operand kind");
655 assert(Inst.getOperand(0).isReg() && "expected register operand kind");
658 assert(Inst.getOperand(1).isReg() && "expected register operand kind");
/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp331 assert(MO.isReg() && "Expected an FP register!");
445 if (MO.isReg() && MO.isDead())
1481 if (!MO.isReg())
1536 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
1599 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
1653 assert(Op.isUse() && Op.isReg() &&
1685 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)
/external/llvm/lib/CodeGen/
H A DLiveIntervalAnalysis.cpp742 if (!MO->isReg())
828 if (MO->isReg() && MO->isUse())
1015 if (MO->isReg() &&
1074 if (MOI->isReg() &&
1115 if (!MO.isReg() || MO.getReg() != Reg)
H A DEarlyIfConversion.cpp233 if (!MO->isReg())
288 if (!MO->isReg())
H A DInlineSpiller.cpp846 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg)
900 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) {
1060 if (!MO->isReg())
1093 if (!MO.isReg() || !MO.isImplicit())
H A DMachineCopyPropagation.cpp239 if (!MO.isReg())
H A DVirtRegMap.cpp284 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
H A DRegisterCoalescer.cpp813 if (MO.isReg()) {
866 if (MO.isReg()) {
1425 if (!MO->isReg() || MO->getReg() != LI.reg || !MO->isDef())
1774 if (!MO->isReg() || MO->isDef() || MO->getReg() != Reg)
1892 if (MO->isReg() && MO->isDef() && MO->getReg() == LI.reg) {
H A DMachineTraceMetrics.cpp644 if (!MO->isReg())
707 if (!MO->isReg())
884 if (!MO->isReg())
/external/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp265 if (!MO.isReg()) {
320 if (!MO.isReg()) {
475 if (MO.isReg())
1090 if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)
1187 if (MO.isReg()) {
1404 if (!MO.isReg() || MO.isImplicit())
1468 if (MO2.isReg()) {
1824 if (Base.isReg()) {
1875 if (!MO.isReg() || MO.isImplicit())
H A DARMLoadStoreOptimizer.cpp404 if (!MO->isReg() || !MO->isDef() || !MO->isImplicit() || MO->isDead())
518 if (!MO.isReg())
1003 if (MI->getNumOperands() > 0 && MI->getOperand(0).isReg() &&
1008 if (MI->getNumOperands() > 1 && MI->getOperand(1).isReg() &&
1017 return MI->getOperand(1).isReg();
1020 return MI->getOperand(1).isReg();
1027 return MI->getOperand(1).isReg();
1540 if (!MO.isReg())
/external/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfCompileUnit.cpp400 if (Location.isReg() && !Indirect)
404 if (Indirect && !Location.isReg()) {
424 if (Location.isReg()) {
442 if (!Location.isReg())
555 if (Location.isReg())
1598 if (DVInsn->getOperand(0).isReg()) {
H A DAsmPrinterInlineAsm.cpp418 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
/external/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp344 if (MO.isReg() && MO.getReg() != 0 && !MO.isDef() &&
361 if (MO.isReg() && MO.isDef()) {
H A DMipsDelaySlotFiller.cpp276 if (!MO.isReg() || !MO.isDef() || !(R = MO.getReg()))
358 if (MO.isReg() && MO.getReg())
/external/llvm/lib/Target/R600/
H A DR600ControlFlowFinalizer.cpp118 if (!MO.isReg())
236 if (MO.isReg() && MO.isInternalRead())
H A DR600OptimizeVectorRegisters.cpp274 if (!MOp->isReg())
/external/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h77 assert(MO && MO->isReg() && "This is not a register operand!");
/external/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp160 assert(MBBI->getOperand(0).isReg() && "Offset should be in register!");
H A DHexagonInstrInfo.cpp832 else if ( MI->getOperand(MI->getNumOperands()-1).isReg()
868 if (MO.isReg() && !MO.isUse() && !MO.isImplicit()) {
871 if (MO.isReg()) {
1035 if (MO.isReg() && MO.isDef()) {
/external/llvm/lib/Target/PowerPC/InstPrinter/
H A DPPCInstPrinter.cpp301 if (Op.isReg()) {
/external/llvm/lib/Target/PowerPC/
H A DPPCAsmPrinter.cpp252 if (!MI->getOperand(OpNo).isReg() ||
254 !MI->getOperand(OpNo+1).isReg())
295 assert(MI->getOperand(OpNo).isReg());
H A DPPCFrameLowering.cpp122 if (!MO.isReg() || !PPC::VRRCRegClass.contains(MO.getReg()))
312 if (!MO.isReg())
912 assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
925 assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp374 if (Op.isReg()) {
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp356 if (MO.isReg()) {

Completed in 993 milliseconds

1234567