/art/compiler/dex/ |
H A D | local_value_numbering.cc | 22 uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { argument 24 uint16_t opcode = mir->dalvikInsn.opcode; 83 uint16_t res = GetOperandValue(mir->ssa_rep->defs[0]); 84 SetOperandValue(mir->ssa_rep->defs[0], res); 89 uint16_t res = GetOperandValueWide(mir->ssa_rep->defs[0]); 90 SetOperandValueWide(mir->ssa_rep->defs[0], res); 109 uint16_t res = GetOperandValue(mir->ssa_rep->uses[0]); 110 SetOperandValue(mir->ssa_rep->defs[0], res); 118 uint16_t res = GetOperandValueWide(mir->ssa_rep->uses[0]); 119 SetOperandValueWide(mir [all...] |
H A D | mir_optimization.cc | 40 MIR* mir; local 42 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { 43 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode]; 45 DecodedInstruction *d_insn = &mir->dalvikInsn; 57 SetConstant(mir->ssa_rep->defs[0], vB); 60 SetConstant(mir->ssa_rep->defs[0], vB << 16); 64 SetConstantWide(mir 106 AdvanceMIR(BasicBlock** p_bb, MIR* mir) argument 130 FindMoveResult(BasicBlock* bb, MIR* mir) argument 184 SelectKind(MIR* mir) argument 566 MIR* mir = bb->last_mir_insn; local [all...] |
H A D | mir_dataflow.cc | 869 MIR* mir; local 881 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { 882 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode]; 883 DecodedInstruction *d_insn = &mir->dalvikInsn; 951 void MIRGraph::DataFlowSSAFormat35C(MIR* mir) { argument 952 DecodedInstruction *d_insn = &mir->dalvikInsn; 956 mir 969 DataFlowSSAFormat3RC(MIR* mir) argument 988 MIR* mir; local 1189 InvokeUsesMethodStar(MIR* mir) argument [all...] |
H A D | mir_graph.h | 499 RegLocation GetRawSrc(MIR* mir, int num) { argument 500 DCHECK(num < mir->ssa_rep->num_uses); 501 RegLocation res = reg_location_[mir->ssa_rep->uses[num]]; 505 RegLocation GetRawDest(MIR* mir) { argument 506 DCHECK_GT(mir->ssa_rep->num_defs, 0); 507 RegLocation res = reg_location_[mir->ssa_rep->defs[0]]; 511 RegLocation GetDest(MIR* mir) { argument 512 RegLocation res = GetRawDest(mir); 517 RegLocation GetSrc(MIR* mir, int num) { argument 518 RegLocation res = GetRawSrc(mir, nu 523 GetDestWide(MIR* mir) argument 529 GetSrcWide(MIR* mir, int low) argument [all...] |
H A D | mir_graph.cc | 512 // TODO: will need to snapshot stack image and use that as the mir context identification. 739 const MIR *mir; local 742 for (mir = bb->first_mir_insn; mir; mir = mir->next) { 743 int opcode = mir->dalvikInsn.opcode; 744 fprintf(file, " {%04x %s %s %s\\l}%s\\\n", mir->offset, 745 mir->ssa_rep ? GetDalvikDisassembly(mir) 838 AppendMIR(BasicBlock* bb, MIR* mir) argument 852 PrependMIR(BasicBlock* bb, MIR* mir) argument 880 GetDalvikDisassembly(const MIR* mir) argument 1115 NewMemCallInfo(BasicBlock* bb, MIR* mir, InvokeType type, bool is_range) argument [all...] |
H A D | vreg_analysis.cc | 76 MIR *mir; local 83 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { 84 SSARepresentation *ssa_rep = mir->ssa_rep; 86 int attrs = oat_data_flow_attributes_[mir->dalvikInsn.opcode]; 160 if ((mir->dalvikInsn.opcode == Instruction::RETURN) || 161 (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) || 162 (mir [all...] |
H A D | ssa_transformation.cc | 582 MIR *mir; local 587 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { 588 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi)) 590 int ssa_reg = mir->ssa_rep->defs[0]; 611 mir->ssa_rep->num_uses = num_uses; 612 mir->ssa_rep->uses = 614 mir [all...] |
H A D | mir_analysis.cc | 893 for (MIR* mir = tbb->first_mir_insn; mir != NULL; mir = mir->next) { 894 if (static_cast<uint32_t>(mir->dalvikInsn.opcode) >= kMirOpFirst) { 898 uint32_t flags = analysis_attributes_[mir->dalvikInsn.opcode];
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H A D | local_value_numbering.h | 129 uint16_t GetValueNumber(MIR* mir);
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/art/compiler/dex/quick/arm/ |
H A D | call_arm.cc | 82 void ArmMir2Lir::LockLiveArgs(MIR* mir) { argument 85 for (int i = 0; i < mir->ssa_rep->num_uses; i++) { 86 int v_reg = mir_graph_->SRegToVReg(mir->ssa_rep->uses[i]); 96 MIR* ArmMir2Lir::GetNextMir(BasicBlock** p_bb, MIR* mir) { argument 98 MIR* orig_mir = mir; 100 if (mir != NULL) { 101 mir = mir->next; 103 if (mir != NULL) { 104 return mir; 121 GenPrintLabel(MIR* mir) argument 128 SpecialIGet(BasicBlock** bb, MIR* mir, OpSize size, bool long_or_double, bool is_object) argument 153 SpecialIPut(BasicBlock** bb, MIR* mir, OpSize size, bool long_or_double, bool is_object) argument 187 SpecialIdentity(MIR* mir) argument 218 GenSpecialCase(BasicBlock* bb, MIR* mir, SpecialCaseHandler special_case) argument 311 GenSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) argument 359 GenPackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) argument [all...] |
H A D | codegen_arm.h | 122 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double); 123 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir); 124 void GenSelect(BasicBlock* bb, MIR* mir); 133 void GenPackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 134 void GenSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 135 void GenSpecialCase(BasicBlock* bb, MIR* mir, SpecialCaseHandler special_case); 167 void GenPrintLabel(MIR* mir); 184 void LockLiveArgs(MIR* mir); 185 MIR* GetNextMir(BasicBlock** p_bb, MIR* mir); 186 MIR* SpecialIGet(BasicBlock** bb, MIR* mir, OpSiz [all...] |
H A D | int_arm.cc | 179 void ArmMir2Lir::GenSelect(BasicBlock* bb, MIR* mir) { argument 181 RegLocation rl_src = mir_graph_->GetSrc(mir, 0); 183 int dest_sreg = mir->ssa_rep->defs[0]; 187 LOG(INFO) << "at dex offset 0x" << std::hex << mir->offset; 189 LOG(INFO) << "num uses = " << mir->ssa_rep->num_uses; 190 if (mir->ssa_rep->num_uses == 1) { 191 LOG(INFO) << "CONST case, vals = " << mir->dalvikInsn.vB << ", " << mir->dalvikInsn.vC; 193 LOG(INFO) << "MOVE case, operands = " << mir->ssa_rep->uses[1] << ", " 194 << mir 247 GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) argument [all...] |
H A D | fp_arm.cc | 177 void ArmMir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, argument 183 rl_src1 = mir_graph_->GetSrcWide(mir, 0); 184 rl_src2 = mir_graph_->GetSrcWide(mir, 2); 190 rl_src1 = mir_graph_->GetSrc(mir, 0); 191 rl_src2 = mir_graph_->GetSrc(mir, 1); 197 ConditionCode ccode = static_cast<ConditionCode>(mir->dalvikInsn.arg[0]);
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/art/test/040-miranda/src/ |
H A D | Main.java | 24 MirandaClass mir = new MirandaClass(); 26 System.out.println(" inInterface: " + mir.inInterface()); 27 System.out.println(" inInterface2: " + mir.inInterface2()); 28 System.out.println(" inAbstract: " + mir.inAbstract()); 31 MirandaAbstract mira = mir;
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/art/compiler/dex/quick/ |
H A D | mir_to_lir.cc | 29 void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) { argument 33 Instruction::Code opcode = mir->dalvikInsn.opcode; 34 int opt_flags = mir->optimization_flags; 35 uint32_t vB = mir->dalvikInsn.vB; 36 uint32_t vC = mir->dalvikInsn.vC; 45 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); 48 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); 54 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sreg); 57 rl_src[next_loc++] = mir_graph_->GetSrc(mir, next_sreg); 63 rl_src[next_loc++] = mir_graph_->GetSrcWide(mir, next_sre 657 HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) argument 692 MIR* mir; local 802 MIR* mir = bb->first_mir_insn; local [all...] |
H A D | mir_to_lir.h | 310 int oatSSASrc(MIR* mir, int num); 519 void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list); 520 void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir); 626 virtual void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, 628 virtual void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) = 0; 629 virtual void GenSelect(BasicBlock* bb, MIR* mir) = 0; 639 virtual void GenPackedSwitch(MIR* mir, uint32_t table_offset, 641 virtual void GenSparseSwitch(MIR* mir, uint32_t table_offset, 643 virtual void GenSpecialCase(BasicBlock* bb, MIR* mir,
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/art/compiler/dex/portable/ |
H A D | mir_to_gbc.cc | 312 void MirConverter::ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, argument 314 if (bb->taken->start_offset <= mir->offset) { 328 MIR* mir, ConditionCode cc, RegLocation rl_src1) { 329 if (bb->taken->start_offset <= mir->offset) { 450 void MirConverter::ConvertInvoke(BasicBlock* bb, MIR* mir, argument 452 CallInfo* info = mir_graph_->NewMemCallInfo(bb, mir, invoke_type, is_range); 686 bool MirConverter::ConvertMIRNode(MIR* mir, BasicBlock* bb, argument 691 Instruction::Code opcode = mir->dalvikInsn.opcode; 693 uint32_t vB = mir->dalvikInsn.vB; 694 uint32_t vC = mir 327 ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc, RegLocation rl_src1) argument 1581 ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb) argument [all...] |
H A D | mir_to_gbc.h | 110 void ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc, 112 void ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc, 128 void ConvertInvoke(BasicBlock* bb, MIR* mir, InvokeType invoke_type, 161 bool ConvertMIRNode(MIR* mir, BasicBlock* bb, ::llvm::BasicBlock* llvm_bb); 165 void ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb);
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/art/compiler/dex/quick/mips/ |
H A D | codegen_mips.h | 123 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double); 124 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir); 125 void GenSelect(BasicBlock* bb, MIR* mir); 134 void GenPackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 135 void GenSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 136 void GenSpecialCase(BasicBlock* bb, MIR* mir, SpecialCaseHandler special_case);
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H A D | call_mips.cc | 26 void MipsMir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, argument 62 void MipsMir2Lir::GenSparseSwitch(MIR* mir, uint32_t table_offset, argument 141 void MipsMir2Lir::GenPackedSwitch(MIR* mir, uint32_t table_offset, argument
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H A D | fp_mips.cc | 215 void MipsMir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, argument
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/art/compiler/dex/quick/x86/ |
H A D | codegen_x86.h | 123 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double); 124 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir); 125 void GenSelect(BasicBlock* bb, MIR* mir); 134 void GenPackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 135 void GenSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src); 136 void GenSpecialCase(BasicBlock* bb, MIR* mir, SpecialCaseHandler special_case);
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H A D | fp_x86.cc | 285 void X86Mir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, argument 293 rl_src1 = mir_graph_->GetSrcWide(mir, 0); 294 rl_src2 = mir_graph_->GetSrcWide(mir, 2); 300 rl_src1 = mir_graph_->GetSrc(mir, 0); 301 rl_src2 = mir_graph_->GetSrc(mir, 1); 306 ConditionCode ccode = static_cast<ConditionCode>(mir->dalvikInsn.arg[0]);
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H A D | call_x86.cc | 25 void X86Mir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, argument 34 void X86Mir2Lir::GenSparseSwitch(MIR* mir, uint32_t table_offset, argument 69 void X86Mir2Lir::GenPackedSwitch(MIR* mir, uint32_t table_offset, argument
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H A D | int_x86.cc | 164 void X86Mir2Lir::GenSelect(BasicBlock* bb, MIR* mir) { argument 168 void X86Mir2Lir::GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) { argument 170 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); 171 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); 176 ConditionCode ccode = static_cast<ConditionCode>(mir->dalvikInsn.arg[0]);
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