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Searched refs:disp (Results 1 - 10 of 10) sorted by relevance

/dalvik/vm/compiler/codegen/x86/libenc/
H A D	enc_wrapper.h	181 int disp, int base_reg, bool isBasePhysical, char* stream); 188 int disp, int base_reg, bool isBasePhysical, 198 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, 201 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, 205 int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, 209 int disp, int base_reg, bool isBasePhysical, LowOpndRegType type, char* stream); 215 int disp, int base_reg, bool isBasePhysical, char* stream); 217 int disp, int base_reg, bool isBasePhysical, char* stream); 219 int disp, int base_reg, bool isBasePhysical, 224 int disp, in [all...]
H A D	enc_wrapper.cpp	52 inline void add_m(EncoderBase::Operands & args, int baseReg, int disp, OpndSize sz, OpndExt ext = OpndExt_None) { argument 56 disp, ext)); 65 inline void add_m_disp_scale(EncoderBase::Operands & args, int baseReg, int disp, int indexReg, int scale, argument 70 disp, ext)); 96 "%d(%s,%s,%d)", opnd.disp(), 101 opnd.disp(), getRegNameString(opnd.base())); 196 int disp, int base_reg, bool isBasePhysical, char * stream) { 198 add_m(args, base_reg, disp, size); 243 int disp, int base_reg, bool isBasePhysical, 247 add_m(args, base_reg, disp, siz 195 encoder_mem(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, char * stream) argument 242 encoder_mem_reg(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical, LowOpndRegType type, char * stream) argument 285 encoder_mem_disp_scale_reg(Mnemonic m, OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical, LowOpndRegType type, char * stream) argument 299 encoder_movzs_mem_disp_scale_reg(Mnemonic m, OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical, LowOpndRegType type, char * stream) argument 314 encoder_reg_mem_disp_scale(Mnemonic m, OpndSize size, int reg, bool isPhysical, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, LowOpndRegType type, char* stream) argument 330 encoder_reg_mem(Mnemonic m, OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical, LowOpndRegType type, char * stream) argument 375 encoder_imm_mem(Mnemonic m, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, char * stream) argument 392 encoder_fp_mem(Mnemonic m, OpndSize size, int reg, int disp, int base_reg, bool isBasePhysical, char * stream) argument 406 encoder_mem_fp(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, char * stream) argument 447 encoder_movez_mem_to_reg(OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical, char * stream) argument 461 encoder_moves_mem_to_reg(OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical, char * stream) argument [all...]
H A D	enc_base.h	`376 int disp, OpndExt ext = OpndExt_None) : m_kind(OpndKind_Mem), m_size(size), m_ext(ext) 381 m_disp = disp; 388 Operand(OpndSize size, RegName base, int disp, OpndExt ext = OpndExt_None) : 394 m_disp = disp; 472 int disp(void) const { return is_mem() ? m_disp : 0; }`
H A D	dec_base.cpp	`468 int disp = 0; local 475 // we have only modrm. no sib, no disp. 513 //update disp and pbuf 516 disp = (int)pbuf; 521 disp = (char)pbuf; 528 disp = (int)pbuf; 533 disp = (int)pbuf; 537 opnd = EncoderBase::Operand(opndDesc.size, base, index, scale, disp);`
H A D	enc_base.cpp	`419 assert(original.disp() == decoded.disp()); 473 // the base is EBP w/o disp, BUT let's use a fake disp8 477 // only disp ?.. 480 // ... yes - only have disp 481 // On EM64T, the simply [disp] addressing means 'RIP-based' one - 496 (unsigned)stream = (unsigned)op.disp(); 505 const bool disp_fits8 = CHAR_MIN <= op.disp() && op.disp() <= CHAR_MAX; 509 // ... luckily no SIB, only base and may be a disp [all...]`
H A D	encoder.h	345 M_Opnd(I_32 disp): argument 346 RM_Opnd(Mem), m_disp(disp), m_scale(0), m_index(n_reg), m_base(n_reg) {} 349 M_Opnd(I_32 disp, Reg_No rbase, Reg_No rindex, unsigned scale): argument 350 RM_Opnd(Mem), m_disp(disp), m_scale(scale), m_index(rindex), m_base(rbase) {} 359 inline const Imm_Opnd & disp(void) const { return m_disp; } function in class:M_Opnd 368 M_Base_Opnd(Reg_No base, I_32 disp) : M_Opnd(disp, base, n_reg, 0) {} argument 382 M_Index_Opnd(Reg_No base, Reg_No index, I_32 disp, unsigned scale): argument 383 M_Opnd(disp, base, index, scale) {} 581 //char * jump(char * stream, I_32 disp); [all...]
H A D	encoder.inl	`77 (unsigned)m.scale().get_value(), (int)m.disp().get_value(), ext));`
/dalvik/vm/compiler/codegen/x86/
H A D	Lower.h	609 //LR[reg] = disp + PR[base_reg] or disp + LR[base_reg] 610 void load_effective_addr(int disp, int base_reg, bool isBasePhysical, 615 void load_fpu_cw(int disp, int base_reg, bool isBasePhysical); 616 void store_fpu_cw(bool checkException, int disp, int base_reg, bool isBasePhysical); 618 void load_fp_stack(LowOp* op, OpndSize size, int disp, int base_reg, bool isBasePhysical); 619 void load_int_fp_stack(OpndSize size, int disp, int base_reg, bool isBasePhysical); 621 void store_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical); 622 void store_int_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical); 632 int disp, in [all...]
H A D	LowerHelper.cpp	123 void set_mem_opnd(LowOpndMem* mem, int disp, int base, bool isPhysical) { argument 124 mem->m_disp.value = disp; 138 void set_mem_opnd_scale(LowOpndMem* mem, int base, bool isPhysical, int disp, int index, bool indexPhysical, int scale) { argument 153 mem->m_disp.value = disp; 274 int disp, int base_reg) { 275 stream = encoder_mem(m, size, disp, base_reg, true, stream); 280 int disp, int base_reg, bool isBasePhysical) { 285 return lower_mem(m, m2, size, disp, regAll); 287 stream = encoder_mem(m, size, disp, base_reg, isBasePhysical, stream); 421 int disp, in 273 lower_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int disp, int base_reg) argument 279 dump_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 420 lower_mem_reg(Mnemonic m, AtomOpCode m2, OpndSize size, int disp, int base_reg, MemoryAccessType mType, int mIndex, int reg, LowOpndRegType type, bool isMoves) argument 442 dump_mem_reg_noalloc(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg, bool isPhysical, LowOpndRegType type) argument 451 dump_mem_reg_noalloc_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg, bool isPhysical, LowOpndRegType type) argument 467 dump_mem_reg(Mnemonic m, AtomOpCode m2, OpndSize size, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg, bool isPhysical, LowOpndRegType type) argument 493 dump_moves_mem_reg(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 513 dump_movez_mem_reg(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 566 lower_mem_scale_reg(Mnemonic m, OpndSize size, int base_reg, int disp, int index_reg, int scale, int reg, LowOpndRegType type) argument 583 dump_mem_scale_reg(Mnemonic m, OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical, LowOpndRegType type) argument 611 lower_reg_mem_scale(Mnemonic m, OpndSize size, int reg, int base_reg, int disp, int index_reg, int scale, LowOpndRegType type) argument 622 dump_reg_mem_scale(Mnemonic m, OpndSize size, int reg, bool isPhysical, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, LowOpndRegType type) argument 645 lower_reg_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int reg, int disp, int base_reg, MemoryAccessType mType, int mIndex, LowOpndRegType type) argument 652 dump_reg_mem_noalloc(Mnemonic m, OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, LowOpndRegType type) argument 661 dump_reg_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, LowOpndRegType type) argument 708 lower_imm_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int disp, int base_reg, MemoryAccessType mType, int mIndex, bool chaining) argument 715 dump_imm_mem_noalloc(Mnemonic m, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex) argument 724 dump_imm_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, bool chaining) argument 746 lower_fp_mem(Mnemonic m, OpndSize size, int reg, int disp, int base_reg, MemoryAccessType mType, int mIndex) argument 752 dump_fp_mem(Mnemonic m, OpndSize size, int reg, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex) argument 767 lower_mem_fp(Mnemonic m, OpndSize size, int disp, int base_reg, MemoryAccessType mType, int mIndex, int reg) argument 773 dump_mem_fp(Mnemonic m, OpndSize size, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg) argument 796 load_effective_addr(int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 816 load_fpu_cw(int disp, int base_reg, bool isBasePhysical) argument 823 store_fpu_cw(bool checkException, int disp, int base_reg, bool isBasePhysical) argument 839 load_fp_stack(LowOp* op, OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 846 load_int_fp_stack(OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 859 store_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 866 store_int_fp_stack(LowOp* op, bool pop, OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 873 compare_reg_mem(LowOp* op, OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical) argument 881 compare_mem_reg(OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1098 compare_imm_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument 1145 compare_ss_mem_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1162 compare_sd_mem_with_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1206 test_imm_mem(OpndSize size, int imm, int disp, int reg, bool isPhysical) argument 1223 alu_unary_mem(LowOp* op, OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhysical) argument 1234 alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBasePhysical) argument 1256 alu_binary_mem_reg(OpndSize size, ALU_Opcode opc, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1382 alu_binary_reg_mem(OpndSize size, ALU_Opcode opc, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical) argument 1395 fpu_mem(LowOp* op, ALU_Opcode opc, OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 1424 push_mem_to_stack(OpndSize size, int disp, int base_reg, bool isBasePhysical) argument 1430 move_reg_to_mem(OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical) argument 1439 move_reg_to_mem_noalloc(OpndSize size, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex) argument 1449 move_mem_to_reg(OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1458 move_mem_to_reg_noalloc(OpndSize size, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg, bool isPhysical) argument 1468 move_ss_mem_to_reg_noalloc(int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, int reg, bool isPhysical) argument 1476 move_ss_reg_to_mem_noalloc(int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex) argument 1484 movez_mem_to_reg(OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1501 movez_mem_disp_scale_to_reg(OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical) argument 1509 moves_mem_disp_scale_to_reg(OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical) argument 1521 moves_mem_to_reg(LowOp* op, OpndSize size, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1555 move_mem_disp_scale_to_reg(OpndSize size, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale, int reg, bool isPhysical) argument 1573 move_reg_to_mem_disp_scale(OpndSize size, int reg, bool isPhysical, int base_reg, bool isBasePhysical, int disp, int index_reg, bool isIndexPhysical, int scale) argument 1582 move_chain_to_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument 1590 move_imm_to_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument 1670 move_ss_mem_to_reg(LowOp* op, int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1678 move_ss_reg_to_mem(LowOp* op, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical) argument 1685 move_sd_mem_to_reg(int disp, int base_reg, bool isBasePhysical, int reg, bool isPhysical) argument 1692 move_sd_reg_to_mem(LowOp* op, int reg, bool isPhysical, int disp, int base_reg, bool isBasePhysical) argument [all...]
H A D	LowerJump.cpp	`643 void call_mem(int disp, int reg, bool isPhysical) { argument 645 dump_mem(m, ATOM_NORMAL, OpndSize_32, disp, reg, isPhysical);`

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