Searched refs:highReg (Results 1 - 22 of 22) sorted by relevance

/dalvik/vm/compiler/codegen/arm/Thumb/
H A DRalloc.cpp32 int highReg; local
36 highReg = dvmCompilerAllocTemp(cUnit);
37 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
H A DGen.cpp102 opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg,
139 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg);
146 opRegReg(cUnit, secondOp, rlSrc1.highReg, rlResult.highReg);
149 dvmCompilerClobber(cUnit, rlResult.highReg);
151 dvmCompilerClobber(cUnit, rlSrc1.highReg);
161 rlResult.highReg);
164 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc
[all...]
H A DFactory.cpp28 int highReg);
29 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg);
819 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
821 if (lowReg < highReg) {
822 storeMultiple(cUnit, base, (1 << lowReg) | (1 << highReg));
825 storeWordDisp(cUnit, base, 4, highReg);
829 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
831 if (lowReg < highReg) {
832 loadMultiple(cUnit, base, (1 << lowReg) | (1 << highReg));
835 loadWordDisp(cUnit, base, 4 , highReg);
[all...]
/dalvik/vm/compiler/codegen/mips/Mips32/
H A DRalloc.cpp32 int highReg; local
39 highReg = lowReg + 1;
40 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
46 highReg = dvmCompilerAllocTemp(cUnit);
47 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
H A DGen.cpp98 opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg,
127 newLIR3(cUnit, opc, rlDest.highReg, rlSrc1.highReg, rlSrc2.highReg);
128 newLIR3(cUnit, opc, rlDest.highReg, rlDest.highReg, tReg);
149 opRegRegReg(cUnit, secondOp, rlResult.highReg, rlResult.highReg, rlSrc2.highReg);
[all...]
H A DFactory.cpp33 int highReg);
34 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg);
823 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
826 storeWordDisp(cUnit, base, HIWORD_OFFSET, highReg);
829 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
832 loadWordDisp(cUnit, base, HIWORD_OFFSET , highReg);
/dalvik/vm/compiler/codegen/arm/Thumb2/
H A DRalloc.cpp35 int highReg; local
45 highReg = lowReg + 1;
48 highReg = dvmCompilerAllocTemp(cUnit);
50 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
H A DGen.cpp92 newLIR2(cUnit, kThumb2Vnegd, S2D(rlResult.lowReg, rlResult.highReg),
93 S2D(rlSrc.lowReg, rlSrc.highReg));
113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg);
115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1);
121 rlResult.highReg = resHi;
134 opRegRegReg(cUnit, secondOp, rlResult.highReg, rlSrc1.highReg,
135 rlSrc2.highReg);
381 opRegReg(cUnit, kOpCmp, rlSrc1.highReg, rlSrc2.highReg);
[all...]
H A DFactory.cpp1151 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
1153 storeBaseDispWide(cUnit, base, 0, lowReg, highReg);
1156 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument
1158 loadBaseDispWide(cUnit, NULL, base, 0, lowReg, highReg, INVALID_SREG);
/dalvik/vm/compiler/codegen/
H A DCodegenFactory.cpp91 genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg);
191 loadValueDirectWide(cUnit, rlSrc, rlSrc.lowReg, rlSrc.highReg);
194 dvmCompilerMarkLive(cUnit, rlSrc.highReg,
199 rlSrc.lowReg, rlSrc.highReg, INVALID_SREG);
202 dvmCompilerClobber(cUnit, rlSrc.highReg);
212 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg));
218 dvmCompilerIsLive(cUnit, rlSrc.highReg) ||
222 genRegCopyWide(cUnit, rlDest.lowReg, rlDest.highReg,
223 rlSrc.lowReg, rlSrc.highReg);
227 rlDest.highReg
[all...]
H A DRallocUtil.cpp486 dvmCompilerResetDef(cUnit, rl.highReg); // Only track low of pair
497 RegisterInfo *infoHi = getRegInfo(cUnit, rl.highReg);
545 dvmCompilerResetDef(cUnit, rl.highReg);
632 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument
635 RegisterInfo *infoHi = getRegInfo(cUnit, highReg);
637 infoLo->partner = highReg;
724 loc.highReg = infoHi->reg;
726 dvmCompilerMarkPair(cUnit, loc.lowReg, loc.highReg);
752 int highReg; local
758 assert(FPREG(loc.lowReg) == FPREG(loc.highReg));
[all...]
H A DRalloc.h99 int highReg);
/dalvik/vm/compiler/codegen/mips/
H A DCodegenFactory.cpp85 genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg);
183 loadValueDirectWide(cUnit, rlSrc, rlSrc.lowReg, rlSrc.highReg);
186 dvmCompilerMarkLive(cUnit, rlSrc.highReg,
190 rlSrc.lowReg, rlSrc.highReg, INVALID_SREG);
193 dvmCompilerClobber(cUnit, rlSrc.highReg);
203 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg));
209 dvmCompilerIsLive(cUnit, rlSrc.highReg) ||
213 genRegCopyWide(cUnit, rlDest.lowReg, rlDest.highReg,
214 rlSrc.lowReg, rlSrc.highReg);
218 rlDest.highReg
[all...]
H A DRallocUtil.cpp552 dvmCompilerResetDef(cUnit, rl.highReg); // Only track low of pair
563 RegisterInfo *infoHi = getRegInfo(cUnit, rl.highReg);
617 dvmCompilerResetDef(cUnit, rl.highReg);
704 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument
707 RegisterInfo *infoHi = getRegInfo(cUnit, highReg);
709 infoLo->partner = highReg;
796 loc.highReg = infoHi->reg;
798 dvmCompilerMarkPair(cUnit, loc.lowReg, loc.highReg);
824 int highReg; local
830 assert(FPREG(loc.lowReg) == FPREG(loc.highReg));
[all...]
H A DRalloc.h103 int highReg);
H A DCodegenDriver.cpp383 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg);
404 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
517 rlResult.highReg, INVALID_SREG);
589 storeBaseDispWide(cUnit, tReg, dataOffset, rlSrc.lowReg, rlSrc.highReg)
742 opRegReg(cUnit, kOpMvn, rlResult.highReg, rlSrc2.highReg);
792 newLIR3(cUnit, kMipsSubu, tReg, r_ZERO, rlSrc2.highReg);
793 newLIR3(cUnit, kMipsSltu, rlResult.highReg, r_ZERO, rlResult.lowReg);
794 newLIR3(cUnit, kMipsSubu, rlResult.highReg, tReg, rlResult.highReg);
[all...]
/dalvik/vm/compiler/codegen/arm/FP/
H A DThumb2VFP.cpp104 newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
105 S2D(rlSrc1.lowReg, rlSrc1.highReg),
106 S2D(rlSrc2.lowReg, rlSrc2.highReg));
164 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg);
173 newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg),
192 newLIR2(cUnit, kThumb2Vsqrtd, S2D(rlResult.lowReg, rlResult.highReg),
193 S2D(rlSrc.lowReg, rlSrc.highReg));
194 newLIR2(cUnit, kThumb2Vcmpd, S2D(rlResult.lowReg, rlResult.highReg),
195 S2D(rlResult.lowReg, rlResult.highReg));
200 newLIR3(cUnit, kThumb2Fmrrd, r0, r1, S2D(rlSrc.lowReg, rlSrc.highReg));
[all...]
H A DThumbVFP.cpp34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg);
149 dvmCompilerClobber(cUnit, rlDest.highReg);
218 dvmCompilerClobber(cUnit, rlDest.highReg);
/dalvik/vm/compiler/codegen/arm/
H A DArmRallocUtil.cpp83 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg);
91 res.highReg = r3;
96 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg);
H A DCodegenDriver.cpp317 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg);
338 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
452 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg);
530 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
682 opRegReg(cUnit, kOpMvn, rlResult.highReg, rlSrc2.highReg);
738 opRegReg(cUnit, kOpSbc, tReg, rlSrc2.highReg);
739 genRegCopy(cUnit, rlResult.highReg, tReg);
1535 opRegRegImm(cUnit, kOpAsr, rlResult.highReg,
1565 loadConstantValueWide(cUnit, rlResult.lowReg, rlResult.highReg,
[all...]
/dalvik/vm/compiler/codegen/mips/FP/
H A DMipsFP.cpp35 rlSrc.highReg);
197 newLIR3(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg),
198 S2D(rlSrc1.lowReg, rlSrc1.highReg),
199 S2D(rlSrc2.lowReg, rlSrc2.highReg));
240 dvmCompilerClobber(cUnit, rlDest.highReg);
292 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg);
301 newLIR2(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg), srcReg);
369 dvmCompilerClobber(cUnit, rlDest.highReg);
/dalvik/vm/compiler/
H A DCompilerIR.h43 u1 highReg:6; // 2nd physical register (if wide) member in struct:RegLocation

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