Searched refs:rd (Results 1 - 8 of 8) sorted by relevance
/dalvik/vm/compiler/template/mips/ |
H A D | header.S | 152 #define SAVEAREA_FROM_FP(rd, _fpreg) \ 153 subu rd, _fpreg, sizeofStackSaveArea 160 #define FETCH_ADVANCE_INST_RB(rd) addu rPC, rPC, rd; \ 163 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC) 164 #define FETCH_S(rd, _count) lh rd, (_count * 2)(rPC) 168 #define FETCH_B(rd, _count) lbu rd, (_coun [all...] |
/dalvik/vm/mterp/mips/ |
H A D | header.S | 74 #define SAVEAREA_FROM_FP(rd, _fpreg) \ 75 subu rd, _fpreg, sizeofStackSaveArea 86 #define FETCH_ADVANCE_INST_RB(rd) addu rPC, rPC, rd; \ 89 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC) 90 #define FETCH_S(rd, _count) lh rd, ((_count) * 2)(rPC) 94 #define FETCH_B(rd, _count) lbu rd, ((_coun [all...] |
/dalvik/vm/compiler/template/out/ |
H A D | CompilerTemplateAsm-mips.S | 159 #define SAVEAREA_FROM_FP(rd, _fpreg) \ 160 subu rd, _fpreg, sizeofStackSaveArea 167 #define FETCH_ADVANCE_INST_RB(rd) addu rPC, rPC, rd; \ 170 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC) 171 #define FETCH_S(rd, _count) lh rd, (_count * 2)(rPC) 175 #define FETCH_B(rd, _count) lbu rd, (_coun [all...] |
/dalvik/vm/mterp/out/ |
H A D | InterpAsm-mips.S | 81 #define SAVEAREA_FROM_FP(rd, _fpreg) \ 82 subu rd, _fpreg, sizeofStackSaveArea 93 #define FETCH_ADVANCE_INST_RB(rd) addu rPC, rPC, rd; \ 96 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC) 97 #define FETCH_S(rd, _count) lh rd, ((_count) * 2)(rPC) 101 #define FETCH_B(rd, _count) lbu rd, ((_coun [all...] |
/dalvik/vm/compiler/codegen/mips/ |
H A D | Assemble.cpp | 1934 kMemOpLdrPcRel = 0x09, // ldr(3) [01001] rd[10..8] imm_8[7..0] 1939 kMemOpStrRRI5 = 0x0C, // str(1) [01100] imm_5[10..6] rn[5..3] rd[2..0] 1940 kMemOpLdrRRI5 = 0x0D, // ldr(1) [01101] imm_5[10..6] rn[5..3] rd[2..0] 1941 kMemOpStrbRRI5 = 0x0E, // strb(1) [01110] imm_5[10..6] rn[5..3] rd[2..0] 1942 kMemOpLdrbRRI5 = 0x0F, // ldrb(1) [01111] imm_5[10..6] rn[5..3] rd[2..0] 1943 kMemOpStrhRRI5 = 0x10, // strh(1) [10000] imm_5[10..6] rn[5..3] rd[2..0] 1944 kMemOpLdrhRRI5 = 0x11, // ldrh(1) [10001] imm_5[10..6] rn[5..3] rd[2..0] 1945 kMemOpLdrSpRel = 0x13, // ldr(4) [10011] rd[10..8] imm_8[7..0] 1948 kMemOpStrRRR = 0x28, // str(2) [0101000] rm[8..6] rn[5..3] rd[2..0] 1949 kMemOpStrhRRR = 0x29, // strh(2) [0101001] rm[8..6] rn[5..3] rd[ 2019 int rd = (insn >> 12) & 0xF; local 2187 int rd = (insn >> 8) & 0x7; local [all...] |
/dalvik/vm/compiler/codegen/arm/ |
H A D | Assemble.cpp | 2561 kMemOpLdrPcRel = 0x09, // ldr(3) [01001] rd[10..8] imm_8[7..0] 2566 kMemOpStrRRI5 = 0x0C, // str(1) [01100] imm_5[10..6] rn[5..3] rd[2..0] 2567 kMemOpLdrRRI5 = 0x0D, // ldr(1) [01101] imm_5[10..6] rn[5..3] rd[2..0] 2568 kMemOpStrbRRI5 = 0x0E, // strb(1) [01110] imm_5[10..6] rn[5..3] rd[2..0] 2569 kMemOpLdrbRRI5 = 0x0F, // ldrb(1) [01111] imm_5[10..6] rn[5..3] rd[2..0] 2570 kMemOpStrhRRI5 = 0x10, // strh(1) [10000] imm_5[10..6] rn[5..3] rd[2..0] 2571 kMemOpLdrhRRI5 = 0x11, // ldrh(1) [10001] imm_5[10..6] rn[5..3] rd[2..0] 2572 kMemOpLdrSpRel = 0x13, // ldr(4) [10011] rd[10..8] imm_8[7..0] 2575 kMemOpStrRRR = 0x28, // str(2) [0101000] rm[8..6] rn[5..3] rd[2..0] 2576 kMemOpStrhRRR = 0x29, // strh(2) [0101001] rm[8..6] rn[5..3] rd[ 2645 int rd = (insn >> 12) & 0xF; local 2813 int rd = (insn >> 8) & 0x7; local [all...] |
/dalvik/vm/compiler/codegen/x86/libenc/ |
H A D | enc_tabl.cpp | 601 {OpcodeInfo::ia32, {0x48|rd}, {r32}, DU }, 1048 {OpcodeInfo::ia32, {0x40|rd}, {r32}, DU }, 1159 {OpcodeInfo::all, {0xB8|rd}, {r32,imm32}, D_U }, 1160 {OpcodeInfo::em64t, {REX_W, 0xB8|rd}, {r64,imm64}, D_U }, 1388 {OpcodeInfo::ia32, {0x58|rd }, {r32}, D }, 1389 {OpcodeInfo::em64t, {0x58|rd }, {r64}, D }, 1412 {OpcodeInfo::ia32, {0x50|rd }, {r32}, U }, 1413 {OpcodeInfo::em64t, {0x50|rd }, {r64}, U },
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H A D | enc_prvt.h | 136 #define rd OpcodeByteKind_rd macro
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