| /dalvik/vm/compiler/codegen/ |
| H A D | Ralloc.h | 40 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument
42 assert(sReg != INVALID_SREG);
43 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
53 * Get the "real" sreg number associated with an sReg slot. In general,
54 * sReg values passed through codegen are the SSA names created by
67 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument
94 extern void dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg);
177 /* Clobber any temp associated with an sReg. Could be in either class */
178 extern void dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg);
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| H A D | RallocUtil.cpp | 32 * Get the "real" sreg number associated with an sReg slot. In general,
33 * sReg values passed through codegen are the SSA names created by
67 regs[i].sReg = INVALID_SREG;
78 p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
115 if (dvmCompilerS2VReg(cUnit, info2->sReg) <
116 dvmCompilerS2VReg(cUnit, info1->sReg))
119 dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
130 dvmCompilerS2VReg(cUnit, info->sReg) << 2,
150 p[i].sReg = INVALID_SREG;
174 static void clobberSRegBody(RegisterInfo *p, int numTemps, int sReg) argument
187 dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg) argument
302 allocLiveBody(RegisterInfo *p, int numTemps, int sReg) argument
316 allocLive(CompilationUnit *cUnit, int sReg, int regClass) argument
617 dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg) argument
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| H A D | Ralloc.h | 44 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg) argument
46 assert(sReg != INVALID_SREG);
47 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
57 * Get the "real" sreg number associated with an sReg slot. In general,
58 * sReg values passed through codegen are the SSA names created by
71 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg) argument
98 extern void dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg);
181 /* Clobber any temp associated with an sReg. Could be in either class */
182 extern void dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg);
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| H A D | RallocUtil.cpp | 34 * Get the "real" sreg number associated with an sReg slot. In general,
35 * sReg values passed through codegen are the SSA names created by
69 regs[i].sReg = INVALID_SREG;
80 p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
117 if (dvmCompilerS2VReg(cUnit, info2->sReg) <
118 dvmCompilerS2VReg(cUnit, info1->sReg))
121 dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
132 dvmCompilerS2VReg(cUnit, info->sReg) << 2,
152 p[i].sReg = INVALID_SREG;
176 static void clobberSRegBody(RegisterInfo *p, int numTemps, int sReg) argument
189 dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg) argument
303 allocLiveBody(RegisterInfo *p, int numTemps, int sReg) argument
317 allocLive(CompilationUnit *cUnit, int sReg, int regClass) argument
689 dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg) argument
[all...] |
| H A D | CodegenFactory.cpp | 261 * Perform null-check on a register. sReg is the ssa register being checked,
263 * indicates that sReg has been checked before the check request is ignored.
265 static MipsLIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg, argument
269 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
272 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
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| H A D | MipsLIR.h | 138 int sReg; // Name of live value member in struct:RegisterInfo
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| /dalvik/vm/compiler/codegen/arm/ |
| H A D | ArchFactory.cpp | 53 * Perform null-check on a register. sReg is the ssa register being checked,
55 * indicates that sReg has been checked before the check request is ignored.
57 static TGT_LIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg, argument
61 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
64 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
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| H A D | ArmLIR.h | 109 int sReg; // Name of live value member in struct:RegisterInfo
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| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| H A D | Factory.cpp | 577 OpSize size, int sReg)
580 * on base (which must have an associated sReg and MIR). If not
699 int sReg)
702 size, sReg);
707 int sReg)
710 kLong, sReg);
575 loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, int rDestHi, OpSize size, int sReg) argument
697 loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, OpSize size, int sReg) argument
705 loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDestLo, int rDestHi, int sReg) argument
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| H A D | Factory.cpp | 594 OpSize size, int sReg)
597 * on base (which must have an associated sReg and MIR). If not
704 int sReg)
707 size, sReg);
712 int sReg)
715 kLong, sReg);
592 loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, int rDestHi, OpSize size, int sReg) argument
702 loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, OpSize size, int sReg) argument
710 loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDestLo, int rDestHi, int sReg) argument
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| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| H A D | Factory.cpp | 872 * on base (which must have an associated sReg and MIR). If not
877 OpSize size, int sReg)
902 -1, kWord, sReg);
994 int sReg)
997 size, sReg);
1002 int sReg)
1005 kLong, sReg);
875 loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, int rDestHi, OpSize size, int sReg) argument
992 loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDest, OpSize size, int sReg) argument
1000 loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, int displacement, int rDestLo, int rDestHi, int sReg) argument
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