Searched refs:CP0MVPC0_TLBS (Results 1 - 2 of 2) sorted by relevance

/external/qemu/target-mips/
H A Dcpu.h117 #define CP0MVPC0_TLBS 29 macro
H A Dtranslate_init.c537 env->mvp->CP0_MVPConf0 = (1 << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) |

Completed in 26 milliseconds