Searched refs:CP0SRSC0_SRS2 (Results 1 - 2 of 2) sorted by relevance
| /external/qemu/target-mips/ | ||
| H A D | cpu.h | 237 #define CP0SRSC0_SRS2 10 macro |
| H A D | translate_init.c | 291 (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1), |
Completed in 67 milliseconds