Searched refs:CP0SRSC3_SRS10 (Results 1 - 2 of 2) sorted by relevance
| /external/qemu/target-mips/ | ||
| H A D | cpu.h | 256 #define CP0SRSC3_SRS10 0 macro |
| H A D | translate_init.c | 300 (0x3fe << CP0SRSC3_SRS11) | (0x3fe << CP0SRSC3_SRS10), |
Completed in 60 milliseconds