Searched refs:CP0SRSCtl_ESS (Results 1 - 2 of 2) sorted by relevance

/external/qemu/target-mips/
H A Dcpu.h296 #define CP0SRSCtl_ESS 12 macro
H A Dop_helper.c1201 uint32_t mask = (0xf << CP0SRSCtl_ESS) | (0xf << CP0SRSCtl_PSS);

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