Searched refs:CP0_SRSConf3 (Results 1 - 5 of 5) sorted by relevance

/external/qemu/target-mips/
H A Dmachine.c108 qemu_put_sbe32s(f, &env->CP0_SRSConf3);
259 qemu_get_sbe32s(f, &env->CP0_SRSConf3);
H A Dtranslate_init.c90 int32_t CP0_SRSConf3; member in struct:mips_def_t
299 .CP0_SRSConf3 = (1 << CP0SRSC3_M) | (0x3fe << CP0SRSC3_SRS12) |
H A Dcpu.h252 int32_t CP0_SRSConf3; member in struct:CPUMIPSState
H A Dtranslate.c3086 gen_mfc0_load32(arg, offsetof(CPUState, CP0_SRSConf3));
4256 gen_mfc0_load32(arg, offsetof(CPUState, CP0_SRSConf3));
8652 env->CP0_SRSConf3 = env->cpu_model->CP0_SRSConf3;
H A Dop_helper.c1096 env->CP0_SRSConf3 |= arg1 & env->CP0_SRSConf3_rw_bitmask;

Completed in 179 milliseconds