Searched refs:CP0_SRSCtl (Results 1 - 5 of 5) sorted by relevance
/external/qemu/target-mips/ |
H A D | machine.c | 117 qemu_put_sbe32s(f, &env->CP0_SRSCtl); 268 qemu_get_sbe32s(f, &env->CP0_SRSCtl);
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H A D | translate_init.c | 79 int32_t CP0_SRSCtl; member in struct:mips_def_t 288 .CP0_SRSCtl = (0xf << CP0SRSCtl_HSS),
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H A D | cpu.h | 293 int32_t CP0_SRSCtl; member in struct:CPUMIPSState
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H A D | translate.c | 557 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUState, CP0_SRSCtl)); 580 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUState, CP0_SRSCtl)); 3173 gen_mfc0_load32(arg, offsetof(CPUState, CP0_SRSCtl)); 4341 gen_mfc0_load32(arg, offsetof(CPUState, CP0_SRSCtl)); 8634 env->CP0_SRSCtl = env->cpu_model->CP0_SRSCtl;
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H A D | op_helper.c | 1202 env->CP0_SRSCtl = (env->CP0_SRSCtl & ~mask) | (arg1 & mask);
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