Searched refs:Mov (Results 1 - 6 of 6) sorted by relevance
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUIndirectAddressing.cpp | 303 MachineInstrBuilder Mov = TII->buildIndirectRead(BB, I, local
310 Mov.addReg(IndirectReg, RegState::Implicit | RegState::Kill);
311 Mov.addReg(LiveAddressRegisterMap[Address], RegState::Implicit);
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| H A D | R600InstrInfo.cpp | 1052 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV,
1056 setImmOperand(Mov, AMDGPU::OpName::dst_rel, 1);
1057 return Mov;
1069 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV,
1074 setImmOperand(Mov, AMDGPU::OpName::src0_rel, 1);
1076 return Mov;
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| H A D | SIISelLowering.cpp | 642 MachineSDNode *Mov = dyn_cast<MachineSDNode>(Operand); local
645 if (Mov == 0 || !TII->isMov(Mov->getMachineOpcode()))
648 const SDValue &Op = Mov->getOperand(0);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 710 MachineInstrBuilder Mov; local
728 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst)
732 Mov.addReg(Src);
733 Mov = AddDefaultPred(Mov);
736 Mov = AddDefaultCC(Mov);
739 Mov->addRegisterDefined(DestReg, TRI);
741 Mov->addRegisterKilled(SrcReg, TRI);
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| /external/valgrind/main/VEX/priv/ |
| H A D | host_arm_defs.c | 1144 i->ARMin.Mov.dst = dst;
1145 i->ARMin.Mov.src = src;
1568 ppHRegARM(i->ARMin.Mov.dst);
1570 ppARMRI84(i->ARMin.Mov.src);
2013 addHRegUse(u, HRmWrite, i->ARMin.Mov.dst);
2014 addRegUsage_ARMRI84(u, i->ARMin.Mov.src);
2310 i->ARMin.Mov.dst = lookupHRegRemap(m, i->ARMin.Mov.dst);
2311 mapRegs_ARMRI84(m, i->ARMin.Mov.src);
2491 if (i->ARMin.Mov
[all...] |
| H A D | host_arm_defs.h | 656 } Mov; member in union:__anon27532::__anon27533
710 /* Mov src to dst on the given condition, which may not
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