Searched refs:SMRDmemriEncode (Results 1 - 6 of 6) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDGPUCodeEmitter.h | 40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo) function in class:llvm::AMDGPUCodeEmitter
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUCodeEmitter.h | 40 virtual uint32_t SMRDmemriEncode(const MachineInstr &MI, unsigned OpNo) function in class:llvm::AMDGPUCodeEmitter
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.h | 51 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, function in class:llvm::AMDGPUMCCodeEmitter
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| H A D | SIMCCodeEmitter.cpp | 99 /// SMRDmemriEncode - Encoding for SMRD indexed loads
100 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo,
189 /// SMRDmemriEncode - This function is responsibe for encoding the offset
197 uint32_t SIMCCodeEmitter::SMRDmemriEncode(const MCInst &MI, unsigned OpNo, function in class:SIMCCodeEmitter
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| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.h | 51 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, function in class:llvm::AMDGPUMCCodeEmitter
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| H A D | SIMCCodeEmitter.cpp | 99 /// SMRDmemriEncode - Encoding for SMRD indexed loads
100 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo,
189 /// SMRDmemriEncode - This function is responsibe for encoding the offset
197 uint32_t SIMCCodeEmitter::SMRDmemriEncode(const MCInst &MI, unsigned OpNo, function in class:SIMCCodeEmitter
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