/external/valgrind/main/none/tests/s390x/ |
H A D | fpconv.c | 6 #define I2F(insn, initial, target,round) \ 10 asm volatile(insn " 0,2\n\t" :"=f" (_t):"d"(source)); \ 14 #define F2L(insn, initial, type, round, cc) \ 18 asm volatile(insn " 2," #round ",0\n\t" \ 26 #define DO_INSN_I2F32(insn, round) \ 29 printf(#insn " %f\n", I2F(insn, 0, f32, round)); \ 30 printf(#insn " %f\n", I2F(insn, 1, f32, round)); \ 31 printf(#insn " [all...] |
H A D | condloadstore.c | 5 #define LOAD_REG_MEM(insn, s, ccset, initial, mask) \ 19 insn(1,mask,5,000,00) \ 23 printf(#insn " %16.16lX into %16.16lX if mask" \ 29 #define LOAD_REG_REG(insn, s, ccset, initial, mask) \ 42 insn(mask,1,2) \ 46 printf(#insn " %16.16lX into %16.16lX if mask" \ 51 #define STORE_REG_REG(insn, s, ccset, initial, mask) \ 65 insn(1,mask,5,000,00) \ 69 printf(#insn " %16.16lX into %16.16lX if mask" \ 75 #define INSNVALCCINIT(insn, valu [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 166 * @param insn - The instruction with the reader function to use. The cursor 172 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) { argument 173 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor); 176 ++(insn->readerCursor); 184 * @param insn - See consumeByte(). 188 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) { argument 189 return insn->reader(insn 192 unconsumeByte(struct InternalInstruction* insn) argument 239 dbgprintf(struct InternalInstruction* insn, const char* format, ...) argument 266 setPrefixPresent(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 283 isPrefixAtLocation(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument 303 readPrefixes(struct InternalInstruction* insn) argument 574 readOpcode(struct InternalInstruction* insn) argument 693 getIDWithAttrMask(uint16_t* instructionID, struct InternalInstruction* insn, uint8_t attrMask) argument 760 getID(struct InternalInstruction* insn, const void *miiArg) argument 957 readSIB(struct InternalInstruction* insn) argument 1055 readDisplacement(struct InternalInstruction* insn) argument 1100 readModRM(struct InternalInstruction* insn) argument 1313 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) argument 1363 readOpcodeModifier(struct InternalInstruction* insn) argument 1398 readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) argument 1448 readImmediate(struct InternalInstruction* insn, uint8_t size) argument 1502 readVVVV(struct InternalInstruction* insn) argument 1525 readOperands(struct InternalInstruction* insn) argument 1662 decodeInstruction(struct InternalInstruction* insn, byteReader_t reader, const void* readerArg, dlog_t logger, void* loggerArg, const void* miiArg, uint64_t startLoc, DisassemblerMode mode) argument [all...] |
/external/libpcap/ |
H A D | bpf_dump.c | 36 struct bpf_insn *insn; local 40 insn = p->bf_insns; 43 for (i = 0; i < n; ++insn, ++i) { 44 printf("%u %u %u %u\n", insn->code, 45 insn->jt, insn->jf, insn->k); 50 for (i = 0; i < n; ++insn, ++i) 52 insn->code, insn [all...] |
/external/tcpdump/ |
H A D | bpf_dump.c | 40 struct bpf_insn *insn; local 44 insn = p->bf_insns; 47 for (i = 0; i < n; ++insn, ++i) { 48 printf("%u %u %u %u\n", insn->code, 49 insn->jt, insn->jf, insn->k); 54 for (i = 0; i < n; ++insn, ++i) 56 insn->code, insn [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
H A D | Form30t.java | 42 public String insnArgString(DalvInsn insn) { argument 43 return branchString(insn); 48 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 49 return branchComment(insn); 60 public boolean isCompatible(DalvInsn insn) { argument 61 if (!((insn instanceof TargetInsn) && 62 (insn.getRegisters().size() == 0))) { 71 public boolean branchFits(TargetInsn insn) { argument 77 public void writeTo(AnnotatedOutput out, DalvInsn insn) { argument 78 int offset = ((TargetInsn) insn) [all...] |
H A D | Form21t.java | 45 public String insnArgString(DalvInsn insn) { argument 46 RegisterSpecList regs = insn.getRegisters(); 47 return regs.get(0).regString() + ", " + branchString(insn); 52 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 53 return branchComment(insn); 64 public boolean isCompatible(DalvInsn insn) { argument 65 RegisterSpecList regs = insn.getRegisters(); 67 if (!((insn instanceof TargetInsn) && 73 TargetInsn ti = (TargetInsn) insn; 79 public BitSet compatibleRegs(DalvInsn insn) { argument 89 branchFits(TargetInsn insn) argument 98 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form22t.java | 45 public String insnArgString(DalvInsn insn) { argument 46 RegisterSpecList regs = insn.getRegisters(); 48 ", " + branchString(insn); 53 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 54 return branchComment(insn); 65 public boolean isCompatible(DalvInsn insn) { argument 66 RegisterSpecList regs = insn.getRegisters(); 68 if (!((insn instanceof TargetInsn) && 75 TargetInsn ti = (TargetInsn) insn; 81 public BitSet compatibleRegs(DalvInsn insn) { argument 92 branchFits(TargetInsn insn) argument 101 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form10t.java | 42 public String insnArgString(DalvInsn insn) { argument 43 return branchString(insn); 48 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 49 return branchComment(insn); 60 public boolean isCompatible(DalvInsn insn) { argument 61 if (!((insn instanceof TargetInsn) && 62 (insn.getRegisters().size() == 0))) { 66 TargetInsn ti = (TargetInsn) insn; 72 public boolean branchFits(TargetInsn insn) { argument 73 int offset = insn 81 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form20t.java | 42 public String insnArgString(DalvInsn insn) { argument 43 return branchString(insn); 48 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 49 return branchComment(insn); 60 public boolean isCompatible(DalvInsn insn) { argument 61 if (!((insn instanceof TargetInsn) && 62 (insn.getRegisters().size() == 0))) { 66 TargetInsn ti = (TargetInsn) insn; 72 public boolean branchFits(TargetInsn insn) { argument 73 int offset = insn 81 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form31i.java | 47 public String insnArgString(DalvInsn insn) { argument 48 RegisterSpecList regs = insn.getRegisters(); 49 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 56 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 57 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 69 public boolean isCompatible(DalvInsn insn) { argument 70 RegisterSpecList regs = insn.getRegisters(); 71 if (!((insn instanceof CstInsn) && 77 CstInsn ci = (CstInsn) insn; 89 public BitSet compatibleRegs(DalvInsn insn) { argument 99 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form31t.java | 45 public String insnArgString(DalvInsn insn) { argument 46 RegisterSpecList regs = insn.getRegisters(); 47 return regs.get(0).regString() + ", " + branchString(insn); 52 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 53 return branchComment(insn); 64 public boolean isCompatible(DalvInsn insn) { argument 65 RegisterSpecList regs = insn.getRegisters(); 67 if (!((insn instanceof TargetInsn) && 78 public BitSet compatibleRegs(DalvInsn insn) { argument 79 RegisterSpecList regs = insn 88 branchFits(TargetInsn insn) argument 94 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form51l.java | 48 public String insnArgString(DalvInsn insn) { argument 49 RegisterSpecList regs = insn.getRegisters(); 50 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 57 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 58 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 70 public boolean isCompatible(DalvInsn insn) { argument 71 RegisterSpecList regs = insn.getRegisters(); 72 if (!((insn instanceof CstInsn) && 78 CstInsn ci = (CstInsn) insn; 86 public BitSet compatibleRegs(DalvInsn insn) { argument 96 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
H A D | Form11x.java | 45 public String insnArgString(DalvInsn insn) { argument 46 RegisterSpecList regs = insn.getRegisters(); 52 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 65 public boolean isCompatible(DalvInsn insn) { argument 66 RegisterSpecList regs = insn.getRegisters(); 67 return (insn instanceof SimpleInsn) && 74 public BitSet compatibleRegs(DalvInsn insn) { argument 75 RegisterSpecList regs = insn.getRegisters(); 84 public void writeTo(AnnotatedOutput out, DalvInsn insn) { argument 85 RegisterSpecList regs = insn [all...] |
H A D | Form10x.java | 42 public String insnArgString(DalvInsn insn) { argument 49 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 62 public boolean isCompatible(DalvInsn insn) { argument 63 return (insn instanceof SimpleInsn) && 64 (insn.getRegisters().size() == 0); 69 public void writeTo(AnnotatedOutput out, DalvInsn insn) { argument 70 write(out, opcodeUnit(insn, 0));
|
H A D | Form3rc.java | 46 public String insnArgString(DalvInsn insn) { argument 47 return regRangeString(insn.getRegisters()) + ", " + 48 cstString(insn); 53 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 55 return cstComment(insn); 69 public boolean isCompatible(DalvInsn insn) { argument 70 if (!(insn instanceof CstInsn)) { 74 CstInsn ci = (CstInsn) insn; 98 public void writeTo(AnnotatedOutput out, DalvInsn insn) { argument 99 RegisterSpecList regs = insn [all...] |
H A D | Form5rc.java | 46 public String insnArgString(DalvInsn insn) { argument 47 return regRangeString(insn.getRegisters()) + ", " + 48 cstString(insn); 53 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 55 return cstComment(insn); 69 public boolean isCompatible(DalvInsn insn) { argument 74 if (!(insn instanceof CstInsn)) { 78 CstInsn ci = (CstInsn) insn; 97 public void writeTo(AnnotatedOutput out, DalvInsn insn) { argument 98 RegisterSpecList regs = insn [all...] |
H A D | Form21h.java | 47 public String insnArgString(DalvInsn insn) { argument 48 RegisterSpecList regs = insn.getRegisters(); 49 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 56 public String insnCommentString(DalvInsn insn, boolean noteIndices) { argument 57 RegisterSpecList regs = insn.getRegisters(); 58 CstLiteralBits value = (CstLiteralBits) ((CstInsn) insn).getConstant(); 73 public boolean isCompatible(DalvInsn insn) { argument 74 RegisterSpecList regs = insn.getRegisters(); 75 if (!((insn instanceof CstInsn) && 81 CstInsn ci = (CstInsn) insn; 102 compatibleRegs(DalvInsn insn) argument 112 writeTo(AnnotatedOutput out, DalvInsn insn) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | brw_eu_emit.c | 44 struct brw_instruction *insn, 48 insn->header.execution_size = BRW_EXECUTE_16; 50 insn->header.execution_size = reg.width; /* note - definitions are compatible */ 104 brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, argument 113 insn->bits1.da1.dest_reg_file = dest.file; 114 insn->bits1.da1.dest_reg_type = dest.type; 115 insn->bits1.da1.dest_address_mode = dest.address_mode; 118 insn->bits1.da1.dest_reg_nr = dest.nr; 120 if (insn->header.access_mode == BRW_ALIGN_1) { 121 insn 43 guess_execution_size(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 160 validate_reg(struct brw_instruction *insn, struct brw_reg reg) argument 236 brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 314 brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 427 brw_set_math_message( struct brw_compile *p, struct brw_instruction *insn, GLuint function, GLuint integer_type, bool low_precision, GLuint dataType ) argument 484 brw_set_ff_sync_message(struct brw_compile *p, struct brw_instruction *insn, bool allocate, GLuint response_length, bool end_of_thread) argument 500 brw_set_urb_message( struct brw_compile *p, struct brw_instruction *insn, bool allocate, bool used, GLuint msg_length, GLuint response_length, bool end_of_thread, bool complete, GLuint offset, GLuint swizzle_control ) argument 542 brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint msg_control, GLuint msg_type, GLuint msg_length, bool header_present, GLuint last_render_target, GLuint response_length, GLuint end_of_thread, GLuint send_commit_msg) argument 601 brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint msg_control, GLuint msg_type, GLuint target_cache, GLuint msg_length, GLuint response_length) argument 658 brw_set_sampler_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint sampler, GLuint msg_type, GLuint response_length, GLuint msg_length, GLuint header_present, GLuint simd_mode, GLuint return_format) argument 702 struct brw_instruction *insn; local 734 struct brw_instruction *insn = next_insn(p, opcode); local 746 struct brw_instruction *insn = next_insn(p, opcode); local 771 struct brw_instruction *insn = next_insn(p, opcode); local 993 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); local 1012 struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); local 1082 struct brw_instruction *insn; local 1126 struct brw_instruction *insn; local 1285 struct brw_instruction *insn; local 1318 struct brw_instruction *insn = NULL; local 1396 struct brw_instruction *insn; local 1418 struct brw_instruction *insn; local 1434 struct brw_instruction *insn; local 1471 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); local 1524 struct brw_instruction *insn, *do_insn; local 1615 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); local 1640 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); local 1669 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local 1701 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 1729 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local 1785 struct brw_instruction *insn; local 1895 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2002 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2059 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2104 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2136 struct brw_instruction *insn; local 2206 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2247 struct brw_instruction *insn; local 2384 struct brw_instruction *insn; local 2439 struct brw_instruction *insn; local 2483 struct brw_instruction *insn = &p->store[ip]; local 2508 struct brw_instruction *insn = &p->store[ip]; local 2535 struct brw_instruction *insn = &p->store[ip]; local 2564 struct brw_instruction *insn; local 2602 struct brw_instruction *insn; local [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_eu_emit.c | 44 struct brw_instruction *insn, 48 insn->header.execution_size = BRW_EXECUTE_16; 50 insn->header.execution_size = reg.width; /* note - definitions are compatible */ 104 brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, argument 113 insn->bits1.da1.dest_reg_file = dest.file; 114 insn->bits1.da1.dest_reg_type = dest.type; 115 insn->bits1.da1.dest_address_mode = dest.address_mode; 118 insn->bits1.da1.dest_reg_nr = dest.nr; 120 if (insn->header.access_mode == BRW_ALIGN_1) { 121 insn 43 guess_execution_size(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 160 validate_reg(struct brw_instruction *insn, struct brw_reg reg) argument 236 brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 314 brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) argument 427 brw_set_math_message( struct brw_compile *p, struct brw_instruction *insn, GLuint function, GLuint integer_type, bool low_precision, GLuint dataType ) argument 484 brw_set_ff_sync_message(struct brw_compile *p, struct brw_instruction *insn, bool allocate, GLuint response_length, bool end_of_thread) argument 500 brw_set_urb_message( struct brw_compile *p, struct brw_instruction *insn, bool allocate, bool used, GLuint msg_length, GLuint response_length, bool end_of_thread, bool complete, GLuint offset, GLuint swizzle_control ) argument 542 brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint msg_control, GLuint msg_type, GLuint msg_length, bool header_present, GLuint last_render_target, GLuint response_length, GLuint end_of_thread, GLuint send_commit_msg) argument 601 brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint msg_control, GLuint msg_type, GLuint target_cache, GLuint msg_length, GLuint response_length) argument 658 brw_set_sampler_message(struct brw_compile *p, struct brw_instruction *insn, GLuint binding_table_index, GLuint sampler, GLuint msg_type, GLuint response_length, GLuint msg_length, GLuint header_present, GLuint simd_mode, GLuint return_format) argument 702 struct brw_instruction *insn; local 734 struct brw_instruction *insn = next_insn(p, opcode); local 746 struct brw_instruction *insn = next_insn(p, opcode); local 771 struct brw_instruction *insn = next_insn(p, opcode); local 993 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); local 1012 struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); local 1082 struct brw_instruction *insn; local 1126 struct brw_instruction *insn; local 1285 struct brw_instruction *insn; local 1318 struct brw_instruction *insn = NULL; local 1396 struct brw_instruction *insn; local 1418 struct brw_instruction *insn; local 1434 struct brw_instruction *insn; local 1471 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); local 1524 struct brw_instruction *insn, *do_insn; local 1615 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); local 1640 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); local 1669 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local 1701 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 1729 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local 1785 struct brw_instruction *insn; local 1895 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2002 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2059 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2104 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2136 struct brw_instruction *insn; local 2206 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local 2247 struct brw_instruction *insn; local 2384 struct brw_instruction *insn; local 2439 struct brw_instruction *insn; local 2483 struct brw_instruction *insn = &p->store[ip]; local 2508 struct brw_instruction *insn = &p->store[ip]; local 2535 struct brw_instruction *insn = &p->store[ip]; local 2564 struct brw_instruction *insn; local 2602 struct brw_instruction *insn; local [all...] |
/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
H A D | NormalSsaInsn.java | 22 * A "normal" (non-phi) instruction in SSA form. Always wraps a rop insn. 25 /** {@code non-null;} rop insn that we're wrapping */ 26 private Insn insn; field in class:NormalSsaInsn 31 * @param insn Rop insn to wrap 32 * @param block block that contains this insn 34 NormalSsaInsn(final Insn insn, final SsaBasicBlock block) { argument 35 super(insn.getResult(), block); 36 this.insn = insn; [all...] |
/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
H A D | InstructionCodec.java | 40 @Override public void encode(DecodedInstruction insn, CodeOutput out) { 41 out.write(insn.getOpcodeUnit()); 55 @Override public void encode(DecodedInstruction insn, CodeOutput out) { 56 out.write(insn.getOpcodeUnit()); 72 @Override public void encode(DecodedInstruction insn, CodeOutput out) { 74 codeUnit(insn.getOpcodeUnit(), 75 makeByte(insn.getA(), insn.getB()))); 91 @Override public void encode(DecodedInstruction insn, CodeOutput out) { 93 codeUnit(insn 896 encode(DecodedInstruction insn, CodeOutput out) argument 955 encodeRegisterList(DecodedInstruction insn, CodeOutput out) argument 983 encodeRegisterRange(DecodedInstruction insn, CodeOutput out) argument [all...] |
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/ |
H A D | lc3bbc.c | 65 yasm_lc3b__bc_transform_insn(yasm_bytecode *bc, lc3b_insn *insn) argument 67 yasm_bc_transform(bc, &lc3b_bc_callback_insn, insn); 73 lc3b_insn *insn = (lc3b_insn *)contents; local 74 yasm_value_delete(&insn->imm); 81 const lc3b_insn *insn = (const lc3b_insn *)contents; local 85 if (!insn->imm.abs) 90 yasm_value_print(&insn->imm, f, indent_level); 92 switch (insn->imm_type) { 122 if (insn->origin) { 124 yasm_symrec_print(insn 136 lc3b_insn *insn = (lc3b_insn *)bc->contents; local 173 lc3b_insn *insn = (lc3b_insn *)bc->contents; local [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
H A D | OutputFinisher.java | 110 * @param insn {@code non-null;} instruction to scrutinize 114 private static boolean hasLocalInfo(DalvInsn insn) { argument 115 if (insn instanceof LocalSnapshot) { 116 RegisterSpecSet specs = ((LocalSnapshot) insn).getLocals(); 123 } else if (insn instanceof LocalStart) { 124 RegisterSpec spec = ((LocalStart) insn).getLocal(); 155 for (DalvInsn insn : insns) { 156 addConstants(result, insn); 167 * @param insn {@code non-null;} instruction to scrutinize 170 DalvInsn insn) { 169 addConstants(HashSet<Constant> result, DalvInsn insn) argument 222 add(DalvInsn insn) argument 233 insert(int at, DalvInsn insn) argument 244 updateInfo(DalvInsn insn) argument 314 assignIndices(CstInsn insn, DalvCode.AssignIndicesCallback callback) argument 498 findOpcodeForInsn(DalvInsn insn, Dop guess) argument 523 findExpandedOpcodeForInsn(DalvInsn insn) argument [all...] |
/external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/ |
H A D | insn.c | 37 #include "insn.h" 128 yasm_insn_ops_append(yasm_insn *insn, yasm_insn_operand *op) argument 131 insn->num_operands++; 132 STAILQ_INSERT_TAIL(&insn->operands, op, link); 139 yasm_insn_add_prefix(yasm_insn *insn, uintptr_t prefix) argument 141 insn->prefixes = 142 yasm_xrealloc(insn->prefixes, 143 (insn->num_prefixes+1)*sizeof(uintptr_t)); 144 insn->prefixes[insn 149 yasm_insn_add_seg_prefix(yasm_insn *insn, uintptr_t segreg) argument 158 yasm_insn_initialize(yasm_insn *insn) argument 171 yasm_insn_delete(yasm_insn *insn, void (*ea_destroy) ( yasm_effaddr *)) argument 201 yasm_insn_print(const yasm_insn *insn, FILE *f, int indent_level) argument 236 yasm_insn_finalize(yasm_insn *insn) argument [all...] |