Searched refs:irq (Results 1 - 25 of 112) sorted by relevance

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/external/kernel-headers/original/asm-mips/
H A Dirq.h16 #include <irq.h>
19 static inline int irq_canonicalize(int irq) argument
21 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
24 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
32 extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
35 static inline void smtc_im_ack_irq(unsigned int irq) argument
37 if (irq_hwmask[irq] & ST0_IM)
38 set_c0_status(irq_hwmask[irq]
43 smtc_im_ack_irq(unsigned int irq) argument
[all...]
H A Di8259.h21 #include <irq.h>
40 extern int i8259A_irq_pending(unsigned int irq);
41 extern void make_8259A_irq(unsigned int irq);
52 int irq; local
58 irq = inb(PIC_MASTER_CMD) & 7;
59 if (irq == PIC_CASCADE_IR) {
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
68 if (unlikely(irq == 7)) {
78 irq = -1;
83 return likely(irq >
[all...]
H A Dhardirq.h14 #include <linux/irq.h>
22 extern void ack_bad_irq(unsigned int irq);
H A Dtxx9irq.h12 #include <irq.h>
/external/qemu/hw/
H A Dirq.h10 void qemu_set_irq(qemu_irq irq, int level);
12 static inline void qemu_irq_raise(qemu_irq irq) argument
14 qemu_set_irq(irq, 1);
17 static inline void qemu_irq_lower(qemu_irq irq) argument
19 qemu_set_irq(irq, 0);
22 static inline void qemu_irq_pulse(qemu_irq irq) argument
24 qemu_set_irq(irq, 1);
25 qemu_set_irq(irq, 0);
33 qemu_irq qemu_irq_invert(qemu_irq irq);
H A Dmips_pic.c17 static void mips_cpu_irq_handler(void *opaque, int irq, int level) argument
22 if (irq < 0 || 7 < irq)
24 irq);
26 causebit = 0x00000100 << irq;
H A Dirq.c25 #include "irq.h"
33 void qemu_set_irq(qemu_irq irq, int level) argument
35 if (!irq)
38 irq->handler(irq->opaque, irq->n, level);
67 struct IRQState *irq = opaque; local
69 irq->handler(irq->opaque, irq
72 qemu_irq_invert(qemu_irq irq) argument
[all...]
H A Darm_gic.c52 #define GIC_SET_ENABLED(irq) s->irq_state[irq].enabled = 1
53 #define GIC_CLEAR_ENABLED(irq) s->irq_state[irq].enabled = 0
54 #define GIC_TEST_ENABLED(irq) s->irq_state[irq].enabled
55 #define GIC_SET_PENDING(irq, cm) s->irq_state[irq].pending |= (cm)
56 #define GIC_CLEAR_PENDING(irq, cm) s->irq_state[irq]
107 int irq; local
142 gic_set_pending_private(gic_state *s, int cpu, int irq) argument
155 gic_set_irq(void *opaque, int irq, int level) argument
175 gic_set_running_irq(gic_state *s, int cpu, int irq) argument
205 gic_complete_irq(gic_state * s, int cpu, int irq) argument
245 int irq; local
378 int irq; local
533 int irq; local
[all...]
H A Dmips_int.c21 static void cpu_mips_irq_request(void *opaque, int irq, int level) argument
25 if (irq < 0 || irq > 7)
29 env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
31 env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
43 env->irq[i] = qi[i];
H A Darm_pic.c25 static void arm_pic_cpu_handler(void *opaque, int irq, int level) argument
28 switch (irq) {
42 hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq);
H A Dfdc.h6 fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
9 fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
H A Dgoldfish_device.h24 uint32_t irq; // filled in by goldfish_device_add if 0 member in struct:goldfish_device
29 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level);
37 void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count);
38 int goldfish_device_bus_init(uint32_t base, uint32_t irq);
43 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq);
55 void events_dev_init(uint32_t base, qemu_irq irq);
H A Di8259.c41 uint8_t priority_add; /* highest irq priority */
75 /* set irq level. If an edge is detected, then the IRR is set to 1 */
76 static inline void pic_set_irq1(PicState *s, int irq, int level) argument
79 mask = 1 << irq;
102 number). Return 8 if no irq */
133 /* higher priority found: an irq should be generated */
140 /* raise irq to CPU if necessary. must be called every time the active
141 irq may change */
145 int irq2, irq; local
150 /* if irq reques
184 i8259_set_irq(void *opaque, int irq, int level) argument
213 pic_intack(PicState *s, int irq) argument
228 int irq, irq2, intno; local
289 int priority, cmd, irq; local
[all...]
H A Dgoldfish_device.c44 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level) argument
46 if(irq >= dev->irq_count)
47 cpu_abort (cpu_single_env, "goldfish_device_set_irq: Bad irq %d >= %d\n", irq, dev->irq_count);
49 qemu_set_irq(goldfish_pic[dev->irq + irq], level);
58 if(dev->irq == 0 && dev->irq_count > 0) {
59 dev->irq = goldfish_free_irq;
74 //printf("goldfish_add_device: %s, base %x %x, irq %d %d\n",
75 // dev->name, dev->base, dev->size, dev->irq, de
198 goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count) argument
205 goldfish_device_bus_init(uint32_t base, uint32_t irq) argument
[all...]
/external/kernel-headers/original/linux/
H A Dirq.h22 #include <asm/irq.h>
59 #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
89 unsigned int (*startup)(unsigned int irq);
90 void (*shutdown)(unsigned int irq);
91 void (*enable)(unsigned int irq);
92 void (*disable)(unsigned int irq);
94 void (*ack)(unsigned int irq);
95 void (*mask)(unsigned int irq);
96 void (*mask_ack)(unsigned int irq);
97 void (*unmask)(unsigned int irq);
193 set_native_irq_info(int irq, cpumask_t mask) argument
198 set_native_irq_info(int irq, cpumask_t mask) argument
218 move_irq(int irq) argument
222 set_irq_info(int irq, cpumask_t mask) argument
228 move_irq(int irq) argument
233 set_irq_info(int irq, cpumask_t mask) argument
242 move_irq(int irq) argument
246 move_native_irq(int irq) argument
250 set_pending_irq(unsigned int irq, cpumask_t mask) argument
254 set_irq_info(int irq, cpumask_t mask) argument
271 set_balance_irq_affinity(unsigned int irq, cpumask_t mask) argument
279 select_smp_affinity(unsigned int irq) argument
331 generic_handle_irq(unsigned int irq, struct pt_regs *regs) argument
376 set_irq_handler(unsigned int irq, void fastcall (*handle)(unsigned int, struct irq_desc *, struct pt_regs *)) argument
389 set_irq_chained_handler(unsigned int irq, void fastcall (*handle)(unsigned int, struct irq_desc *, struct pt_regs *)) argument
[all...]
H A Dkernel_stat.h4 #include <asm/irq.h>
22 cputime64_t irq; member in struct:cpu_usage_stat
44 static inline int kstat_irqs(int irq) argument
49 sum += kstat_cpu(cpu).irqs[irq];
H A Dinterrupt.h36 * irq handling routines.
39 * IRQF_SAMPLE_RANDOM - irq is used to feed the random generator
40 * IRQF_SHARED - allow sharing the irq among several devices
74 int irq; member in struct:irqaction
103 extern void disable_irq_nosync(unsigned int irq);
104 extern void disable_irq(unsigned int irq);
105 extern void enable_irq(unsigned int irq);
108 * Special lockdep variants of irq disabling/enabling.
110 * know that a particular irq context which is disabled,
111 * and which is the only irq
118 disable_irq_nosync_lockdep(unsigned int irq) argument
126 disable_irq_lockdep(unsigned int irq) argument
134 enable_irq_lockdep(unsigned int irq) argument
145 enable_irq_wake(unsigned int irq) argument
150 disable_irq_wake(unsigned int irq) argument
[all...]
/external/kernel-headers/original/asm-x86/
H A Di8259.h13 extern void enable_8259A_irq(unsigned int irq);
14 extern void disable_8259A_irq(unsigned int irq);
15 extern unsigned int startup_8259A_irq(unsigned int irq);
H A Dhw_irq_32.h9 * moved some of the old arch/i386/kernel/irq.h to here. VY
17 #include <asm/irq.h>
23 * Various low-level irq details needed by irq.c, process.c,
42 #define platform_legacy_irq(irq) ((irq) < 16)
45 void disable_8259A_irq(unsigned int irq);
46 void enable_8259A_irq(unsigned int irq);
47 int i8259A_irq_pending(unsigned int irq);
48 void make_8259A_irq(unsigned int irq);
[all...]
H A Dirq_32.h5 * linux/include/asm/irq.h
18 static __inline__ int irq_canonicalize(int irq) argument
20 return ((irq == 2) ? 9 : irq);
H A Dhardirq_32.h5 #include <linux/irq.h>
25 void ack_bad_irq(unsigned int irq);
/external/linux-tools-perf/scripts/python/bin/
H A Dnetdev-times-record6 -e irq:irq_handler_entry -e irq:irq_handler_exit \
7 -e irq:softirq_entry -e irq:softirq_exit \
8 -e irq:softirq_raise $@
/external/kernel-headers/original/asm-mips/sibyte/
H A Dsb1250.h49 extern void sb1250_mask_irq(int cpu, int irq);
50 extern void sb1250_unmask_irq(int cpu, int irq);
53 extern void bcm1480_mask_irq(int cpu, int irq);
54 extern void bcm1480_unmask_irq(int cpu, int irq);
/external/kernel-headers/original/asm-arm/
H A Dhw_irq.h7 #include <asm/mach/irq.h>
15 system_timer->dyn_tick->handler(irq, 0, regs); \
/external/linux-tools-perf/scripts/perl/bin/
H A Dcheck-perf-trace-record2 perf record -a -e kmem:kmalloc -e irq:softirq_entry -e kmem:kfree

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