Searched refs:src_bo (Results 1 - 25 of 30) sorted by relevance

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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
H A Dr200_blit.h36 struct radeon_bo *src_bo,
H A Dr200_blit.c359 struct radeon_bo *src_bo,
367 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
443 * @param[in] src_bo source radeon buffer object
444 * @param[in] src_offset offset of the source image in the @a src_bo
464 struct radeon_bo *src_bo,
506 if (src_bo == dst_bo) {
520 src_bo);
532 if (!validate_buffers(r200, src_bo, dst_bo))
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
358 validate_buffers(struct r200_context *r200, struct radeon_bo *src_bo, struct radeon_bo *dst_bo) argument
463 r200_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
H A Dradeon_mipmap_tree.c588 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; local
589 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) {
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.h36 struct radeon_bo *src_bo,
H A Dradeon_blit.c234 struct radeon_bo *src_bo,
242 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
321 * @param[in] src_bo source radeon buffer object
322 * @param[in] src_offset offset of the source image in the @a src_bo
342 struct radeon_bo *src_bo,
384 if (src_bo == dst_bo) {
398 src_bo);
410 if (!validate_buffers(r100, src_bo, dst_bo))
416 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
233 validate_buffers(struct r100_context *r100, struct radeon_bo *src_bo, struct radeon_bo *dst_bo) argument
341 r100_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
H A Dradeon_mipmap_tree.c588 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; local
589 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) {
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_blit.h36 struct radeon_bo *src_bo,
H A Dr200_blit.c359 struct radeon_bo *src_bo,
367 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
443 * @param[in] src_bo source radeon buffer object
444 * @param[in] src_offset offset of the source image in the @a src_bo
464 struct radeon_bo *src_bo,
506 if (src_bo == dst_bo) {
520 src_bo);
532 if (!validate_buffers(r200, src_bo, dst_bo))
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
358 validate_buffers(struct r200_context *r200, struct radeon_bo *src_bo, struct radeon_bo *dst_bo) argument
463 r200_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
H A Dradeon_mipmap_tree.c588 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; local
589 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) {
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_blit.h36 struct radeon_bo *src_bo,
H A Dradeon_blit.c234 struct radeon_bo *src_bo,
242 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
321 * @param[in] src_bo source radeon buffer object
322 * @param[in] src_offset offset of the source image in the @a src_bo
342 struct radeon_bo *src_bo,
384 if (src_bo == dst_bo) {
398 src_bo);
410 if (!validate_buffers(r100, src_bo, dst_bo))
416 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
233 validate_buffers(struct r100_context *r100, struct radeon_bo *src_bo, struct radeon_bo *dst_bo) argument
341 r100_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/
H A Dintel_blit.h69 drm_intel_bo *src_bo,
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
/external/mesa3d/src/mesa/drivers/dri/intel/
H A Dintel_blit.h69 drm_intel_bo *src_bo,
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dintel_blit.c484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
481 intel_emit_linear_blit(struct intel_context *intel, drm_intel_bo *dst_bo, unsigned int dst_offset, drm_intel_bo *src_bo, unsigned int src_offset, unsigned int size) argument
H A Dintel_buffer_objects.c645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);

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