Searched refs:high_reg (Results 1 - 21 of 21) sorted by relevance

/art/compiler/dex/quick/arm/
H A Dint_arm.cc94 OpRegReg(kOpCmp, rl_src1.high_reg, rl_src2.high_reg);
130 int32_t high_reg = rl_src1.high_reg; local
146 NewLIR4(kThumb2OrrRRRs, t_reg, low_reg, high_reg, 0);
151 OpCmpImmBranch(kCondNe, high_reg, val_hi, target);
154 OpCmpImmBranch(kCondLt, high_reg, val_hi, taken);
155 OpCmpImmBranch(kCondGt, high_reg, val_hi, not_taken);
159 OpCmpImmBranch(kCondLt, high_reg, val_hi, taken);
160 OpCmpImmBranch(kCondGt, high_reg, val_h
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H A Dfp_arm.cc114 NewLIR3(op, S2d(rl_result.low_reg, rl_result.high_reg), S2d(rl_src1.low_reg, rl_src1.high_reg),
115 S2d(rl_src2.low_reg, rl_src2.high_reg));
161 src_reg = S2d(rl_src.low_reg, rl_src.high_reg);
168 NewLIR2(op, S2d(rl_result.low_reg, rl_result.high_reg), src_reg);
187 NewLIR2(kThumb2Vcmpd, S2d(rl_src1.low_reg, rl_src2.high_reg),
188 S2d(rl_src2.low_reg, rl_src2.high_reg));
262 NewLIR2(kThumb2Vcmpd, S2d(rl_src1.low_reg, rl_src2.high_reg),
263 S2d(rl_src2.low_reg, rl_src2.high_reg));
300 NewLIR2(kThumb2Vnegd, S2d(rl_result.low_reg, rl_result.high_reg),
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H A Dtarget_arm.cc84 int ArmMir2Lir::S2d(int low_reg, int high_reg) { argument
85 return ARM_S2D(low_reg, high_reg);
514 int high_reg; local
520 high_reg = low_reg + 1;
523 high_reg = AllocTemp();
525 res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
573 if ((rl_free.low_reg != rl_keep.low_reg) && (rl_free.low_reg != rl_keep.high_reg) &&
574 (rl_free.high_reg != rl_keep.low_reg) && (rl_free.high_reg != rl_keep.high_reg)) {
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H A Dcall_arm.cc46 loc.high_reg = loc.low_reg + 1;
73 loc.high_reg = AllocTemp();
74 LoadWordDisp(rARM_SP, start + sizeof(uint32_t), loc.high_reg);
H A Dcodegen_arm.h52 int S2d(int low_reg, int high_reg);
/art/compiler/dex/quick/
H A Dgen_loadstore.cc125 OpRegCopyWide(reg_lo, reg_hi, rl_src.low_reg, rl_src.high_reg);
219 LoadValueDirectWide(rl_src, rl_src.low_reg, rl_src.high_reg);
222 MarkLive(rl_src.high_reg, GetSRegHi(rl_src.s_reg_low));
240 DCHECK_EQ(IsFpReg(rl_src.low_reg), IsFpReg(rl_src.high_reg));
245 IsLive(rl_src.high_reg) ||
247 IsPromoted(rl_src.high_reg) ||
251 OpRegCopyWide(rl_dest.low_reg, rl_dest.high_reg,
252 rl_src.low_reg, rl_src.high_reg);
256 rl_dest.high_reg = rl_src.high_reg;
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H A Dralloc_util.cc206 int high_reg = promotion_map_[p_map_idx+1].FpReg; local
207 if ((high_reg & 1) == 0) {
212 RegisterInfo* p = GetRegInfo(high_reg-1);
542 ResetDef(rl.high_reg); // Only track low of pair
551 RegisterInfo* info_hi = GetRegInfo(rl.high_reg);
580 RegisterInfo* p_high = IsTemp(rl.high_reg);
589 ResetDef(rl.high_reg);
670 void Mir2Lir::MarkPair(int low_reg, int high_reg) { argument
672 RegisterInfo* info_hi = GetRegInfo(high_reg);
674 info_lo->partner = high_reg;
839 int high_reg; local
1071 int high_reg = promotion_map_[p_map_idx+1].FpReg; local
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H A Dgen_invoke.cc304 int high_reg = promotion_map_[lowreg_index + 1].FpReg; local
305 if (((low_reg & 0x1) != 0) || (high_reg != (low_reg + 1))) {
683 reg = rl_arg.high_reg;
700 int high_reg = -1; local
705 high_reg = rl_arg.high_reg;
709 high_reg = TargetReg(kArg3);
710 LoadValueDirectWideFixed(rl_arg, low_reg, high_reg);
719 StoreBaseDispWide(TargetReg(kSp), outs_offset, low_reg, high_reg); local
778 loc.low_reg, loc.high_reg);
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H A Dgen_common.cc178 OpRegRegImm(kOpAsr, rl_result.high_reg, rl_result.low_reg, 31);
399 rl_src.high_reg);
476 rl_result.high_reg, INVALID_SREG);
665 rl_result.high_reg, rl_obj.s_reg_low);
673 LoadBaseDispWide(reg_ptr, 0, rl_result.low_reg, rl_result.high_reg, INVALID_SREG);
727 StoreBaseDispWide(reg_ptr, 0, rl_src.low_reg, rl_src.high_reg);
1167 if ((rl_result.low_reg == rl_src1.high_reg) || (rl_result.low_reg == rl_src2.high_reg)) {
1170 OpRegRegReg(second_op, rl_result.high_reg, rl_src1.high_reg, rl_src
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H A Dmir_to_lir.cc160 LoadConstantWide(rl_result.low_reg, rl_result.high_reg,
167 LoadConstantWide(rl_result.low_reg, rl_result.high_reg, mir->dalvikInsn.vB_wide);
173 LoadConstantWide(rl_result.low_reg, rl_result.high_reg,
H A Dmir_to_lir.h359 void MarkPair(int low_reg, int high_reg);
551 virtual int S2d(int low_reg, int high_reg) = 0;
/art/compiler/dex/quick/x86/
H A Dtarget_x86.cc94 int X86Mir2Lir::S2d(int low_reg, int high_reg) { argument
95 return X86_S2D(low_reg, high_reg);
361 CHECK(res.high_reg == rDX);
366 MarkPair(res.low_reg, res.high_reg);
411 int high_reg; local
417 high_reg = low_reg + 1;
418 res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
423 high_reg = AllocTemp();
424 res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
468 if ((rl_free.low_reg != rl_keep.low_reg) && (rl_free.low_reg != rl_keep.high_reg)
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H A Dfp_x86.cc121 int r_dest = S2d(rl_result.low_reg, rl_result.high_reg);
122 int r_src1 = S2d(rl_src1.low_reg, rl_src1.high_reg);
123 int r_src2 = S2d(rl_src2.low_reg, rl_src2.high_reg);
218 src_reg = S2d(rl_src.low_reg, rl_src.high_reg);
225 NewLIR2(op, S2d(rl_result.low_reg, rl_result.high_reg), src_reg);
247 src_reg1 = S2d(rl_src1.low_reg, rl_src1.high_reg);
249 src_reg2 = S2d(rl_src2.low_reg, rl_src2.high_reg);
297 NewLIR2(kX86UcomisdRR, S2d(rl_src1.low_reg, rl_src1.high_reg),
298 S2d(rl_src2.low_reg, rl_src2.high_reg));
366 OpRegRegImm(kOpAdd, rl_result.high_reg, rl_sr
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H A Dint_x86.cc451 rl_result.high_reg, size, INVALID_SREG);
503 rl_src.high_reg, size, INVALID_SREG);
H A Dcodegen_x86.h53 int S2d(int low_reg, int high_reg);
/art/compiler/dex/quick/mips/
H A Dint_mips.cc50 NewLIR3(kMipsSlt, t0, rl_src1.high_reg, rl_src2.high_reg);
51 NewLIR3(kMipsSlt, t1, rl_src2.high_reg, rl_src1.high_reg);
348 OpRegRegReg(kOpAdd, t_reg, rl_src2.high_reg, rl_src1.high_reg);
349 NewLIR3(kMipsSltu, rl_result.high_reg, rl_result.low_reg, rl_src2.low_reg);
350 OpRegRegReg(kOpAdd, rl_result.high_reg, rl_result.high_reg, t_reg);
371 OpRegRegReg(kOpSub, rl_result.high_reg, rl_src
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H A Dfp_mips.cc114 NewLIR3(op, S2d(rl_result.low_reg, rl_result.high_reg), S2d(rl_src1.low_reg, rl_src1.high_reg),
115 S2d(rl_src2.low_reg, rl_src2.high_reg));
160 src_reg = S2d(rl_src.low_reg, rl_src.high_reg);
167 NewLIR2(op, S2d(rl_result.low_reg, rl_result.high_reg), src_reg);
232 OpRegRegImm(kOpAdd, rl_result.high_reg, rl_src.high_reg, 0x80000000);
H A Dtarget_mips.cc85 int MipsMir2Lir::S2d(int low_reg, int high_reg) { argument
86 return MIPS_S2D(low_reg, high_reg);
435 int high_reg; local
441 high_reg = low_reg + 1;
442 res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
447 high_reg = AllocTemp();
448 res = (low_reg & 0xff) | ((high_reg & 0xff) << 8);
493 if ((rl_free.low_reg != rl_keep.low_reg) && (rl_free.low_reg != rl_keep.high_reg) &&
494 (rl_free.high_reg != rl_keep.low_reg) && (rl_free.high_reg !
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H A Dcodegen_mips.h53 int S2d(int low_reg, int high_reg);
/art/compiler/dex/
H A Dvreg_analysis.cc348 cg->IsFpReg(table[i].high_reg) ? 's' : 'r',
349 table[i].high_reg & cg->FpRegMask(), table[i].s_reg_low);
H A Dmir_graph.h313 uint8_t high_reg; // 2nd physical register (if wide). member in struct:art::RegLocation

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