Searched refs:reg_lo (Results 1 - 8 of 8) sorted by relevance
/art/compiler/dex/quick/ |
H A D | gen_loadstore.cc | 121 void Mir2Lir::LoadValueDirectWide(RegLocation rl_src, int reg_lo, argument 125 OpRegCopyWide(reg_lo, reg_hi, rl_src.low_reg, rl_src.high_reg); 127 LoadConstantWide(reg_lo, reg_hi, mir_graph_->ConstantValueWide(rl_src)); 132 reg_lo, reg_hi, INVALID_SREG); local 141 void Mir2Lir::LoadValueDirectWideFixed(RegLocation rl_src, int reg_lo, argument 143 Clobber(reg_lo); 145 MarkInUse(reg_lo); 147 LoadValueDirectWide(rl_src, reg_lo, reg_hi);
|
H A D | mir_to_lir.h | 512 void LoadValueDirectWide(RegLocation rl_src, int reg_lo, int reg_hi); 513 void LoadValueDirectWideFixed(RegLocation rl_src, int reg_lo, int reg_hi); 614 virtual RegLocation GenDivRem(RegLocation rl_dest, int reg_lo, int reg_hi, 616 virtual RegLocation GenDivRemLit(RegLocation rl_dest, int reg_lo, int lit, 620 virtual void GenDivZeroCheck(int reg_lo, int reg_hi) = 0;
|
/art/compiler/dex/quick/mips/ |
H A D | codegen_mips.h | 116 RegLocation GenDivRem(RegLocation rl_dest, int reg_lo, int reg_hi, bool is_div); 117 RegLocation GenDivRemLit(RegLocation rl_dest, int reg_lo, int lit, bool is_div); 119 void GenDivZeroCheck(int reg_lo, int reg_hi);
|
H A D | int_mips.cc | 298 void MipsMir2Lir::GenDivZeroCheck(int reg_lo, int reg_hi) { argument 300 OpRegRegReg(kOpOr, t_reg, reg_lo, reg_hi);
|
/art/compiler/dex/quick/arm/ |
H A D | codegen_arm.h | 115 RegLocation GenDivRem(RegLocation rl_dest, int reg_lo, int reg_hi, bool is_div); 116 RegLocation GenDivRemLit(RegLocation rl_dest, int reg_lo, int lit, bool is_div); 118 void GenDivZeroCheck(int reg_lo, int reg_hi);
|
H A D | int_arm.cc | 586 void ArmMir2Lir::GenDivZeroCheck(int reg_lo, int reg_hi) { argument 588 NewLIR4(kThumb2OrrRRRs, t_reg, reg_lo, reg_hi, 0);
|
/art/compiler/dex/quick/x86/ |
H A D | codegen_x86.h | 116 RegLocation GenDivRem(RegLocation rl_dest, int reg_lo, int reg_hi, bool is_div); 117 RegLocation GenDivRemLit(RegLocation rl_dest, int reg_lo, int lit, bool is_div); 119 void GenDivZeroCheck(int reg_lo, int reg_hi);
|
H A D | int_x86.cc | 207 RegLocation X86Mir2Lir::GenDivRemLit(RegLocation rl_dest, int reg_lo, argument 213 RegLocation X86Mir2Lir::GenDivRem(RegLocation rl_dest, int reg_lo, argument 279 void X86Mir2Lir::GenDivZeroCheck(int reg_lo, int reg_hi) { argument 281 OpRegRegReg(kOpOr, t_reg, reg_lo, reg_hi);
|
Completed in 178 milliseconds