TargetSchedule.h revision 42bb106118db51393c2524c8b0c7f7ba6674cfd7
199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick//===-- llvm/CodeGen/TargetSchedule.h - Sched Machine Model -----*- C++ -*-===// 299ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// 399ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// The LLVM Compiler Infrastructure 499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// 599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// This file is distributed under the University of Illinois Open Source 699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// License. See LICENSE.TXT for details. 799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// 899ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick//===----------------------------------------------------------------------===// 999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// 1099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// This file defines a wrapper around MCSchedModel that allows the interface to 1199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// benefit from information currently only available in TargetInstrInfo. 121ef65d61d11a9ac038de13e8accdebb7e731d876Andrew Trick// Ideally, the scheduling interface would be fully defined in the MC layer. 1399ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick// 1499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick//===----------------------------------------------------------------------===// 1599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 1699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick#ifndef LLVM_TARGET_TARGETSCHEDMODEL_H 1799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick#define LLVM_TARGET_TARGETSCHEDMODEL_H 1899ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 1999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick#include "llvm/MC/MCSchedule.h" 2099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick#include "llvm/MC/MCInstrItineraries.h" 2199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 2299ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Tricknamespace llvm { 2399ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 2499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickclass TargetRegisterInfo; 2599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickclass TargetSubtargetInfo; 2699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickclass TargetInstrInfo; 2799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickclass MachineInstr; 2899ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 2999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick/// Provide an instruction scheduling machine model to CodeGen passes. 3099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickclass TargetSchedModel { 3199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick // For efficiency, hold a copy of the statically defined MCSchedModel for this 3299ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick // processor. 3399ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick MCSchedModel SchedModel; 3499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick InstrItineraryData InstrItins; 3599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick const TargetSubtargetInfo *STI; 3699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick const TargetInstrInfo *TII; 3799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trickpublic: 3899ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick TargetSchedModel(): STI(0), TII(0) {} 3999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 4099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, 4199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick const TargetInstrInfo *tii); 4299ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 4399ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick const TargetInstrInfo *getInstrInfo() const { return TII; } 4499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 4599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// Return true if this machine model includes an instruction-level scheduling 4699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// model. This is more detailed than the course grain IssueWidth and default 4799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// latency properties, but separate from the per-cycle itinerary data. 4842bb106118db51393c2524c8b0c7f7ba6674cfd7Andrew Trick bool hasInstrSchedModel() const; 4999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 5099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// Return true if this machine model includes cycle-to-cycle itinerary 5199ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick /// data. This models scheduling at each stage in the processor pipeline. 5242bb106118db51393c2524c8b0c7f7ba6674cfd7Andrew Trick bool hasInstrItineraries() const; 5334301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick 5434301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// computeOperandLatency - Compute and return the latency of the given data 5534301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// dependent def and use when the operand indices are already known. UseMI 5634301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// may be NULL for an unknown user. 5734301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// 5834301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// FindMin may be set to get the minimum vs. expected latency. Minimum 5934301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// latency is used for scheduling groups, while expected latency is for 6034301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// instruction cost and critical path. 6134301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, 6234301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick const MachineInstr *UseMI, unsigned UseOperIdx, 6334301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick bool FindMin) const; 6499ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 6599ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick unsigned getProcessorID() const { return SchedModel.getProcessorID(); } 66f43fe1d163b34e1de5d045773728c571b59d1cddJakob Stoklund Olesen unsigned getIssueWidth() const { return SchedModel.IssueWidth; } 6734301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick 6834301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trickprivate: 6934301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// getDefLatency is a helper for computeOperandLatency. Return the 7034301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// instruction's latency if operand lookup is not required. 7134301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// Otherwise return -1. 7234301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick int getDefLatency(const MachineInstr *DefMI, bool FindMin) const; 7334301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick 7434301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick /// Return the MCSchedClassDesc for this instruction. 7534301ceca8913f3126339f332d3dc6f2d7ac0d78Andrew Trick const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const; 7699ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick}; 7799ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 7899ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick} // namespace llvm 7999ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick 8099ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7bAndrew Trick#endif 81