FastISel.cpp revision b01bbdcc1af27bd90b552bb1b62b48916e0d4be3
1b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman///===-- FastISel.cpp - Implementation of the FastISel class --------------===// 2b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 3b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// The LLVM Compiler Infrastructure 4b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 5b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// This file is distributed under the University of Illinois Open Source 6b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// License. See LICENSE.TXT for details. 7b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 8b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman//===----------------------------------------------------------------------===// 9b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 10b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// This file contains the implementation of the FastISel class. 11b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman// 125ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// "Fast" instruction selection is designed to emit very poor code quickly. 135ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// Also, it is not designed to be able to do much lowering, so most illegal 1444d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// types (e.g. i64 on 32-bit targets) and operations are not supported. It is 1544d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// also not intended to be able to do much optimization, except in a few cases 1644d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// where doing optimizations reduces overall compile time. For example, folding 1744d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// constants into immediate fields is often done, because it's cheap and it 1844d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// reduces the number of instructions later phases have to examine. 195ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// 205ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// "Fast" instruction selection is able to fail gracefully and transfer 215ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// control to the SelectionDAG selector for operations that it doesn't 2244d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// support. In many cases, this allows us to avoid duplicating a lot of 235ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// the complicated lowering logic that SelectionDAG currently has. 245ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// 255ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// The intended use for "fast" instruction selection is "-O0" mode 265ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// compilation, where the quality of the generated code is irrelevant when 2744d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// weighed against the speed at which the code can be generated. Also, 285ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// at -O0, the LLVM optimizers are not running, and this makes the 295ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// compile time of codegen a much higher portion of the overall compile 3044d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// time. Despite its limitations, "fast" instruction selection is able to 315ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// handle enough code on its own to provide noticeable overall speedups 325ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// in -O0 compiles. 335ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// 345ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// Basic operations are supported in a target-independent way, by reading 355ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// the same instruction descriptions that the SelectionDAG selector reads, 365ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// and identifying simple arithmetic operations that can be directly selected 3744d2a983b76a2a923e34f3162c960443425cb296Chris Lattner// from simple operators. More complicated operations currently require 385ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// target-specific code. 395ec9efd61bc4214c787287409498e8b78f28c922Dan Gohman// 40b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman//===----------------------------------------------------------------------===// 41b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 4233134c4a75558288d663267c8991f6bd37a530afDan Gohman#include "llvm/Function.h" 4333134c4a75558288d663267c8991f6bd37a530afDan Gohman#include "llvm/GlobalVariable.h" 446f2766d59744bb3d48867f3151643eac7111e773Dan Gohman#include "llvm/Instructions.h" 4533134c4a75558288d663267c8991f6bd37a530afDan Gohman#include "llvm/IntrinsicInst.h" 46b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#include "llvm/CodeGen/FastISel.h" 47b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#include "llvm/CodeGen/MachineInstrBuilder.h" 4833134c4a75558288d663267c8991f6bd37a530afDan Gohman#include "llvm/CodeGen/MachineModuleInfo.h" 49b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#include "llvm/CodeGen/MachineRegisterInfo.h" 5083489bb7700c69b7a4a8da59365c42d3f5c8129bDevang Patel#include "llvm/CodeGen/DwarfWriter.h" 5183489bb7700c69b7a4a8da59365c42d3f5c8129bDevang Patel#include "llvm/Analysis/DebugInfo.h" 5283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng#include "llvm/Target/TargetData.h" 53b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman#include "llvm/Target/TargetInstrInfo.h" 5483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng#include "llvm/Target/TargetLowering.h" 55bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman#include "llvm/Target/TargetMachine.h" 56dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#include "SelectionDAGBuild.h" 57b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanusing namespace llvm; 58b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 593df24e667f04a7003342b534310919abc9c87418Dan Gohmanunsigned FastISel::getRegForValue(Value *V) { 60e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT RealVT = TLI.getValueType(V->getType(), /*AllowUnknown=*/true); 614fd552880c9f42f117bd79929ea0179f99bd6bb7Dan Gohman // Don't handle non-simple values in FastISel. 624fd552880c9f42f117bd79929ea0179f99bd6bb7Dan Gohman if (!RealVT.isSimple()) 634fd552880c9f42f117bd79929ea0179f99bd6bb7Dan Gohman return 0; 64821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman 65c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // Ignore illegal types. We must do this before looking up the value 66c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // in ValueMap because Arguments are given virtual registers regardless 67c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // of whether FastISel can handle them. 68825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT VT = RealVT.getSimpleVT(); 69821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman if (!TLI.isTypeLegal(VT)) { 70825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson // Promote MVT::i1 to a legal type though, because it's common and easy. 71825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (VT == MVT::i1) 7223b9b19b1a5a00faa9fce0788155c7dbfd00bfb1Owen Anderson VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); 73821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman else 74821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman return 0; 75821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman } 76821164875706dd28e48c6cc3cea5c8ffa6e658d1Dan Gohman 77c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // Look up the value to see if we already have a register for it. We 78c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // cache values defined by Instructions across blocks, and other values 79c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // only locally. This is because Instructions already have the SSA 80c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // def-dominatess-use requirement enforced. 81c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman if (ValueMap.count(V)) 82c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman return ValueMap[V]; 83c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman unsigned Reg = LocalValueMap[V]; 84c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman if (Reg != 0) 85c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman return Reg; 86c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman 87ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) { 882ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman if (CI->getValue().getActiveBits() <= 64) 892ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue()); 900586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman } else if (isa<AllocaInst>(V)) { 912ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman Reg = TargetMaterializeAlloca(cast<AllocaInst>(V)); 92205d92589bc8c59d4bba9ddf89e0eb3c4d548cdaDan Gohman } else if (isa<ConstantPointerNull>(V)) { 931e9e8c3bd5ac018296bddb21a2acb8c643303b39Dan Gohman // Translate this as an integer zero so that it can be 941e9e8c3bd5ac018296bddb21a2acb8c643303b39Dan Gohman // local-CSE'd with actual integer zeros. 951d0be15f89cb5056e20e2d24faa8d6afb1573bcaOwen Anderson Reg = 961d0be15f89cb5056e20e2d24faa8d6afb1573bcaOwen Anderson getRegForValue(Constant::getNullValue(TD.getIntPtrType(V->getContext()))); 97ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) { 98104e4ce1629ea84736691bd1ee7867bdf90e8a2eDan Gohman Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF); 99ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 100ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (!Reg) { 101ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman const APFloat &Flt = CF->getValueAPF(); 102e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT IntVT = TLI.getPointerTy(); 103ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 104ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman uint64_t x[2]; 105ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman uint32_t IntBitWidth = IntVT.getSizeInBits(); 10623a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen bool isExact; 10723a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen (void) Flt.convertToInteger(x, IntBitWidth, /*isSigned=*/true, 10823a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen APFloat::rmTowardZero, &isExact); 10923a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen if (isExact) { 1102ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman APInt IntVal(IntBitWidth, 2, x); 111ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 112e922c0201916e0b980ab3cfe91e1413e68d55647Owen Anderson unsigned IntegerReg = 113eed707b1e6097aac2bb6b3d47271f6300ace7f2eOwen Anderson getRegForValue(ConstantInt::get(V->getContext(), IntVal)); 1142ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman if (IntegerReg != 0) 1152ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg); 1162ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman } 117ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 11840b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V)) { 11940b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman if (!SelectOperator(CE, CE->getOpcode())) return 0; 12040b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman Reg = LocalValueMap[CE]; 121205d92589bc8c59d4bba9ddf89e0eb3c4d548cdaDan Gohman } else if (isa<UndefValue>(V)) { 122104e4ce1629ea84736691bd1ee7867bdf90e8a2eDan Gohman Reg = createResultReg(TLI.getRegClassFor(VT)); 1239bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg); 124ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 125d5d81a457b5ff758b3fcc527af38827490bc68a5Owen Anderson 126dceffe66b9e73ce372ea11c0fc6975504eb8c31dDan Gohman // If target-independent code couldn't handle the value, give target-specific 127dceffe66b9e73ce372ea11c0fc6975504eb8c31dDan Gohman // code a try. 1286e6074508c2f781c3e52dfe0e301cb1c7f395a91Owen Anderson if (!Reg && isa<Constant>(V)) 1292ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman Reg = TargetMaterializeConstant(cast<Constant>(V)); 1306e6074508c2f781c3e52dfe0e301cb1c7f395a91Owen Anderson 1312ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman // Don't cache constant materializations in the general ValueMap. 1322ff7fd146159d97abe94391a33b4385abb06bbb0Dan Gohman // To do so would require tracking what uses they dominate. 133dceffe66b9e73ce372ea11c0fc6975504eb8c31dDan Gohman if (Reg != 0) 134dceffe66b9e73ce372ea11c0fc6975504eb8c31dDan Gohman LocalValueMap[V] = Reg; 135104e4ce1629ea84736691bd1ee7867bdf90e8a2eDan Gohman return Reg; 136ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman} 137ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 13859fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Chengunsigned FastISel::lookUpRegForValue(Value *V) { 13959fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng // Look up the value to see if we already have a register for it. We 14059fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng // cache values defined by Instructions across blocks, and other values 14159fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng // only locally. This is because Instructions already have the SSA 14259fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng // def-dominatess-use requirement enforced. 14359fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng if (ValueMap.count(V)) 14459fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng return ValueMap[V]; 14559fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng return LocalValueMap[V]; 14659fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng} 14759fbc80f6b3b5c71dfb84149f589625f7ed510e3Evan Cheng 148cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// UpdateValueMap - Update the value map to include the new mapping for this 149cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// instruction, or insert an extra copy to get the result in a previous 150cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// determined register. 151cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// NOTE: This is only necessary because we might select a block that uses 152cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// a value before we select the block that defines the value. It might be 153cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson/// possible to fix this by selecting blocks in reverse postorder. 154c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattnerunsigned FastISel::UpdateValueMap(Value* I, unsigned Reg) { 15540b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman if (!isa<Instruction>(I)) { 15640b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman LocalValueMap[I] = Reg; 157c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner return Reg; 158c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner } 159c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner 160c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner unsigned &AssignedReg = ValueMap[I]; 161c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner if (AssignedReg == 0) 162c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner AssignedReg = Reg; 16336e3946ac2f30a0bda66538ef2b974b1c8fbdc97Chris Lattner else if (Reg != AssignedReg) { 164c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner const TargetRegisterClass *RegClass = MRI.getRegClass(Reg); 165c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner TII.copyRegToReg(*MBB, MBB->end(), AssignedReg, 166c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner Reg, RegClass, RegClass); 16740b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman } 168c5040ab6065d5c569a1af0848b6e672b22b174b7Chris Lattner return AssignedReg; 169cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson} 170cc54e76cc67bbc9badc024ab29053602769bd255Owen Anderson 171c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohmanunsigned FastISel::getRegForGEPIndex(Value *Idx) { 172c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman unsigned IdxN = getRegForValue(Idx); 173c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman if (IdxN == 0) 174c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // Unhandled operand. Halt "fast" selection and bail. 175c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman return 0; 176c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman 177c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman // If the index is smaller or larger than intptr_t, truncate or extend it. 178766b5efd99c01e26f00f22d81b57d1385b3d2ab0Owen Anderson MVT PtrVT = TLI.getPointerTy(); 179e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false); 180c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman if (IdxVT.bitsLT(PtrVT)) 181766b5efd99c01e26f00f22d81b57d1385b3d2ab0Owen Anderson IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN); 182c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman else if (IdxVT.bitsGT(PtrVT)) 183766b5efd99c01e26f00f22d81b57d1385b3d2ab0Owen Anderson IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN); 184c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman return IdxN; 185c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman} 186c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman 187bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman/// SelectBinaryOp - Select and emit code for a binary operator instruction, 188bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman/// which has an opcode which directly corresponds to the given ISD opcode. 189bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman/// 19040b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohmanbool FastISel::SelectBinaryOp(User *I, ISD::NodeType ISDOpcode) { 191e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT = EVT::getEVT(I->getType(), /*HandleUnknown=*/true); 192825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (VT == MVT::Other || !VT.isSimple()) 193d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman // Unhandled type. Halt "fast" selection and bail. 194d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return false; 195638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman 196b71fea248fd7cf9ab2c5737997a3dc5682948dc4Dan Gohman // We only handle legal types. For example, on x86-32 the instruction 197b71fea248fd7cf9ab2c5737997a3dc5682948dc4Dan Gohman // selector contains all of the 64-bit instructions from x86-64, 198b71fea248fd7cf9ab2c5737997a3dc5682948dc4Dan Gohman // under the assumption that i64 won't be used if the target doesn't 199b71fea248fd7cf9ab2c5737997a3dc5682948dc4Dan Gohman // support it. 200638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman if (!TLI.isTypeLegal(VT)) { 201825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson // MVT::i1 is special. Allow AND, OR, or XOR because they 202638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman // don't require additional zeroing, which makes them easy. 203825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (VT == MVT::i1 && 2045dd9c2e9aea7294c184609aff7f2fe82eaea4eb0Dan Gohman (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || 2055dd9c2e9aea7294c184609aff7f2fe82eaea4eb0Dan Gohman ISDOpcode == ISD::XOR)) 20623b9b19b1a5a00faa9fce0788155c7dbfd00bfb1Owen Anderson VT = TLI.getTypeToTransformTo(I->getContext(), VT); 207638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman else 208638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman return false; 209638c6830c6d0d6871065d2b00178ee4aa7d4d044Dan Gohman } 210d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 2113df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned Op0 = getRegForValue(I->getOperand(0)); 212d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman if (Op0 == 0) 213a7f2dff98e68ed8b2ac32f953768c04f26b52beaDan Gohman // Unhandled operand. Halt "fast" selection and bail. 214a7f2dff98e68ed8b2ac32f953768c04f26b52beaDan Gohman return false; 215a7f2dff98e68ed8b2ac32f953768c04f26b52beaDan Gohman 216d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman // Check if the second operand is a constant and handle it appropriately. 217d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1))) { 218ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman unsigned ResultReg = FastEmit_ri(VT.getSimpleVT(), VT.getSimpleVT(), 219ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ISDOpcode, Op0, CI->getZExtValue()); 220ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (ResultReg != 0) { 221ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // We successfully emitted code for the given LLVM Instruction. 2223df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, ResultReg); 223ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman return true; 224ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 225d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman } 226d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 22710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman // Check if the second operand is a constant float. 22810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman if (ConstantFP *CF = dyn_cast<ConstantFP>(I->getOperand(1))) { 229ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman unsigned ResultReg = FastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), 230ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ISDOpcode, Op0, CF); 231ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (ResultReg != 0) { 232ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // We successfully emitted code for the given LLVM Instruction. 2333df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, ResultReg); 234ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman return true; 235ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 23610df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman } 23710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 2383df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned Op1 = getRegForValue(I->getOperand(1)); 239d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman if (Op1 == 0) 240d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman // Unhandled operand. Halt "fast" selection and bail. 241bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman return false; 242bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 243ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // Now we have both operands in registers. Emit the instruction. 2440f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), 2450f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson ISDOpcode, Op0, Op1); 246bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman if (ResultReg == 0) 247bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman // Target-specific code wasn't able to find a machine opcode for 248bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman // the given ISD opcode and type. Halt "fast" selection and bail. 249bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman return false; 250bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 2518014e865800cc911697a4c0c42f077df9fcc9805Dan Gohman // We successfully emitted code for the given LLVM Instruction. 2523df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, ResultReg); 253bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman return true; 254bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman} 255bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 25640b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohmanbool FastISel::SelectGetElementPtr(User *I) { 2573df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned N = getRegForValue(I->getOperand(0)); 25883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (N == 0) 25983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // Unhandled operand. Halt "fast" selection and bail. 26083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return false; 26183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 26283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng const Type *Ty = I->getOperand(0)->getType(); 263825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT VT = TLI.getPointerTy(); 26483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng for (GetElementPtrInst::op_iterator OI = I->op_begin()+1, E = I->op_end(); 26583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng OI != E; ++OI) { 26683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng Value *Idx = *OI; 26783785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (const StructType *StTy = dyn_cast<StructType>(Ty)) { 26883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng unsigned Field = cast<ConstantInt>(Idx)->getZExtValue(); 26983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (Field) { 27083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // N = N + Offset 27183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng uint64_t Offs = TD.getStructLayout(StTy)->getElementOffset(Field); 27283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // FIXME: This can be optimized by combining the add with a 27383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // subsequent one. 2747a0e6593d03bd2dd21c3ac7dcf189f1da86b16daDan Gohman N = FastEmit_ri_(VT, ISD::ADD, N, Offs, VT); 27583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (N == 0) 27683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // Unhandled operand. Halt "fast" selection and bail. 27783785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return false; 27883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng } 27983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng Ty = StTy->getElementType(Field); 28083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng } else { 28183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng Ty = cast<SequentialType>(Ty)->getElementType(); 28283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 28383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // If this is a constant subscript, handle it quickly. 28483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) { 28583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (CI->getZExtValue() == 0) continue; 28683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng uint64_t Offs = 287777d2306b36816a53bc1ae1244c0dc7d998ae691Duncan Sands TD.getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue(); 2887a0e6593d03bd2dd21c3ac7dcf189f1da86b16daDan Gohman N = FastEmit_ri_(VT, ISD::ADD, N, Offs, VT); 28983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (N == 0) 29083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // Unhandled operand. Halt "fast" selection and bail. 29183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return false; 29283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng continue; 29383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng } 29483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 29583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // N = N + Idx * ElementSize; 296777d2306b36816a53bc1ae1244c0dc7d998ae691Duncan Sands uint64_t ElementSize = TD.getTypeAllocSize(Ty); 297c8a1a3c426209e9c7b35e279e1578a89edc40af6Dan Gohman unsigned IdxN = getRegForGEPIndex(Idx); 29883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (IdxN == 0) 29983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // Unhandled operand. Halt "fast" selection and bail. 30083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return false; 30183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 30280bc6e2243b7ae99da42bf2e61df4ebccf8d8821Dan Gohman if (ElementSize != 1) { 303f93cf79505f07cb97597fbc5955462ad7670ca5cDan Gohman IdxN = FastEmit_ri_(VT, ISD::MUL, IdxN, ElementSize, VT); 30480bc6e2243b7ae99da42bf2e61df4ebccf8d8821Dan Gohman if (IdxN == 0) 30580bc6e2243b7ae99da42bf2e61df4ebccf8d8821Dan Gohman // Unhandled operand. Halt "fast" selection and bail. 30680bc6e2243b7ae99da42bf2e61df4ebccf8d8821Dan Gohman return false; 30780bc6e2243b7ae99da42bf2e61df4ebccf8d8821Dan Gohman } 3080f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson N = FastEmit_rr(VT, VT, ISD::ADD, N, IdxN); 30983785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (N == 0) 31083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // Unhandled operand. Halt "fast" selection and bail. 31183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return false; 31283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng } 31383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng } 31483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 31583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // We successfully emitted code for the given LLVM Instruction. 3163df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, N); 31783785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return true; 318bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman} 319bdedd4477331b3b0d28d74658baf05f675f2d195Dan Gohman 32033134c4a75558288d663267c8991f6bd37a530afDan Gohmanbool FastISel::SelectCall(User *I) { 32133134c4a75558288d663267c8991f6bd37a530afDan Gohman Function *F = cast<CallInst>(I)->getCalledFunction(); 32233134c4a75558288d663267c8991f6bd37a530afDan Gohman if (!F) return false; 32333134c4a75558288d663267c8991f6bd37a530afDan Gohman 32433134c4a75558288d663267c8991f6bd37a530afDan Gohman unsigned IID = F->getIntrinsicID(); 32533134c4a75558288d663267c8991f6bd37a530afDan Gohman switch (IID) { 32633134c4a75558288d663267c8991f6bd37a530afDan Gohman default: break; 32733134c4a75558288d663267c8991f6bd37a530afDan Gohman case Intrinsic::dbg_stoppoint: { 32833134c4a75558288d663267c8991f6bd37a530afDan Gohman DbgStopPointInst *SPI = cast<DbgStopPointInst>(I); 3297e1e31f467d87c834d8baf673929865907901313Devang Patel if (isValidDebugInfoIntrinsic(*SPI, CodeGenOpt::None)) 3307e1e31f467d87c834d8baf673929865907901313Devang Patel setCurDebugLoc(ExtractDebugLocation(*SPI, MF.getDebugLocInfo())); 33133134c4a75558288d663267c8991f6bd37a530afDan Gohman return true; 33233134c4a75558288d663267c8991f6bd37a530afDan Gohman } 33333134c4a75558288d663267c8991f6bd37a530afDan Gohman case Intrinsic::dbg_region_start: { 33433134c4a75558288d663267c8991f6bd37a530afDan Gohman DbgRegionStartInst *RSI = cast<DbgRegionStartInst>(I); 3357e1e31f467d87c834d8baf673929865907901313Devang Patel if (isValidDebugInfoIntrinsic(*RSI, CodeGenOpt::None) && DW 3367e1e31f467d87c834d8baf673929865907901313Devang Patel && DW->ShouldEmitDwarfDebug()) { 337df7d5d317096c342ee1c459139914965008fbcd7Bill Wendling unsigned ID = 338e4b275610a7a05b7ee4c0378a906a6330e4c4ab0Devang Patel DW->RecordRegionStart(RSI->getContext()); 33992c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); 34092c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling BuildMI(MBB, DL, II).addImm(ID); 34192c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling } 34233134c4a75558288d663267c8991f6bd37a530afDan Gohman return true; 34333134c4a75558288d663267c8991f6bd37a530afDan Gohman } 34433134c4a75558288d663267c8991f6bd37a530afDan Gohman case Intrinsic::dbg_region_end: { 34533134c4a75558288d663267c8991f6bd37a530afDan Gohman DbgRegionEndInst *REI = cast<DbgRegionEndInst>(I); 3467e1e31f467d87c834d8baf673929865907901313Devang Patel if (isValidDebugInfoIntrinsic(*REI, CodeGenOpt::None) && DW 3477e1e31f467d87c834d8baf673929865907901313Devang Patel && DW->ShouldEmitDwarfDebug()) { 3481be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel unsigned ID = 0; 349e4b275610a7a05b7ee4c0378a906a6330e4c4ab0Devang Patel DISubprogram Subprogram(REI->getContext()); 3507e1e31f467d87c834d8baf673929865907901313Devang Patel if (isInlinedFnEnd(*REI, MF.getFunction())) { 3511be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel // This is end of an inlined function. 3521be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); 3531be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel ID = DW->RecordInlinedFnEnd(Subprogram); 3548818b8f4437a56fc8f75a134f015c3b807e61f10Devang Patel if (ID) 35502f8c410148ba3b6009ed67df41e2c97c1c07c3aDevang Patel // Returned ID is 0 if this is unbalanced "end of inlined 35602f8c410148ba3b6009ed67df41e2c97c1c07c3aDevang Patel // scope". This could happen if optimizer eats dbg intrinsics 35702f8c410148ba3b6009ed67df41e2c97c1c07c3aDevang Patel // or "beginning of inlined scope" is not recoginized due to 35811a407f43fc0fb21df3156350175eaeeffaf7085Devang Patel // missing location info. In such cases, ignore this region.end. 3598818b8f4437a56fc8f75a134f015c3b807e61f10Devang Patel BuildMI(MBB, DL, II).addImm(ID); 3601be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel } else { 3611be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); 362e4b275610a7a05b7ee4c0378a906a6330e4c4ab0Devang Patel ID = DW->RecordRegionEnd(REI->getContext()); 3631be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel BuildMI(MBB, DL, II).addImm(ID); 3641be3eccecbd2fa50ed9008ffee01f6351df5d8f7Devang Patel } 36592c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling } 36633134c4a75558288d663267c8991f6bd37a530afDan Gohman return true; 36733134c4a75558288d663267c8991f6bd37a530afDan Gohman } 36833134c4a75558288d663267c8991f6bd37a530afDan Gohman case Intrinsic::dbg_func_start: { 36933134c4a75558288d663267c8991f6bd37a530afDan Gohman DbgFuncStartInst *FSI = cast<DbgFuncStartInst>(I); 3707e1e31f467d87c834d8baf673929865907901313Devang Patel if (!isValidDebugInfoIntrinsic(*FSI, CodeGenOpt::None) || !DW 3717e1e31f467d87c834d8baf673929865907901313Devang Patel || !DW->ShouldEmitDwarfDebug()) 37277eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis return true; 3739bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling 3747e1e31f467d87c834d8baf673929865907901313Devang Patel if (isInlinedFnStart(*FSI, MF.getFunction())) { 37577eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis // This is a beginning of an inlined function. 3767e1e31f467d87c834d8baf673929865907901313Devang Patel 37777eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis // If llvm.dbg.func.start is seen in a new block before any 37877eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis // llvm.dbg.stoppoint intrinsic then the location info is unknown. 37977eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis // FIXME : Why DebugLoc is reset at the beginning of each block ? 3806d8f1263f40e6b8fc2cd5cce3dfd9ce99fe09226Devang Patel DebugLoc PrevLoc = DL; 38177eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis if (PrevLoc.isUnknown()) 38277eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis return true; 38377eaa6880b8209acc05de733ebaba5d146c321a0Argyrios Kyrtzidis // Record the source line. 3847e1e31f467d87c834d8baf673929865907901313Devang Patel setCurDebugLoc(ExtractDebugLocation(*FSI, MF.getDebugLocInfo())); 3857e1e31f467d87c834d8baf673929865907901313Devang Patel 3867e1e31f467d87c834d8baf673929865907901313Devang Patel DebugLocTuple PrevLocTpl = MF.getDebugLocTuple(PrevLoc); 387e4b275610a7a05b7ee4c0378a906a6330e4c4ab0Devang Patel DISubprogram SP(FSI->getSubprogram()); 3881619dc3b9ee2573c481591764c2d26d5ff16b483Devang Patel unsigned LabelID = 3891619dc3b9ee2573c481591764c2d26d5ff16b483Devang Patel DW->RecordInlinedFnStart(SP,DICompileUnit(PrevLocTpl.Scope), 3901619dc3b9ee2573c481591764c2d26d5ff16b483Devang Patel PrevLocTpl.Line, PrevLocTpl.Col); 3917e1e31f467d87c834d8baf673929865907901313Devang Patel const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); 3927e1e31f467d87c834d8baf673929865907901313Devang Patel BuildMI(MBB, DL, II).addImm(LabelID); 3936d8f1263f40e6b8fc2cd5cce3dfd9ce99fe09226Devang Patel return true; 39433134c4a75558288d663267c8991f6bd37a530afDan Gohman } 3957e1e31f467d87c834d8baf673929865907901313Devang Patel 3966d8f1263f40e6b8fc2cd5cce3dfd9ce99fe09226Devang Patel // This is a beginning of a new function. 3977e1e31f467d87c834d8baf673929865907901313Devang Patel MF.setDefaultDebugLoc(ExtractDebugLocation(*FSI, MF.getDebugLocInfo())); 3986d8f1263f40e6b8fc2cd5cce3dfd9ce99fe09226Devang Patel 3997e1e31f467d87c834d8baf673929865907901313Devang Patel // llvm.dbg.func_start also defines beginning of function scope. 400e4b275610a7a05b7ee4c0378a906a6330e4c4ab0Devang Patel DW->RecordRegionStart(FSI->getSubprogram()); 40133134c4a75558288d663267c8991f6bd37a530afDan Gohman return true; 40233134c4a75558288d663267c8991f6bd37a530afDan Gohman } 40392c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling case Intrinsic::dbg_declare: { 40492c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling DbgDeclareInst *DI = cast<DbgDeclareInst>(I); 4057e1e31f467d87c834d8baf673929865907901313Devang Patel if (!isValidDebugInfoIntrinsic(*DI, CodeGenOpt::None) || !DW 4067e1e31f467d87c834d8baf673929865907901313Devang Patel || !DW->ShouldEmitDwarfDebug()) 4077e1e31f467d87c834d8baf673929865907901313Devang Patel return true; 40892c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling 4097e1e31f467d87c834d8baf673929865907901313Devang Patel Value *Address = DI->getAddress(); 4107e1e31f467d87c834d8baf673929865907901313Devang Patel if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address)) 4117e1e31f467d87c834d8baf673929865907901313Devang Patel Address = BCI->getOperand(0); 4127e1e31f467d87c834d8baf673929865907901313Devang Patel AllocaInst *AI = dyn_cast<AllocaInst>(Address); 4137e1e31f467d87c834d8baf673929865907901313Devang Patel // Don't handle byval struct arguments or VLAs, for example. 4147e1e31f467d87c834d8baf673929865907901313Devang Patel if (!AI) break; 4157e1e31f467d87c834d8baf673929865907901313Devang Patel DenseMap<const AllocaInst*, int>::iterator SI = 4167e1e31f467d87c834d8baf673929865907901313Devang Patel StaticAllocaMap.find(AI); 4177e1e31f467d87c834d8baf673929865907901313Devang Patel if (SI == StaticAllocaMap.end()) break; // VLAs. 4187e1e31f467d87c834d8baf673929865907901313Devang Patel int FI = SI->second; 419ac1ceb3dd33cb79ecb0dbd64b6abafa7ce067c5fDevang Patel if (MMI) 420ac1ceb3dd33cb79ecb0dbd64b6abafa7ce067c5fDevang Patel MMI->setVariableDbgInfo(DI->getVariable(), FI); 42160b35bd8ecb2c3358b80d8441873cfffa0d27851Devang Patel#ifndef ATTACH_DEBUG_INFO_TO_AN_INSN 42275549f4444cbb14e73c8f10ab90ec36c60413e8eDevang Patel DW->RecordVariable(DI->getVariable(), FI); 42360b35bd8ecb2c3358b80d8441873cfffa0d27851Devang Patel#endif 42433134c4a75558288d663267c8991f6bd37a530afDan Gohman return true; 42592c1e126473dfa93eeb4c9a124af4fedb40f0d5bBill Wendling } 426dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman case Intrinsic::eh_exception: { 427e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT = TLI.getValueType(I->getType()); 428dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman switch (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)) { 429dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman default: break; 430dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman case TargetLowering::Expand: { 431b0f1e1780c736c62fb99e5824825d2a60a53b53bDuncan Sands assert(MBB->isLandingPad() && "Call to eh.exception not in landing pad!"); 432dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned Reg = TLI.getExceptionAddressRegister(); 433dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman const TargetRegisterClass *RC = TLI.getRegClassFor(VT); 434dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned ResultReg = createResultReg(RC); 435dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 436dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman Reg, RC, RC); 437dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman assert(InsertedCopy && "Can't copy address registers!"); 43824ac408ce891321d1a5d62beaf3487efce6f2b22Evan Cheng InsertedCopy = InsertedCopy; 439dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman UpdateValueMap(I, ResultReg); 440dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman return true; 441dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 442dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 443dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman break; 444dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 445b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands case Intrinsic::eh_selector: { 446e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT = TLI.getValueType(I->getType()); 447dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman switch (TLI.getOperationAction(ISD::EHSELECTION, VT)) { 448dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman default: break; 449dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman case TargetLowering::Expand: { 450dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman if (MMI) { 451dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman if (MBB->isLandingPad()) 452dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman AddCatchInfo(*cast<CallInst>(I), MMI, MBB); 453dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman else { 454dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#ifndef NDEBUG 455dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman CatchInfoLost.insert(cast<CallInst>(I)); 456dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#endif 457dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman // FIXME: Mark exception selector register as live in. Hack for PR1508. 458dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned Reg = TLI.getExceptionSelectorRegister(); 459dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman if (Reg) MBB->addLiveIn(Reg); 460dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 461dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman 462dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned Reg = TLI.getExceptionSelectorRegister(); 463b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands EVT SrcVT = TLI.getPointerTy(); 464b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands const TargetRegisterClass *RC = TLI.getRegClassFor(SrcVT); 465dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned ResultReg = createResultReg(RC); 466b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, Reg, 467b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands RC, RC); 468dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman assert(InsertedCopy && "Can't copy address registers!"); 46924ac408ce891321d1a5d62beaf3487efce6f2b22Evan Cheng InsertedCopy = InsertedCopy; 470b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands 471b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands // Cast the register to the type of the selector. 472b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands if (SrcVT.bitsGT(MVT::i32)) 473b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCATE, 474b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands ResultReg); 475b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands else if (SrcVT.bitsLT(MVT::i32)) 476b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands ResultReg = FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, 477b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands ISD::SIGN_EXTEND, ResultReg); 478b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands if (ResultReg == 0) 479b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands // Unhandled operand. Halt "fast" selection and bail. 480b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands return false; 481b01bbdcc1af27bd90b552bb1b62b48916e0d4be3Duncan Sands 482dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman UpdateValueMap(I, ResultReg); 483dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } else { 484dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman unsigned ResultReg = 485a7235ea7245028a0723e8ab7fd011386b3900777Owen Anderson getRegForValue(Constant::getNullValue(I->getType())); 486dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman UpdateValueMap(I, ResultReg); 487dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 488dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman return true; 489dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 490dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 491dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman break; 492dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman } 49333134c4a75558288d663267c8991f6bd37a530afDan Gohman } 49433134c4a75558288d663267c8991f6bd37a530afDan Gohman return false; 49533134c4a75558288d663267c8991f6bd37a530afDan Gohman} 49633134c4a75558288d663267c8991f6bd37a530afDan Gohman 49740b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohmanbool FastISel::SelectCast(User *I, ISD::NodeType Opcode) { 498e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); 499e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT DstVT = TLI.getValueType(I->getType()); 500d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 501825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (SrcVT == MVT::Other || !SrcVT.isSimple() || 502825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson DstVT == MVT::Other || !DstVT.isSimple()) 503d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson // Unhandled type. Halt "fast" selection and bail. 504d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 505d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 506474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // Check if the destination type is legal. Or as a special case, 507474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // it may be i1 if we're doing a truncate because that's 508474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // easy and somewhat common. 509474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman if (!TLI.isTypeLegal(DstVT)) 510825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (DstVT != MVT::i1 || Opcode != ISD::TRUNCATE) 511474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // Unhandled type. Halt "fast" selection and bail. 512474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman return false; 513474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman 51491b6f97ce4273fee5516692e3f27cd76d67986fcDan Gohman // Check if the source operand is legal. Or as a special case, 51591b6f97ce4273fee5516692e3f27cd76d67986fcDan Gohman // it may be i1 if we're doing zero-extension because that's 516474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // easy and somewhat common. 517474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman if (!TLI.isTypeLegal(SrcVT)) 518825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (SrcVT != MVT::i1 || Opcode != ISD::ZERO_EXTEND) 51991b6f97ce4273fee5516692e3f27cd76d67986fcDan Gohman // Unhandled type. Halt "fast" selection and bail. 52091b6f97ce4273fee5516692e3f27cd76d67986fcDan Gohman return false; 521474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman 5223df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned InputReg = getRegForValue(I->getOperand(0)); 523d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson if (!InputReg) 524d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson // Unhandled operand. Halt "fast" selection and bail. 525d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 52614ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman 52714ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman // If the operand is i1, arrange for the high bits in the register to be zero. 528825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (SrcVT == MVT::i1) { 52923b9b19b1a5a00faa9fce0788155c7dbfd00bfb1Owen Anderson SrcVT = TLI.getTypeToTransformTo(I->getContext(), SrcVT); 53014ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman InputReg = FastEmitZExtFromI1(SrcVT.getSimpleVT(), InputReg); 53114ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman if (!InputReg) 53214ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman return false; 53314ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman } 534474d3b3f40e117a66946e9fb9d2016b4c05caef0Dan Gohman // If the result is i1, truncate to the target's type for i1 first. 535825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (DstVT == MVT::i1) 53623b9b19b1a5a00faa9fce0788155c7dbfd00bfb1Owen Anderson DstVT = TLI.getTypeToTransformTo(I->getContext(), DstVT); 53714ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman 538d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson unsigned ResultReg = FastEmit_r(SrcVT.getSimpleVT(), 539d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson DstVT.getSimpleVT(), 540d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson Opcode, 541d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson InputReg); 542d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson if (!ResultReg) 543d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 544d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 5453df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, ResultReg); 546d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return true; 547d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson} 548d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 54940b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohmanbool FastISel::SelectBitCast(User *I) { 550ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // If the bitcast doesn't change the type, just use the operand value. 551ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (I->getType() == I->getOperand(0)->getType()) { 5523df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned Reg = getRegForValue(I->getOperand(0)); 553a318dabc0edbcc7a2b54d99b026a093361ec14fcDan Gohman if (Reg == 0) 554a318dabc0edbcc7a2b54d99b026a093361ec14fcDan Gohman return false; 5553df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, Reg); 556ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman return true; 557ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 558ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 559ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // Bitcasts of other values become reg-reg copies or BIT_CONVERT operators. 560e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); 561e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT DstVT = TLI.getValueType(I->getType()); 562d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 563825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson if (SrcVT == MVT::Other || !SrcVT.isSimple() || 564825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson DstVT == MVT::Other || !DstVT.isSimple() || 565d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson !TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT)) 566d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson // Unhandled type. Halt "fast" selection and bail. 567d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 568d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 5693df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned Op0 = getRegForValue(I->getOperand(0)); 570ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (Op0 == 0) 571ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // Unhandled operand. Halt "fast" selection and bail. 572d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 573d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 574ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // First, try to perform the bitcast by inserting a reg-reg copy. 575ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman unsigned ResultReg = 0; 576ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) { 577ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT); 578ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT); 579ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ResultReg = createResultReg(DstClass); 580ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 581ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 582ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman Op0, DstClass, SrcClass); 583ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (!InsertedCopy) 584ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ResultReg = 0; 585ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman } 586ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 587ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman // If the reg-reg copy failed, select a BIT_CONVERT opcode. 588ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (!ResultReg) 589ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ResultReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), 590ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman ISD::BIT_CONVERT, Op0); 591ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman 592ad368ac2b5f303050e9aaa357e2b806fae38f81bDan Gohman if (!ResultReg) 593d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return false; 594d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 5953df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, ResultReg); 596d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson return true; 597d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson} 598d0533c9998d3baf41848ba559a9b2f2c65296d14Owen Anderson 5993df24e667f04a7003342b534310919abc9c87418Dan Gohmanbool 6003df24e667f04a7003342b534310919abc9c87418Dan GohmanFastISel::SelectInstruction(Instruction *I) { 60140b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman return SelectOperator(I, I->getOpcode()); 60240b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman} 60340b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman 604d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman/// FastEmitBranch - Emit an unconditional branch to the given block, 605d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman/// unless it is the immediate (fall-through) successor, and update 606d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman/// the CFG. 607d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohmanvoid 608d98d6203e429b2d7208b6687931e9079e85e95ecDan GohmanFastISel::FastEmitBranch(MachineBasicBlock *MSucc) { 609d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman MachineFunction::iterator NextMBB = 610d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman next(MachineFunction::iterator(MBB)); 611d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman 612d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman if (MBB->isLayoutSuccessor(MSucc)) { 613d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman // The unconditional fall-through case, which needs no instructions. 614d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman } else { 615d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman // The unconditional branch case. 616d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman TII.InsertBranch(*MBB, MSucc, NULL, SmallVector<MachineOperand, 0>()); 617d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman } 618d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman MBB->addSuccessor(MSucc); 619d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman} 620d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman 6213d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman/// SelectFNeg - Emit an FNeg operation. 6223d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman/// 6233d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohmanbool 6243d45a853db014fdddcdb79424e663dfed5eccbc7Dan GohmanFastISel::SelectFNeg(User *I) { 6253d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); 6263d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman if (OpReg == 0) return false; 6273d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman 6284a215a13c3035a8818254b61267be77def4a2a37Dan Gohman // If the target has ISD::FNEG, use it. 6294a215a13c3035a8818254b61267be77def4a2a37Dan Gohman EVT VT = TLI.getValueType(I->getType()); 6304a215a13c3035a8818254b61267be77def4a2a37Dan Gohman unsigned ResultReg = FastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), 6314a215a13c3035a8818254b61267be77def4a2a37Dan Gohman ISD::FNEG, OpReg); 6324a215a13c3035a8818254b61267be77def4a2a37Dan Gohman if (ResultReg != 0) { 6334a215a13c3035a8818254b61267be77def4a2a37Dan Gohman UpdateValueMap(I, ResultReg); 6344a215a13c3035a8818254b61267be77def4a2a37Dan Gohman return true; 6354a215a13c3035a8818254b61267be77def4a2a37Dan Gohman } 6364a215a13c3035a8818254b61267be77def4a2a37Dan Gohman 6375e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman // Bitcast the value to integer, twiddle the sign bit with xor, 6385e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman // and then bitcast it back to floating-point. 6393d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman if (VT.getSizeInBits() > 64) return false; 6405e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); 6415e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman if (!TLI.isTypeLegal(IntVT)) 6425e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman return false; 6435e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman 6445e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman unsigned IntReg = FastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), 6455e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman ISD::BIT_CONVERT, OpReg); 6465e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman if (IntReg == 0) 6475e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman return false; 6485e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman 6495e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman unsigned IntResultReg = FastEmit_ri_(IntVT.getSimpleVT(), ISD::XOR, IntReg, 6505e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman UINT64_C(1) << (VT.getSizeInBits()-1), 6515e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman IntVT.getSimpleVT()); 6525e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman if (IntResultReg == 0) 6535e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman return false; 6545e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman 6555e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman ResultReg = FastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), 6565e5abb77fe9eeb92a55f119fdb721bca4508094aDan Gohman ISD::BIT_CONVERT, IntResultReg); 6573d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman if (ResultReg == 0) 6583d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman return false; 6593d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman 6603d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman UpdateValueMap(I, ResultReg); 6613d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman return true; 6623d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman} 6633d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman 66440b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohmanbool 66540b189e4e257924d90aaf63bf2e12bc7bbca961aDan GohmanFastISel::SelectOperator(User *I, unsigned Opcode) { 66640b189e4e257924d90aaf63bf2e12bc7bbca961aDan Gohman switch (Opcode) { 667ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::Add: 668ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::ADD); 669ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::FAdd: 670ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::FADD); 671ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::Sub: 672ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::SUB); 673ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::FSub: 6743d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman // FNeg is currently represented in LLVM IR as a special case of FSub. 6753d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman if (BinaryOperator::isFNeg(I)) 6763d45a853db014fdddcdb79424e663dfed5eccbc7Dan Gohman return SelectFNeg(I); 677ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::FSUB); 678ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::Mul: 679ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::MUL); 680ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman case Instruction::FMul: 681ae3a0be92e33bc716722aa600983fc1535acb122Dan Gohman return SelectBinaryOp(I, ISD::FMUL); 6823df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::SDiv: 6833df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::SDIV); 6843df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::UDiv: 6853df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::UDIV); 6863df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::FDiv: 6873df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::FDIV); 6883df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::SRem: 6893df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::SREM); 6903df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::URem: 6913df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::UREM); 6923df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::FRem: 6933df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::FREM); 6943df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::Shl: 6953df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::SHL); 6963df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::LShr: 6973df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::SRL); 6983df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::AShr: 6993df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::SRA); 7003df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::And: 7013df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::AND); 7023df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::Or: 7033df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::OR); 7043df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::Xor: 7053df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBinaryOp(I, ISD::XOR); 7063df24e667f04a7003342b534310919abc9c87418Dan Gohman 7073df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::GetElementPtr: 7083df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectGetElementPtr(I); 7093df24e667f04a7003342b534310919abc9c87418Dan Gohman 7103df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::Br: { 7113df24e667f04a7003342b534310919abc9c87418Dan Gohman BranchInst *BI = cast<BranchInst>(I); 7123df24e667f04a7003342b534310919abc9c87418Dan Gohman 7133df24e667f04a7003342b534310919abc9c87418Dan Gohman if (BI->isUnconditional()) { 7143df24e667f04a7003342b534310919abc9c87418Dan Gohman BasicBlock *LLVMSucc = BI->getSuccessor(0); 7153df24e667f04a7003342b534310919abc9c87418Dan Gohman MachineBasicBlock *MSucc = MBBMap[LLVMSucc]; 716d98d6203e429b2d7208b6687931e9079e85e95ecDan Gohman FastEmitBranch(MSucc); 7173df24e667f04a7003342b534310919abc9c87418Dan Gohman return true; 7189d5b41624003daf259b33fc953aa471049700353Owen Anderson } 7193df24e667f04a7003342b534310919abc9c87418Dan Gohman 7203df24e667f04a7003342b534310919abc9c87418Dan Gohman // Conditional branches are not handed yet. 7213df24e667f04a7003342b534310919abc9c87418Dan Gohman // Halt "fast" selection and bail. 7223df24e667f04a7003342b534310919abc9c87418Dan Gohman return false; 723b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman } 724b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 725087c8507e592bbbede1746f07bd44b28559e3684Dan Gohman case Instruction::Unreachable: 726087c8507e592bbbede1746f07bd44b28559e3684Dan Gohman // Nothing to emit. 727087c8507e592bbbede1746f07bd44b28559e3684Dan Gohman return true; 728087c8507e592bbbede1746f07bd44b28559e3684Dan Gohman 7293df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::PHI: 7303df24e667f04a7003342b534310919abc9c87418Dan Gohman // PHI nodes are already emitted. 7313df24e667f04a7003342b534310919abc9c87418Dan Gohman return true; 7320586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman 7330586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman case Instruction::Alloca: 7340586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman // FunctionLowering has the static-sized case covered. 7350586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman if (StaticAllocaMap.count(cast<AllocaInst>(I))) 7360586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman return true; 7370586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman 7380586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman // Dynamic-sized alloca is not handled yet. 7390586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman return false; 7403df24e667f04a7003342b534310919abc9c87418Dan Gohman 74133134c4a75558288d663267c8991f6bd37a530afDan Gohman case Instruction::Call: 74233134c4a75558288d663267c8991f6bd37a530afDan Gohman return SelectCall(I); 74333134c4a75558288d663267c8991f6bd37a530afDan Gohman 7443df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::BitCast: 7453df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectBitCast(I); 7463df24e667f04a7003342b534310919abc9c87418Dan Gohman 7473df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::FPToSI: 7483df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::FP_TO_SINT); 7493df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::ZExt: 7503df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::ZERO_EXTEND); 7513df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::SExt: 7523df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::SIGN_EXTEND); 7533df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::Trunc: 7543df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::TRUNCATE); 7553df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::SIToFP: 7563df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::SINT_TO_FP); 7573df24e667f04a7003342b534310919abc9c87418Dan Gohman 7583df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::IntToPtr: // Deliberate fall-through. 7593df24e667f04a7003342b534310919abc9c87418Dan Gohman case Instruction::PtrToInt: { 760e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()); 761e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT DstVT = TLI.getValueType(I->getType()); 7623df24e667f04a7003342b534310919abc9c87418Dan Gohman if (DstVT.bitsGT(SrcVT)) 7633df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::ZERO_EXTEND); 7643df24e667f04a7003342b534310919abc9c87418Dan Gohman if (DstVT.bitsLT(SrcVT)) 7653df24e667f04a7003342b534310919abc9c87418Dan Gohman return SelectCast(I, ISD::TRUNCATE); 7663df24e667f04a7003342b534310919abc9c87418Dan Gohman unsigned Reg = getRegForValue(I->getOperand(0)); 7673df24e667f04a7003342b534310919abc9c87418Dan Gohman if (Reg == 0) return false; 7683df24e667f04a7003342b534310919abc9c87418Dan Gohman UpdateValueMap(I, Reg); 7693df24e667f04a7003342b534310919abc9c87418Dan Gohman return true; 7703df24e667f04a7003342b534310919abc9c87418Dan Gohman } 771d57dd5f4e6740520820bc0fca42a540e31c27a73Dan Gohman 7723df24e667f04a7003342b534310919abc9c87418Dan Gohman default: 7733df24e667f04a7003342b534310919abc9c87418Dan Gohman // Unhandled instruction. Halt "fast" selection and bail. 7743df24e667f04a7003342b534310919abc9c87418Dan Gohman return false; 7753df24e667f04a7003342b534310919abc9c87418Dan Gohman } 776b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 777b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 7783df24e667f04a7003342b534310919abc9c87418Dan GohmanFastISel::FastISel(MachineFunction &mf, 779d57dd5f4e6740520820bc0fca42a540e31c27a73Dan Gohman MachineModuleInfo *mmi, 78083489bb7700c69b7a4a8da59365c42d3f5c8129bDevang Patel DwarfWriter *dw, 7813df24e667f04a7003342b534310919abc9c87418Dan Gohman DenseMap<const Value *, unsigned> &vm, 7820586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman DenseMap<const BasicBlock *, MachineBasicBlock *> &bm, 783dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman DenseMap<const AllocaInst *, int> &am 784dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#ifndef NDEBUG 785dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman , SmallSet<Instruction*, 8> &cil 786dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#endif 787dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman ) 7883df24e667f04a7003342b534310919abc9c87418Dan Gohman : MBB(0), 7893df24e667f04a7003342b534310919abc9c87418Dan Gohman ValueMap(vm), 7903df24e667f04a7003342b534310919abc9c87418Dan Gohman MBBMap(bm), 7910586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman StaticAllocaMap(am), 792dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#ifndef NDEBUG 793dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman CatchInfoLost(cil), 794dd5b58ad7be78be90390074f0df138778af5c895Dan Gohman#endif 7953df24e667f04a7003342b534310919abc9c87418Dan Gohman MF(mf), 796d57dd5f4e6740520820bc0fca42a540e31c27a73Dan Gohman MMI(mmi), 79783489bb7700c69b7a4a8da59365c42d3f5c8129bDevang Patel DW(dw), 7983df24e667f04a7003342b534310919abc9c87418Dan Gohman MRI(MF.getRegInfo()), 7990586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman MFI(*MF.getFrameInfo()), 8000586d91bb3e516d5826826522d9a90ed6ef74d86Dan Gohman MCP(*MF.getConstantPool()), 8013df24e667f04a7003342b534310919abc9c87418Dan Gohman TM(MF.getTarget()), 80222bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohman TD(*TM.getTargetData()), 80322bb31103de3337f0bb74c7bee16d1817d4dca14Dan Gohman TII(*TM.getInstrInfo()), 804e922c0201916e0b980ab3cfe91e1413e68d55647Owen Anderson TLI(*TM.getTargetLowering()) { 805bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman} 806bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman 807e285a74f7cf9dd3ccf4fe758576cf83301f8a43eDan GohmanFastISel::~FastISel() {} 808e285a74f7cf9dd3ccf4fe758576cf83301f8a43eDan Gohman 809825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_(MVT, MVT, 81036fd941fc029c6ea50ed08d26a2bfe4932b9789cEvan Cheng ISD::NodeType) { 811b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return 0; 812b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 813b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 814825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_r(MVT, MVT, 8150f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson ISD::NodeType, unsigned /*Op0*/) { 816b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return 0; 817b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 818b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 819825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_rr(MVT, MVT, 8200f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson ISD::NodeType, unsigned /*Op0*/, 8210f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson unsigned /*Op0*/) { 822b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return 0; 823b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 824b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 825825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_i(MVT, MVT, ISD::NodeType, uint64_t /*Imm*/) { 82683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return 0; 82783785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng} 82883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 829825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_f(MVT, MVT, 83010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman ISD::NodeType, ConstantFP * /*FPImm*/) { 83110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return 0; 83210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman} 83310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 834825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_ri(MVT, MVT, 8350f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson ISD::NodeType, unsigned /*Op0*/, 8360f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson uint64_t /*Imm*/) { 837d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return 0; 838d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman} 839d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 840825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_rf(MVT, MVT, 84110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman ISD::NodeType, unsigned /*Op0*/, 84210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman ConstantFP * /*FPImm*/) { 84310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return 0; 84410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman} 84510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 846825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_rri(MVT, MVT, 8470f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson ISD::NodeType, 848d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned /*Op0*/, unsigned /*Op1*/, 849d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman uint64_t /*Imm*/) { 85083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return 0; 85183785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng} 85283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 85383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng/// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries 85483785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng/// to emit an instruction with an immediate operand using FastEmit_ri. 85583785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng/// If that fails, it materializes the immediate into a register and try 85683785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng/// FastEmit_rr instead. 857825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_ri_(MVT VT, ISD::NodeType Opcode, 858d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned Op0, uint64_t Imm, 859825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT ImmType) { 86083785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng // First check if immediate type is legal. If not, we can't use the ri form. 861151ed61a2f9c3482d35a54d502e7cd147f22a21bDan Gohman unsigned ResultReg = FastEmit_ri(VT, VT, Opcode, Op0, Imm); 86283785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng if (ResultReg != 0) 86383785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng return ResultReg; 8640f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson unsigned MaterialReg = FastEmit_i(ImmType, ImmType, ISD::Constant, Imm); 865d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman if (MaterialReg == 0) 866d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return 0; 8670f84e4e31009eecf2dfcbe6113b65d0919f30254Owen Anderson return FastEmit_rr(VT, VT, Opcode, Op0, MaterialReg); 868d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman} 869d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 87010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman/// FastEmit_rf_ - This method is a wrapper of FastEmit_ri. It first tries 87110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman/// to emit an instruction with a floating-point immediate operand using 87210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman/// FastEmit_rf. If that fails, it materializes the immediate into a register 87310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman/// and try FastEmit_rr instead. 874825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmit_rf_(MVT VT, ISD::NodeType Opcode, 87510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned Op0, ConstantFP *FPImm, 876825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Anderson MVT ImmType) { 87710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman // First check if immediate type is legal. If not, we can't use the rf form. 878151ed61a2f9c3482d35a54d502e7cd147f22a21bDan Gohman unsigned ResultReg = FastEmit_rf(VT, VT, Opcode, Op0, FPImm); 87910df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman if (ResultReg != 0) 88010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return ResultReg; 88110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 88210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman // Materialize the constant in a register. 88310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned MaterialReg = FastEmit_f(ImmType, ImmType, ISD::ConstantFP, FPImm); 88410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman if (MaterialReg == 0) { 88596a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // If the target doesn't have a way to directly enter a floating-point 88696a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // value into a register, use an alternate approach. 88796a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // TODO: The current approach only supports floating-point constants 88896a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // that can be constructed by conversion from integer values. This should 88996a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // be replaced by code that creates a load from a constant-pool entry, 89096a9999d79345fa7bc7e2f2a3f28edef4c69e6b5Dan Gohman // which will require some target-specific work. 89110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman const APFloat &Flt = FPImm->getValueAPF(); 892e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT IntVT = TLI.getPointerTy(); 89310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 89410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman uint64_t x[2]; 89510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman uint32_t IntBitWidth = IntVT.getSizeInBits(); 89623a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen bool isExact; 89723a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen (void) Flt.convertToInteger(x, IntBitWidth, /*isSigned=*/true, 89823a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen APFloat::rmTowardZero, &isExact); 89923a98551ab65eeb8fe5019df8b7db4891582a4bdDale Johannesen if (!isExact) 90010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return 0; 90110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman APInt IntVal(IntBitWidth, 2, x); 90210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 90310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned IntegerReg = FastEmit_i(IntVT.getSimpleVT(), IntVT.getSimpleVT(), 90410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman ISD::Constant, IntVal.getZExtValue()); 90510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman if (IntegerReg == 0) 90610df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return 0; 90710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman MaterialReg = FastEmit_r(IntVT.getSimpleVT(), VT, 90810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman ISD::SINT_TO_FP, IntegerReg); 90910df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman if (MaterialReg == 0) 91010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return 0; 91110df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman } 91210df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return FastEmit_rr(VT, VT, Opcode, Op0, MaterialReg); 91310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman} 91410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 915d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohmanunsigned FastISel::createResultReg(const TargetRegisterClass* RC) { 916d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return MRI.createVirtualRegister(RC); 91783785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng} 91883785c80968165b30fcdd111ceb2c28d38bcff86Evan Cheng 919b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanunsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode, 92077ad79689d755c49146f534107421cb3d9703fedDan Gohman const TargetRegisterClass* RC) { 921d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned ResultReg = createResultReg(RC); 922bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 923b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 9249bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg); 925b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return ResultReg; 926b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 927b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 928b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanunsigned FastISel::FastEmitInst_r(unsigned MachineInstOpcode, 929b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman const TargetRegisterClass *RC, 930b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman unsigned Op0) { 931d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned ResultReg = createResultReg(RC); 932bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 933b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 9345960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 9359bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0); 9365960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 9379bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0); 9385960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 9395960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 9405960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 9415960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 9425960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 9435960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng 944b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return ResultReg; 945b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 946b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 947b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohmanunsigned FastISel::FastEmitInst_rr(unsigned MachineInstOpcode, 948b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman const TargetRegisterClass *RC, 949b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman unsigned Op0, unsigned Op1) { 950d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned ResultReg = createResultReg(RC); 951bb466331e7e50d03497ce40ee344870236fd9c32Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 952b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman 9535960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 9549bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1); 9555960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 9569bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1); 9575960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 9585960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 9595960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 9605960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 9615960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 962b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman return ResultReg; 963b0cf29c5cfff797284b3660dc233e135feb65d9aDan Gohman} 964d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 965d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohmanunsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, 966d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetRegisterClass *RC, 967d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned Op0, uint64_t Imm) { 968d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned ResultReg = createResultReg(RC); 969d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 970d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 9715960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 9729bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Imm); 9735960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 9749bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0).addImm(Imm); 9755960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 9765960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 9775960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 9785960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 9795960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 980d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return ResultReg; 981d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman} 982d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 98310df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohmanunsigned FastISel::FastEmitInst_rf(unsigned MachineInstOpcode, 98410df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman const TargetRegisterClass *RC, 98510df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned Op0, ConstantFP *FPImm) { 98610df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman unsigned ResultReg = createResultReg(RC); 98710df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 98810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 9895960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 9909bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addFPImm(FPImm); 9915960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 9929bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0).addFPImm(FPImm); 9935960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 9945960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 9955960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 9965960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 9975960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 99810df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman return ResultReg; 99910df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman} 100010df0fa73e396bbc93a8940e8b53827390c54d10Dan Gohman 1001d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohmanunsigned FastISel::FastEmitInst_rri(unsigned MachineInstOpcode, 1002d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetRegisterClass *RC, 1003d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned Op0, unsigned Op1, uint64_t Imm) { 1004d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman unsigned ResultReg = createResultReg(RC); 1005d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman const TargetInstrDesc &II = TII.get(MachineInstOpcode); 1006d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman 10075960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 10089bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm); 10095960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 10109bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1).addImm(Imm); 10115960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 10125960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 10135960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 10145960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 10155960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 1016d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman return ResultReg; 1017d5fe57d2f980c6bd1a61450f99c254a76d0f1683Dan Gohman} 10186d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson 10196d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Andersonunsigned FastISel::FastEmitInst_i(unsigned MachineInstOpcode, 10206d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson const TargetRegisterClass *RC, 10216d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson uint64_t Imm) { 10226d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson unsigned ResultReg = createResultReg(RC); 10236d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson const TargetInstrDesc &II = TII.get(MachineInstOpcode); 10246d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson 10255960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 10269bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addImm(Imm); 10275960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 10289bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addImm(Imm); 10295960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 10305960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 10315960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 10325960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 10335960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 10346d0c25ec3a7ca822e68f73a4481eee43eb5c9485Owen Anderson return ResultReg; 1035b41aec54767a825ac54c8822e787700bb08a3460Evan Cheng} 10368970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson 1037825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmitInst_extractsubreg(MVT RetVT, 1038536ab130ec95cbb7bf30530251dafa7dfecc8471Evan Cheng unsigned Op0, uint32_t Idx) { 103940a468f24909792f000e3ccc1dda7a27b9c34b69Owen Anderson const TargetRegisterClass* RC = MRI.getRegClass(Op0); 10408970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson 1041536ab130ec95cbb7bf30530251dafa7dfecc8471Evan Cheng unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); 10428970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG); 10438970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson 10445960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (II.getNumDefs() >= 1) 10459bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Idx); 10465960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng else { 10479bc96a57206cbebaa9b0ba9979f949eb10c1592cBill Wendling BuildMI(MBB, DL, II).addReg(Op0).addImm(Idx); 10485960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg, 10495960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng II.ImplicitDefs[0], RC, RC); 10505960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng if (!InsertedCopy) 10515960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng ResultReg = 0; 10525960e4eb68be6b3bca6369f6a95d7de5ed8a9eadEvan Cheng } 10538970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson return ResultReg; 10548970f00deff00ffce1f35cf00883357e1582daa1Owen Anderson} 105514ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman 105614ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman/// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op 105714ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman/// with all but the least significant bit set to zero. 1058825b72b0571821bf2d378749f69d6c4cfb52d2f9Owen Andersonunsigned FastISel::FastEmitZExtFromI1(MVT VT, unsigned Op) { 105914ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman return FastEmit_ri(VT, VT, ISD::AND, Op, 1); 106014ea1ec2324cb595f2e035bbf54ddcd483f17c11Dan Gohman} 1061