VirtRegMap.cpp revision ed41f1bb1981a98eea63f00c5988cf62bbdd7c59
1//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the VirtRegMap class. 11// 12// It also contains implementations of the the Spiller interface, which, given a 13// virtual register map and a machine function, eliminates all virtual 14// references by replacing them with physical register references - adding spill 15// code as necessary. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "spiller" 20#include "VirtRegMap.h" 21#include "llvm/Function.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SSARegMap.h" 25#include "llvm/Target/TargetMachine.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/Support/Visibility.h" 30#include "llvm/ADT/Statistic.h" 31#include "llvm/ADT/STLExtras.h" 32#include <algorithm> 33#include <iostream> 34using namespace llvm; 35 36namespace { 37 static Statistic<> NumSpills("spiller", "Number of register spills"); 38 static Statistic<> NumStores("spiller", "Number of stores added"); 39 static Statistic<> NumLoads ("spiller", "Number of loads added"); 40 static Statistic<> NumReused("spiller", "Number of values reused"); 41 static Statistic<> NumDSE ("spiller", "Number of dead stores elided"); 42 static Statistic<> NumDCE ("spiller", "Number of copies elided"); 43 44 enum SpillerName { simple, local }; 45 46 static cl::opt<SpillerName> 47 SpillerOpt("spiller", 48 cl::desc("Spiller to use: (default: local)"), 49 cl::Prefix, 50 cl::values(clEnumVal(simple, " simple spiller"), 51 clEnumVal(local, " local spiller"), 52 clEnumValEnd), 53 cl::init(local)); 54} 55 56//===----------------------------------------------------------------------===// 57// VirtRegMap implementation 58//===----------------------------------------------------------------------===// 59 60void VirtRegMap::grow() { 61 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); 62 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); 63} 64 65int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { 66 assert(MRegisterInfo::isVirtualRegister(virtReg)); 67 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 68 "attempt to assign stack slot to already spilled register"); 69 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); 70 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), 71 RC->getAlignment()); 72 Virt2StackSlotMap[virtReg] = frameIndex; 73 ++NumSpills; 74 return frameIndex; 75} 76 77void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { 78 assert(MRegisterInfo::isVirtualRegister(virtReg)); 79 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && 80 "attempt to assign stack slot to already spilled register"); 81 Virt2StackSlotMap[virtReg] = frameIndex; 82} 83 84void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, 85 unsigned OpNo, MachineInstr *NewMI) { 86 // Move previous memory references folded to new instruction. 87 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); 88 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), 89 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { 90 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); 91 MI2VirtMap.erase(I++); 92 } 93 94 ModRef MRInfo; 95 if (!OldMI->getOperand(OpNo).isDef()) { 96 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); 97 MRInfo = isRef; 98 } else { 99 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; 100 } 101 102 // add new memory reference 103 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); 104} 105 106void VirtRegMap::print(std::ostream &OS) const { 107 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); 108 109 OS << "********** REGISTER MAP **********\n"; 110 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 111 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { 112 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) 113 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; 114 115 } 116 117 for (unsigned i = MRegisterInfo::FirstVirtualRegister, 118 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) 119 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) 120 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; 121 OS << '\n'; 122} 123 124void VirtRegMap::dump() const { print(std::cerr); } 125 126 127//===----------------------------------------------------------------------===// 128// Simple Spiller Implementation 129//===----------------------------------------------------------------------===// 130 131Spiller::~Spiller() {} 132 133namespace { 134 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller { 135 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM); 136 }; 137} 138 139bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 140 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); 141 DEBUG(std::cerr << "********** Function: " 142 << MF.getFunction()->getName() << '\n'); 143 const TargetMachine &TM = MF.getTarget(); 144 const MRegisterInfo &MRI = *TM.getRegisterInfo(); 145 bool *PhysRegsUsed = MF.getUsedPhysregs(); 146 147 // LoadedRegs - Keep track of which vregs are loaded, so that we only load 148 // each vreg once (in the case where a spilled vreg is used by multiple 149 // operands). This is always smaller than the number of operands to the 150 // current machine instr, so it should be small. 151 std::vector<unsigned> LoadedRegs; 152 153 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); 154 MBBI != E; ++MBBI) { 155 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); 156 MachineBasicBlock &MBB = *MBBI; 157 for (MachineBasicBlock::iterator MII = MBB.begin(), 158 E = MBB.end(); MII != E; ++MII) { 159 MachineInstr &MI = *MII; 160 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 161 MachineOperand &MO = MI.getOperand(i); 162 if (MO.isRegister() && MO.getReg()) 163 if (MRegisterInfo::isVirtualRegister(MO.getReg())) { 164 unsigned VirtReg = MO.getReg(); 165 unsigned PhysReg = VRM.getPhys(VirtReg); 166 if (VRM.hasStackSlot(VirtReg)) { 167 int StackSlot = VRM.getStackSlot(VirtReg); 168 const TargetRegisterClass* RC = 169 MF.getSSARegMap()->getRegClass(VirtReg); 170 171 if (MO.isUse() && 172 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) 173 == LoadedRegs.end()) { 174 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 175 LoadedRegs.push_back(VirtReg); 176 ++NumLoads; 177 DEBUG(std::cerr << '\t' << *prior(MII)); 178 } 179 180 if (MO.isDef()) { 181 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 182 ++NumStores; 183 } 184 } 185 PhysRegsUsed[PhysReg] = true; 186 MI.getOperand(i).setReg(PhysReg); 187 } else { 188 PhysRegsUsed[MO.getReg()] = true; 189 } 190 } 191 192 DEBUG(std::cerr << '\t' << MI); 193 LoadedRegs.clear(); 194 } 195 } 196 return true; 197} 198 199//===----------------------------------------------------------------------===// 200// Local Spiller Implementation 201//===----------------------------------------------------------------------===// 202 203namespace { 204 /// LocalSpiller - This spiller does a simple pass over the machine basic 205 /// block to attempt to keep spills in registers as much as possible for 206 /// blocks that have low register pressure (the vreg may be spilled due to 207 /// register pressure in other blocks). 208 class VISIBILITY_HIDDEN LocalSpiller : public Spiller { 209 const MRegisterInfo *MRI; 210 const TargetInstrInfo *TII; 211 public: 212 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { 213 MRI = MF.getTarget().getRegisterInfo(); 214 TII = MF.getTarget().getInstrInfo(); 215 DEBUG(std::cerr << "\n**** Local spiller rewriting function '" 216 << MF.getFunction()->getName() << "':\n"); 217 218 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 219 MBB != E; ++MBB) 220 RewriteMBB(*MBB, VRM); 221 return true; 222 } 223 private: 224 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM); 225 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, 226 std::multimap<unsigned, int> &PhysRegs); 227 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, 228 std::multimap<unsigned, int> &PhysRegs); 229 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots, 230 std::multimap<unsigned, int> &PhysRegs); 231 }; 232} 233 234/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from 235/// top down, keep track of which spills slots are available in each register. 236/// 237/// Note that not all physregs are created equal here. In particular, some 238/// physregs are reloads that we are allowed to clobber or ignore at any time. 239/// Other physregs are values that the register allocated program is using that 240/// we cannot CHANGE, but we can read if we like. We keep track of this on a 241/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable 242/// entries. The predicate 'canClobberPhysReg()' checks this bit and 243/// addAvailable sets it if. 244namespace { 245class VISIBILITY_HIDDEN AvailableSpills { 246 const MRegisterInfo *MRI; 247 const TargetInstrInfo *TII; 248 249 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual 250 // register values that are still available, due to being loaded or stored to, 251 // but not invalidated yet. 252 std::map<int, unsigned> SpillSlotsAvailable; 253 254 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating 255 // which stack slot values are currently held by a physreg. This is used to 256 // invalidate entries in SpillSlotsAvailable when a physreg is modified. 257 std::multimap<unsigned, int> PhysRegsAvailable; 258 259 void ClobberPhysRegOnly(unsigned PhysReg); 260public: 261 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii) 262 : MRI(mri), TII(tii) { 263 } 264 265 /// getSpillSlotPhysReg - If the specified stack slot is available in a 266 /// physical register, return that PhysReg, otherwise return 0. 267 unsigned getSpillSlotPhysReg(int Slot) const { 268 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot); 269 if (I != SpillSlotsAvailable.end()) 270 return I->second >> 1; // Remove the CanClobber bit. 271 return 0; 272 } 273 274 const MRegisterInfo *getRegInfo() const { return MRI; } 275 276 /// addAvailable - Mark that the specified stack slot is available in the 277 /// specified physreg. If CanClobber is true, the physreg can be modified at 278 /// any time without changing the semantics of the program. 279 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) { 280 // If this stack slot is thought to be available in some other physreg, 281 // remove its record. 282 ModifyStackSlot(Slot); 283 284 PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); 285 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; 286 287 DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg " 288 << MRI->getName(Reg) << "\n"); 289 } 290 291 /// canClobberPhysReg - Return true if the spiller is allowed to change the 292 /// value of the specified stackslot register if it desires. The specified 293 /// stack slot must be available in a physreg for this query to make sense. 294 bool canClobberPhysReg(int Slot) const { 295 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!"); 296 return SpillSlotsAvailable.find(Slot)->second & 1; 297 } 298 299 /// ClobberPhysReg - This is called when the specified physreg changes 300 /// value. We use this to invalidate any info about stuff we thing lives in 301 /// it and any of its aliases. 302 void ClobberPhysReg(unsigned PhysReg); 303 304 /// ModifyStackSlot - This method is called when the value in a stack slot 305 /// changes. This removes information about which register the previous value 306 /// for this slot lives in (as the previous value is dead now). 307 void ModifyStackSlot(int Slot); 308}; 309} 310 311/// ClobberPhysRegOnly - This is called when the specified physreg changes 312/// value. We use this to invalidate any info about stuff we thing lives in it. 313void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) { 314 std::multimap<unsigned, int>::iterator I = 315 PhysRegsAvailable.lower_bound(PhysReg); 316 while (I != PhysRegsAvailable.end() && I->first == PhysReg) { 317 int Slot = I->second; 318 PhysRegsAvailable.erase(I++); 319 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && 320 "Bidirectional map mismatch!"); 321 SpillSlotsAvailable.erase(Slot); 322 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) 323 << " clobbered, invalidating SS#" << Slot << "\n"); 324 } 325} 326 327/// ClobberPhysReg - This is called when the specified physreg changes 328/// value. We use this to invalidate any info about stuff we thing lives in 329/// it and any of its aliases. 330void AvailableSpills::ClobberPhysReg(unsigned PhysReg) { 331 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) 332 ClobberPhysRegOnly(*AS); 333 ClobberPhysRegOnly(PhysReg); 334} 335 336/// ModifyStackSlot - This method is called when the value in a stack slot 337/// changes. This removes information about which register the previous value 338/// for this slot lives in (as the previous value is dead now). 339void AvailableSpills::ModifyStackSlot(int Slot) { 340 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot); 341 if (It == SpillSlotsAvailable.end()) return; 342 unsigned Reg = It->second >> 1; 343 SpillSlotsAvailable.erase(It); 344 345 // This register may hold the value of multiple stack slots, only remove this 346 // stack slot from the set of values the register contains. 347 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg); 348 for (; ; ++I) { 349 assert(I != PhysRegsAvailable.end() && I->first == Reg && 350 "Map inverse broken!"); 351 if (I->second == Slot) break; 352 } 353 PhysRegsAvailable.erase(I); 354} 355 356 357 358// ReusedOp - For each reused operand, we keep track of a bit of information, in 359// case we need to rollback upon processing a new operand. See comments below. 360namespace { 361 struct ReusedOp { 362 // The MachineInstr operand that reused an available value. 363 unsigned Operand; 364 365 // StackSlot - The spill slot of the value being reused. 366 unsigned StackSlot; 367 368 // PhysRegReused - The physical register the value was available in. 369 unsigned PhysRegReused; 370 371 // AssignedPhysReg - The physreg that was assigned for use by the reload. 372 unsigned AssignedPhysReg; 373 374 // VirtReg - The virtual register itself. 375 unsigned VirtReg; 376 377 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, 378 unsigned vreg) 379 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), 380 VirtReg(vreg) {} 381 }; 382 383 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that 384 /// is reused instead of reloaded. 385 class VISIBILITY_HIDDEN ReuseInfo { 386 MachineInstr &MI; 387 std::vector<ReusedOp> Reuses; 388 public: 389 ReuseInfo(MachineInstr &mi) : MI(mi) {} 390 391 bool hasReuses() const { 392 return !Reuses.empty(); 393 } 394 395 /// addReuse - If we choose to reuse a virtual register that is already 396 /// available instead of reloading it, remember that we did so. 397 void addReuse(unsigned OpNo, unsigned StackSlot, 398 unsigned PhysRegReused, unsigned AssignedPhysReg, 399 unsigned VirtReg) { 400 // If the reload is to the assigned register anyway, no undo will be 401 // required. 402 if (PhysRegReused == AssignedPhysReg) return; 403 404 // Otherwise, remember this. 405 Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused, 406 AssignedPhysReg, VirtReg)); 407 } 408 409 /// GetRegForReload - We are about to emit a reload into PhysReg. If there 410 /// is some other operand that is using the specified register, either pick 411 /// a new register to use, or evict the previous reload and use this reg. 412 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI, 413 AvailableSpills &Spills, 414 std::map<int, MachineInstr*> &MaybeDeadStores) { 415 if (Reuses.empty()) return PhysReg; // This is most often empty. 416 417 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) { 418 ReusedOp &Op = Reuses[ro]; 419 // If we find some other reuse that was supposed to use this register 420 // exactly for its reload, we can change this reload to use ITS reload 421 // register. 422 if (Op.PhysRegReused == PhysReg) { 423 // Yup, use the reload register that we didn't use before. 424 unsigned NewReg = Op.AssignedPhysReg; 425 426 // Remove the record for the previous reuse. We know it can never be 427 // invalidated now. 428 Reuses.erase(Reuses.begin()+ro); 429 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores); 430 } else { 431 // Otherwise, we might also have a problem if a previously reused 432 // value aliases the new register. If so, codegen the previous reload 433 // and use this one. 434 unsigned PRRU = Op.PhysRegReused; 435 const MRegisterInfo *MRI = Spills.getRegInfo(); 436 if (MRI->areAliases(PRRU, PhysReg)) { 437 // Okay, we found out that an alias of a reused register 438 // was used. This isn't good because it means we have 439 // to undo a previous reuse. 440 MachineBasicBlock *MBB = MI->getParent(); 441 const TargetRegisterClass *AliasRC = 442 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg); 443 444 // Copy Op out of the vector and remove it, we're going to insert an 445 // explicit load for it. 446 ReusedOp NewOp = Op; 447 Reuses.erase(Reuses.begin()+ro); 448 449 // Ok, we're going to try to reload the assigned physreg into the 450 // slot that we were supposed to in the first place. However, that 451 // register could hold a reuse. Check to see if it conflicts or 452 // would prefer us to use a different register. 453 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg, 454 MI, Spills, MaybeDeadStores); 455 456 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg, 457 NewOp.StackSlot, AliasRC); 458 Spills.ClobberPhysReg(NewPhysReg); 459 Spills.ClobberPhysReg(NewOp.PhysRegReused); 460 461 // Any stores to this stack slot are not dead anymore. 462 MaybeDeadStores.erase(NewOp.StackSlot); 463 464 MI->getOperand(NewOp.Operand).setReg(NewPhysReg); 465 466 Spills.addAvailable(NewOp.StackSlot, NewPhysReg); 467 ++NumLoads; 468 DEBUG(MachineBasicBlock::iterator MII = MI; 469 std::cerr << '\t' << *prior(MII)); 470 471 DEBUG(std::cerr << "Reuse undone!\n"); 472 --NumReused; 473 474 // Finally, PhysReg is now available, go ahead and use it. 475 return PhysReg; 476 } 477 } 478 } 479 return PhysReg; 480 } 481 }; 482} 483 484 485/// rewriteMBB - Keep track of which spills are available even after the 486/// register allocator is done with them. If possible, avoid reloading vregs. 487void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { 488 489 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); 490 491 // Spills - Keep track of which spilled values are available in physregs so 492 // that we can choose to reuse the physregs instead of emitting reloads. 493 AvailableSpills Spills(MRI, TII); 494 495 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track 496 // of it. ".first" is the machine operand index (should always be 0 for now), 497 // and ".second" is the virtual register that is spilled. 498 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; 499 500 // MaybeDeadStores - When we need to write a value back into a stack slot, 501 // keep track of the inserted store. If the stack slot value is never read 502 // (because the value was used from some available register, for example), and 503 // subsequently stored to, the original store is dead. This map keeps track 504 // of inserted stores that are not used. If we see a subsequent store to the 505 // same stack slot, the original store is deleted. 506 std::map<int, MachineInstr*> MaybeDeadStores; 507 508 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); 509 510 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); 511 MII != E; ) { 512 MachineInstr &MI = *MII; 513 MachineBasicBlock::iterator NextMII = MII; ++NextMII; 514 515 /// ReusedOperands - Keep track of operand reuse in case we need to undo 516 /// reuse. 517 ReuseInfo ReusedOperands(MI); 518 519 DefAndUseVReg.clear(); 520 521 // Process all of the spilled uses and all non spilled reg references. 522 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 523 MachineOperand &MO = MI.getOperand(i); 524 if (!MO.isRegister() || MO.getReg() == 0) 525 continue; // Ignore non-register operands. 526 527 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { 528 // Ignore physregs for spilling, but remember that it is used by this 529 // function. 530 PhysRegsUsed[MO.getReg()] = true; 531 continue; 532 } 533 534 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && 535 "Not a virtual or a physical register?"); 536 537 unsigned VirtReg = MO.getReg(); 538 if (!VRM.hasStackSlot(VirtReg)) { 539 // This virtual register was assigned a physreg! 540 unsigned Phys = VRM.getPhys(VirtReg); 541 PhysRegsUsed[Phys] = true; 542 MI.getOperand(i).setReg(Phys); 543 continue; 544 } 545 546 // This virtual register is now known to be a spilled value. 547 if (!MO.isUse()) 548 continue; // Handle defs in the loop below (handle use&def here though) 549 550 // If this is both a def and a use, we need to emit a store to the 551 // stack slot after the instruction. Keep track of D&U operands 552 // because we are about to change it to a physreg here. 553 if (MO.isDef()) { 554 // Remember that this was a def-and-use operand, and that the 555 // stack slot is live after this instruction executes. 556 DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); 557 } 558 559 int StackSlot = VRM.getStackSlot(VirtReg); 560 unsigned PhysReg; 561 562 // Check to see if this stack slot is available. 563 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) { 564 565 // Don't reuse it for a def&use operand if we aren't allowed to change 566 // the physreg! 567 if (!MO.isDef() || Spills.canClobberPhysReg(StackSlot)) { 568 // If this stack slot value is already available, reuse it! 569 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 570 << MRI->getName(PhysReg) << " for vreg" 571 << VirtReg <<" instead of reloading into physreg " 572 << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); 573 MI.getOperand(i).setReg(PhysReg); 574 575 // The only technical detail we have is that we don't know that 576 // PhysReg won't be clobbered by a reloaded stack slot that occurs 577 // later in the instruction. In particular, consider 'op V1, V2'. 578 // If V1 is available in physreg R0, we would choose to reuse it 579 // here, instead of reloading it into the register the allocator 580 // indicated (say R1). However, V2 might have to be reloaded 581 // later, and it might indicate that it needs to live in R0. When 582 // this occurs, we need to have information available that 583 // indicates it is safe to use R1 for the reload instead of R0. 584 // 585 // To further complicate matters, we might conflict with an alias, 586 // or R0 and R1 might not be compatible with each other. In this 587 // case, we actually insert a reload for V1 in R1, ensuring that 588 // we can get at R0 or its alias. 589 ReusedOperands.addReuse(i, StackSlot, PhysReg, 590 VRM.getPhys(VirtReg), VirtReg); 591 ++NumReused; 592 continue; 593 } 594 595 // Otherwise we have a situation where we have a two-address instruction 596 // whose mod/ref operand needs to be reloaded. This reload is already 597 // available in some register "PhysReg", but if we used PhysReg as the 598 // operand to our 2-addr instruction, the instruction would modify 599 // PhysReg. This isn't cool if something later uses PhysReg and expects 600 // to get its initial value. 601 // 602 // To avoid this problem, and to avoid doing a load right after a store, 603 // we emit a copy from PhysReg into the designated register for this 604 // operand. 605 unsigned DesignatedReg = VRM.getPhys(VirtReg); 606 assert(DesignatedReg && "Must map virtreg to physreg!"); 607 608 // Note that, if we reused a register for a previous operand, the 609 // register we want to reload into might not actually be 610 // available. If this occurs, use the register indicated by the 611 // reuser. 612 if (ReusedOperands.hasReuses()) 613 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI, 614 Spills, MaybeDeadStores); 615 616 // If the mapped designated register is actually the physreg we have 617 // incoming, we don't need to inserted a dead copy. 618 if (DesignatedReg == PhysReg) { 619 // If this stack slot value is already available, reuse it! 620 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " 621 << MRI->getName(PhysReg) << " for vreg" 622 << VirtReg 623 << " instead of reloading into same physreg.\n"); 624 MI.getOperand(i).setReg(PhysReg); 625 ++NumReused; 626 continue; 627 } 628 629 const TargetRegisterClass* RC = 630 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 631 632 PhysRegsUsed[DesignatedReg] = true; 633 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC); 634 635 // This invalidates DesignatedReg. 636 Spills.ClobberPhysReg(DesignatedReg); 637 638 Spills.addAvailable(StackSlot, DesignatedReg); 639 MI.getOperand(i).setReg(DesignatedReg); 640 DEBUG(std::cerr << '\t' << *prior(MII)); 641 ++NumReused; 642 continue; 643 } 644 645 // Otherwise, reload it and remember that we have it. 646 PhysReg = VRM.getPhys(VirtReg); 647 assert(PhysReg && "Must map virtreg to physreg!"); 648 const TargetRegisterClass* RC = 649 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 650 651 // Note that, if we reused a register for a previous operand, the 652 // register we want to reload into might not actually be 653 // available. If this occurs, use the register indicated by the 654 // reuser. 655 if (ReusedOperands.hasReuses()) 656 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, 657 Spills, MaybeDeadStores); 658 659 PhysRegsUsed[PhysReg] = true; 660 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); 661 // This invalidates PhysReg. 662 Spills.ClobberPhysReg(PhysReg); 663 664 // Any stores to this stack slot are not dead anymore. 665 MaybeDeadStores.erase(StackSlot); 666 Spills.addAvailable(StackSlot, PhysReg); 667 ++NumLoads; 668 MI.getOperand(i).setReg(PhysReg); 669 DEBUG(std::cerr << '\t' << *prior(MII)); 670 } 671 672 // Loop over all of the implicit defs, clearing them from our available 673 // sets. 674 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); 675 *ImpDef; ++ImpDef) { 676 PhysRegsUsed[*ImpDef] = true; 677 Spills.ClobberPhysReg(*ImpDef); 678 } 679 680 DEBUG(std::cerr << '\t' << MI); 681 682 // If we have folded references to memory operands, make sure we clear all 683 // physical registers that may contain the value of the spilled virtual 684 // register 685 VirtRegMap::MI2VirtMapTy::const_iterator I, End; 686 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { 687 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " 688 << I->second.second); 689 unsigned VirtReg = I->second.first; 690 VirtRegMap::ModRef MR = I->second.second; 691 if (!VRM.hasStackSlot(VirtReg)) { 692 DEBUG(std::cerr << ": No stack slot!\n"); 693 continue; 694 } 695 int SS = VRM.getStackSlot(VirtReg); 696 DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); 697 698 // If this folded instruction is just a use, check to see if it's a 699 // straight load from the virt reg slot. 700 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) { 701 int FrameIdx; 702 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { 703 // If this spill slot is available, turn it into a copy (or nothing) 704 // instead of leaving it as a load! 705 unsigned InReg; 706 if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) { 707 DEBUG(std::cerr << "Promoted Load To Copy: " << MI); 708 MachineFunction &MF = *MBB.getParent(); 709 if (DestReg != InReg) { 710 MRI->copyRegToReg(MBB, &MI, DestReg, InReg, 711 MF.getSSARegMap()->getRegClass(VirtReg)); 712 // Revisit the copy so we make sure to notice the effects of the 713 // operation on the destreg (either needing to RA it if it's 714 // virtual or needing to clobber any values if it's physical). 715 NextMII = &MI; 716 --NextMII; // backtrack to the copy. 717 } 718 VRM.RemoveFromFoldedVirtMap(&MI); 719 MBB.erase(&MI); 720 goto ProcessNextInst; 721 } 722 } 723 } 724 725 // If this reference is not a use, any previous store is now dead. 726 // Otherwise, the store to this stack slot is not dead anymore. 727 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); 728 if (MDSI != MaybeDeadStores.end()) { 729 if (MR & VirtRegMap::isRef) // Previous store is not dead. 730 MaybeDeadStores.erase(MDSI); 731 else { 732 // If we get here, the store is dead, nuke it now. 733 assert(VirtRegMap::isMod && "Can't be modref!"); 734 DEBUG(std::cerr << "Removed dead store:\t" << *MDSI->second); 735 MBB.erase(MDSI->second); 736 VRM.RemoveFromFoldedVirtMap(MDSI->second); 737 MaybeDeadStores.erase(MDSI); 738 ++NumDSE; 739 } 740 } 741 742 // If the spill slot value is available, and this is a new definition of 743 // the value, the value is not available anymore. 744 if (MR & VirtRegMap::isMod) { 745 // Notice that the value in this stack slot has been modified. 746 Spills.ModifyStackSlot(SS); 747 748 // If this is *just* a mod of the value, check to see if this is just a 749 // store to the spill slot (i.e. the spill got merged into the copy). If 750 // so, realize that the vreg is available now, and add the store to the 751 // MaybeDeadStore info. 752 int StackSlot; 753 if (!(MR & VirtRegMap::isRef)) { 754 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) { 755 assert(MRegisterInfo::isPhysicalRegister(SrcReg) && 756 "Src hasn't been allocated yet?"); 757 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark 758 // this as a potentially dead store in case there is a subsequent 759 // store into the stack slot without a read from it. 760 MaybeDeadStores[StackSlot] = &MI; 761 762 // If the stack slot value was previously available in some other 763 // register, change it now. Otherwise, make the register available, 764 // in PhysReg. 765 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/); 766 } 767 } 768 } 769 } 770 771 // Process all of the spilled defs. 772 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 773 MachineOperand &MO = MI.getOperand(i); 774 if (MO.isRegister() && MO.getReg() && MO.isDef()) { 775 unsigned VirtReg = MO.getReg(); 776 777 if (!MRegisterInfo::isVirtualRegister(VirtReg)) { 778 // Check to see if this is a def-and-use vreg operand that we do need 779 // to insert a store for. 780 bool OpTakenCareOf = false; 781 if (MO.isUse() && !DefAndUseVReg.empty()) { 782 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) 783 if (DefAndUseVReg[dau].first == i) { 784 VirtReg = DefAndUseVReg[dau].second; 785 OpTakenCareOf = true; 786 break; 787 } 788 } 789 790 if (!OpTakenCareOf) { 791 // Check to see if this is a noop copy. If so, eliminate the 792 // instruction before considering the dest reg to be changed. 793 unsigned Src, Dst; 794 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 795 ++NumDCE; 796 DEBUG(std::cerr << "Removing now-noop copy: " << MI); 797 MBB.erase(&MI); 798 VRM.RemoveFromFoldedVirtMap(&MI); 799 goto ProcessNextInst; 800 } 801 Spills.ClobberPhysReg(VirtReg); 802 continue; 803 } 804 } 805 806 // The only vregs left are stack slot definitions. 807 int StackSlot = VRM.getStackSlot(VirtReg); 808 const TargetRegisterClass *RC = 809 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); 810 unsigned PhysReg; 811 812 // If this is a def&use operand, and we used a different physreg for 813 // it than the one assigned, make sure to execute the store from the 814 // correct physical register. 815 if (MO.getReg() == VirtReg) 816 PhysReg = VRM.getPhys(VirtReg); 817 else 818 PhysReg = MO.getReg(); 819 820 PhysRegsUsed[PhysReg] = true; 821 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); 822 DEBUG(std::cerr << "Store:\t" << *next(MII)); 823 MI.getOperand(i).setReg(PhysReg); 824 825 // Check to see if this is a noop copy. If so, eliminate the 826 // instruction before considering the dest reg to be changed. 827 { 828 unsigned Src, Dst; 829 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { 830 ++NumDCE; 831 DEBUG(std::cerr << "Removing now-noop copy: " << MI); 832 MBB.erase(&MI); 833 VRM.RemoveFromFoldedVirtMap(&MI); 834 goto ProcessNextInst; 835 } 836 } 837 838 // If there is a dead store to this stack slot, nuke it now. 839 MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; 840 if (LastStore) { 841 DEBUG(std::cerr << "Removed dead store:\t" << *LastStore); 842 ++NumDSE; 843 MBB.erase(LastStore); 844 VRM.RemoveFromFoldedVirtMap(LastStore); 845 } 846 LastStore = next(MII); 847 848 // If the stack slot value was previously available in some other 849 // register, change it now. Otherwise, make the register available, 850 // in PhysReg. 851 Spills.ModifyStackSlot(StackSlot); 852 Spills.ClobberPhysReg(PhysReg); 853 Spills.addAvailable(StackSlot, PhysReg); 854 ++NumStores; 855 } 856 } 857 ProcessNextInst: 858 MII = NextMII; 859 } 860} 861 862 863 864llvm::Spiller* llvm::createSpiller() { 865 switch (SpillerOpt) { 866 default: assert(0 && "Unreachable!"); 867 case local: 868 return new LocalSpiller(); 869 case simple: 870 return new SimpleSpiller(); 871 } 872} 873