X86RegisterInfo.h revision 6b918b84661687f7b5fc92dabd6d58e258bf39f2
1//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the X86 implementation of the TargetRegisterInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef X86REGISTERINFO_H 15#define X86REGISTERINFO_H 16 17#include "llvm/Target/TargetRegisterInfo.h" 18#include "X86GenRegisterInfo.h.inc" 19 20namespace llvm { 21 class Type; 22 class TargetInstrInfo; 23 class X86TargetMachine; 24 25/// N86 namespace - Native X86 register numbers 26/// 27namespace N86 { 28 enum { 29 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 30 }; 31} 32 33/// DWARFFlavour - Flavour of dwarf regnumbers 34/// 35namespace DWARFFlavour { 36 enum { 37 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2 38 }; 39} 40 41class X86RegisterInfo : public X86GenRegisterInfo { 42public: 43 X86TargetMachine &TM; 44 const TargetInstrInfo &TII; 45 46private: 47 /// Is64Bit - Is the target 64-bits. 48 /// 49 bool Is64Bit; 50 51 /// IsWin64 - Is the target on of win64 flavours 52 /// 53 bool IsWin64; 54 55 /// SlotSize - Stack slot size in bytes. 56 /// 57 unsigned SlotSize; 58 59 /// StackAlign - Default stack alignment. 60 /// 61 unsigned StackAlign; 62 63 /// StackPtr - X86 physical register used as stack ptr. 64 /// 65 unsigned StackPtr; 66 67 /// FramePtr - X86 physical register used as frame ptr. 68 /// 69 unsigned FramePtr; 70 71public: 72 X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii); 73 74 /// getX86RegNum - Returns the native X86 register number for the given LLVM 75 /// register identifier. 76 static unsigned getX86RegNum(unsigned RegNo); 77 78 unsigned getStackAlignment() const { return StackAlign; } 79 80 /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum 81 /// (created by TableGen) for target dependencies. 82 int getDwarfRegNum(unsigned RegNum, bool isEH) const; 83 84 // FIXME: This should be tablegen'd like getDwarfRegNum is 85 int getSEHRegNum(unsigned i) const; 86 87 /// Code Generation virtual methods... 88 /// 89 90 /// getMatchingSuperRegClass - Return a subclass of the specified register 91 /// class A so that each register in it has a sub-register of the 92 /// specified sub-register index which is in the specified register class B. 93 virtual const TargetRegisterClass * 94 getMatchingSuperRegClass(const TargetRegisterClass *A, 95 const TargetRegisterClass *B, unsigned Idx) const; 96 97 const TargetRegisterClass* 98 getLargestLegalSuperClass(const TargetRegisterClass *RC) const; 99 100 /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 101 /// values. 102 const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; 103 104 /// getCrossCopyRegClass - Returns a legal register class to copy a register 105 /// in the specified class to or from. Returns NULL if it is possible to copy 106 /// between a two registers of the specified class. 107 const TargetRegisterClass * 108 getCrossCopyRegClass(const TargetRegisterClass *RC) const; 109 110 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 111 MachineFunction &MF) const; 112 113 /// getCalleeSavedRegs - Return a null-terminated list of all of the 114 /// callee-save registers on this target. 115 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 116 117 /// getReservedRegs - Returns a bitset indexed by physical register number 118 /// indicating if a register is a special register that has particular uses and 119 /// should be considered unavailable at all times, e.g. SP, RA. This is used by 120 /// register scavenger to determine what registers are free. 121 BitVector getReservedRegs(const MachineFunction &MF) const; 122 123 bool canRealignStack(const MachineFunction &MF) const; 124 125 bool needsStackRealignment(const MachineFunction &MF) const; 126 127 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, 128 int &FrameIdx) const; 129 130 void eliminateCallFramePseudoInstr(MachineFunction &MF, 131 MachineBasicBlock &MBB, 132 MachineBasicBlock::iterator MI) const; 133 134 void eliminateFrameIndex(MachineBasicBlock::iterator MI, 135 int SPAdj, RegScavenger *RS = NULL) const; 136 137 // Debug information queries. 138 unsigned getRARegister() const; 139 unsigned getFrameRegister(const MachineFunction &MF) const; 140 unsigned getStackRegister() const { return StackPtr; } 141 // FIXME: Move to FrameInfok 142 unsigned getSlotSize() const { return SlotSize; } 143 144 // Exception handling queries. 145 unsigned getEHExceptionRegister() const; 146 unsigned getEHHandlerRegister() const; 147}; 148 149// getX86SubSuperRegister - X86 utility function. It returns the sub or super 150// register of a specific X86 register. 151// e.g. getX86SubSuperRegister(X86::EAX, EVT::i16) return X86:AX 152unsigned getX86SubSuperRegister(unsigned, EVT, bool High=false); 153 154} // End llvm namespace 155 156#endif 157