X86RegisterInfo.h revision b8033e821d9ccad10ba8770c4561600a3e9ce6cc 
1//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the X86 implementation of the MRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86REGISTERINFO_H
15#define X86REGISTERINFO_H
16
17#include "llvm/ADT/DenseMap.h"
18#include "llvm/ADT/SmallVector.h"
19#include "llvm/Target/MRegisterInfo.h"
20#include "X86GenRegisterInfo.h.inc"
21
22namespace llvm {
23  class Type;
24  class TargetInstrInfo;
25  class X86TargetMachine;
26
27/// N86 namespace - Native X86 register numbers
28///
29namespace N86 {
30  enum {
31    EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
32  };
33}
34
35/// DWARFFlavour - Flavour of dwarf regnumbers
36///
37namespace DWARFFlavour {
38  enum {
39    X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
40  };
41}
42
43class X86RegisterInfo : public X86GenRegisterInfo {
44public:
45  X86TargetMachine &TM;
46  const TargetInstrInfo &TII;
47
48private:
49  /// Is64Bit - Is the target 64-bits.
50  ///
51  bool Is64Bit;
52
53  /// SlotSize - Stack slot size in bytes.
54  ///
55  unsigned SlotSize;
56
57  /// StackAlign - Default stack alignment.
58  ///
59  unsigned StackAlign;
60
61  /// StackPtr - X86 physical register used as stack ptr.
62  ///
63  unsigned StackPtr;
64
65  /// FramePtr - X86 physical register used as frame ptr.
66  ///
67  unsigned FramePtr;
68
69public:
70  X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
71
72  /// getX86RegNum - Returns the native X86 register number for the given LLVM
73  /// register identifier.
74  unsigned getX86RegNum(unsigned RegNo);
75
76  unsigned getStackAlignment() const { return StackAlign; }
77
78  /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum
79  /// (created by TableGen) for target dependencies.
80  int getDwarfRegNum(unsigned RegNum, bool isEH) const;
81
82  /// Code Generation virtual methods...
83  ///
84  const TargetRegisterClass *
85  getCrossCopyRegClass(const TargetRegisterClass *RC) const;
86
87  void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
88                     unsigned DestReg, const MachineInstr *Orig) const;
89
90  /// getCalleeSavedRegs - Return a null-terminated list of all of the
91  /// callee-save registers on this target.
92  const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
93
94  /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
95  /// register classes to spill each callee-saved register with.  The order and
96  /// length of this list match the getCalleeSavedRegs() list.
97  const TargetRegisterClass* const*
98  getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
99
100  /// getReservedRegs - Returns a bitset indexed by physical register number
101  /// indicating if a register is a special register that has particular uses and
102  /// should be considered unavailable at all times, e.g. SP, RA. This is used by
103  /// register scavenger to determine what registers are free.
104  BitVector getReservedRegs(const MachineFunction &MF) const;
105
106  bool hasFP(const MachineFunction &MF) const;
107
108  bool hasReservedCallFrame(MachineFunction &MF) const;
109
110  void eliminateCallFramePseudoInstr(MachineFunction &MF,
111                                     MachineBasicBlock &MBB,
112                                     MachineBasicBlock::iterator MI) const;
113
114  void eliminateFrameIndex(MachineBasicBlock::iterator MI,
115                           int SPAdj, RegScavenger *RS = NULL) const;
116
117  void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
118
119  void emitPrologue(MachineFunction &MF) const;
120  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
121
122  // Debug information queries.
123  unsigned getRARegister() const;
124  unsigned getFrameRegister(MachineFunction &MF) const;
125  int getFrameIndexOffset(MachineFunction &MF, int FI) const;
126  void getInitialFrameState(std::vector<MachineMove> &Moves) const;
127
128  // Exception handling queries.
129  unsigned getEHExceptionRegister() const;
130  unsigned getEHHandlerRegister() const;
131};
132
133// getX86SubSuperRegister - X86 utility function. It returns the sub or super
134// register of a specific X86 register.
135// e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
136unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
137
138} // End llvm namespace
139
140#endif
141