nv50_tex.c revision 02f32454487f2caba00931590254260d871ae795
1/* 2 * Copyright 2008 Ben Skeggs 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 20 * SOFTWARE. 21 */ 22 23#include "nv50_context.h" 24#include "nv50_texture.h" 25 26#include "nouveau/nouveau_stateobj.h" 27 28static int 29nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so, 30 struct nv50_miptree *mt, int unit) 31{ 32 switch (mt->base.base.format) { 33 case PIPE_FORMAT_A8R8G8B8_UNORM: 34 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 35 NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM | 36 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 37 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 38 NV50TIC_0_0_FMT_8_8_8_8); 39 break; 40 case PIPE_FORMAT_A1R5G5B5_UNORM: 41 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 42 NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM | 43 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 44 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 45 NV50TIC_0_0_FMT_1_5_5_5); 46 break; 47 case PIPE_FORMAT_A4R4G4B4_UNORM: 48 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 49 NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM | 50 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 51 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 52 NV50TIC_0_0_FMT_4_4_4_4); 53 break; 54 case PIPE_FORMAT_R5G6B5_UNORM: 55 so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM | 56 NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM | 57 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 58 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 59 NV50TIC_0_0_FMT_5_6_5); 60 break; 61 case PIPE_FORMAT_L8_UNORM: 62 so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM | 63 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 64 NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM | 65 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 66 NV50TIC_0_0_FMT_8); 67 break; 68 case PIPE_FORMAT_A8_UNORM: 69 so_data(so, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | 70 NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | 71 NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | 72 NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | 73 NV50TIC_0_0_FMT_8); 74 break; 75 case PIPE_FORMAT_I8_UNORM: 76 so_data(so, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | 77 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 78 NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM | 79 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 80 NV50TIC_0_0_FMT_8); 81 break; 82 case PIPE_FORMAT_A8L8_UNORM: 83 so_data(so, NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM | 84 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 85 NV50TIC_0_0_MAPG_C0 | NV50TIC_0_0_TYPEG_UNORM | 86 NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | 87 NV50TIC_0_0_FMT_8_8); 88 break; 89 case PIPE_FORMAT_DXT1_RGB: 90 so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM | 91 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 92 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 93 NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM | 94 NV50TIC_0_0_FMT_DXT1); 95 break; 96 case PIPE_FORMAT_DXT1_RGBA: 97 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 98 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 99 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 100 NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM | 101 NV50TIC_0_0_FMT_DXT1); 102 break; 103 case PIPE_FORMAT_DXT3_RGBA: 104 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 105 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 106 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 107 NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM | 108 NV50TIC_0_0_FMT_DXT3); 109 break; 110 case PIPE_FORMAT_DXT5_RGBA: 111 so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | 112 NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM | 113 NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM | 114 NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM | 115 NV50TIC_0_0_FMT_DXT5); 116 break; 117 default: 118 return 1; 119 } 120 121 so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | 122 NOUVEAU_BO_RD, 0, 0); 123 if (nv50->sampler[unit]->normalized) 124 so_data (so, 0xd0005000 | mt->base.bo->tile_mode << 22); 125 else 126 so_data (so, 0x5001d000 | mt->base.bo->tile_mode << 22); 127 so_data (so, 0x00300000); 128 so_data (so, mt->base.base.width[0]); 129 so_data (so, (mt->base.base.last_level << 28) | 130 (mt->base.base.depth[0] << 16) | mt->base.base.height[0]); 131 so_data (so, 0x03000000); 132 so_data (so, mt->base.base.last_level << 4); 133 134 return 0; 135} 136 137void 138nv50_tex_validate(struct nv50_context *nv50) 139{ 140 struct nouveau_grobj *tesla = nv50->screen->tesla; 141 struct nouveau_stateobj *so; 142 int unit, push; 143 144 push = nv50->miptree_nr * 9 + 2; 145 push += MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2; 146 147 so = so_new(push, nv50->miptree_nr * 2); 148 so_method(so, tesla, NV50TCL_CB_ADDR, 1); 149 so_data (so, NV50_CB_TIC); 150 for (unit = 0; unit < nv50->miptree_nr; unit++) { 151 struct nv50_miptree *mt = nv50->miptree[unit]; 152 153 so_method(so, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 8); 154 if (nv50_tex_construct(nv50, so, mt, unit)) { 155 NOUVEAU_ERR("failed tex validate\n"); 156 so_ref(NULL, &so); 157 return; 158 } 159 160 so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1); 161 so_data (so, (unit << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) | 162 (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 163 NV50TCL_SET_SAMPLER_TEX_VALID); 164 } 165 166 for (; unit < nv50->state.miptree_nr; unit++) { 167 so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1); 168 so_data (so, 169 (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0); 170 } 171 172 so_ref(so, &nv50->state.tic_upload); 173 so_ref(NULL, &so); 174 nv50->state.miptree_nr = nv50->miptree_nr; 175} 176 177