nv50_tex.c revision 6fd8b9b550713302566bb4c28e49c219870ccfec 
1/*
2 * Copyright 2008 Ben Skeggs
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23#include "nv50_context.h"
24#include "nv50_texture.h"
25
26#include "nouveau/nouveau_stateobj.h"
27
28#include "util/u_format.h"
29
30#define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f)		\
31{                                                       	\
32	PIPE_FORMAT_##pf,					\
33	NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 |	\
34	NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 |	\
35	NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 |	\
36	NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 |	\
37	NV50TIC_0_0_FMT_##f					\
38}
39
40#define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
41
42struct nv50_texture_format {
43	enum pipe_format pf;
44	uint32_t hw;
45};
46
47#define NV50_TEX_FORMAT_LIST_SIZE \
48	(sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format))
49
50static const struct nv50_texture_format nv50_tex_format_list[] =
51{
52	_(A8R8G8B8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
53	_(A8R8G8B8_SRGB,  UNORM, C2, C1, C0, C3,  8_8_8_8),
54	_(X8R8G8B8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
55	_(X8R8G8B8_SRGB,  UNORM, C2, C1, C0, ONE, 8_8_8_8),
56	_(A1R5G5B5_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
57	_(A4R4G4B4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
58
59	_(R5G6B5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5),
60
61	_(L8_UNORM, UNORM, C0, C0, C0, ONE, 8),
62	_(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
63	_(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
64
65	_(A8L8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
66
67	_(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
68	_(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
69	_(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3),
70	_(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5),
71
72	_MIXED(Z24S8_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8),
73
74	_(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16),
75	_(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16),
76	_(R32G32B32A32_FLOAT, FLOAT, C0, C1, C2, C3, 32_32_32_32),
77
78	_(R16G16_SNORM, SNORM, C0, C1, ZERO, ONE, 16_16),
79	_(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16),
80
81	_MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH)
82
83};
84
85#undef _
86#undef _MIXED
87
88static int
89nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
90		   struct nv50_miptree *mt, int unit)
91{
92	unsigned i;
93	uint32_t mode;
94	const struct util_format_description *desc;
95
96	for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++)
97		if (nv50_tex_format_list[i].pf == mt->base.base.format)
98			break;
99	if (i == NV50_TEX_FORMAT_LIST_SIZE)
100                return 1;
101
102	if (nv50->sampler[unit]->normalized)
103		mode = 0x50001000 | (1 << 31);
104	else {
105		mode = 0x50001000 | (7 << 14);
106		assert(mt->base.base.target == PIPE_TEXTURE_2D);
107	}
108
109	mode |= ((mt->base.bo->tile_mode & 0x0f) << 22) |
110		((mt->base.bo->tile_mode & 0xf0) << 21);
111
112	desc = util_format_description(mt->base.base.format);
113	assert(desc);
114
115	if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
116		mode |= 0x0400;
117
118	switch (mt->base.base.target) {
119	case PIPE_TEXTURE_1D:
120		break;
121	case PIPE_TEXTURE_2D:
122		mode |= (1 << 14);
123		break;
124	case PIPE_TEXTURE_3D:
125		mode |= (2 << 14);
126		break;
127	case PIPE_TEXTURE_CUBE:
128		mode |= (3 << 14);
129		break;
130	default:
131		assert(!"unsupported texture target");
132		break;
133	}
134
135	so_data (so, nv50_tex_format_list[i].hw);
136	so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
137		 NOUVEAU_BO_RD, 0, 0);
138	so_data (so, mode);
139	so_data (so, 0x00300000);
140	so_data (so, mt->base.base.width0 | (1 << 31));
141	so_data (so, (mt->base.base.last_level << 28) |
142		 (mt->base.base.depth0 << 16) | mt->base.base.height0);
143	so_data (so, 0x03000000);
144	so_data (so, mt->base.base.last_level << 4);
145
146	return 0;
147}
148
149void
150nv50_tex_validate(struct nv50_context *nv50)
151{
152	struct nouveau_grobj *eng2d = nv50->screen->eng2d;
153	struct nouveau_grobj *tesla = nv50->screen->tesla;
154	struct nouveau_stateobj *so;
155	unsigned i, unit, push;
156
157	push = MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2 + 23 + 6;
158	so = so_new(nv50->miptree_nr * 9 + push, nv50->miptree_nr * 2 + 2);
159
160	nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM,
161			  nv50->miptree_nr * 8 * 4);
162
163	for (i = 0, unit = 0; unit < nv50->miptree_nr; ++unit) {
164		struct nv50_miptree *mt = nv50->miptree[unit];
165
166		if (!mt)
167			continue;
168
169		so_method(so, eng2d, NV50_2D_SIFC_DATA | (2 << 29), 8);
170		if (nv50_tex_construct(nv50, so, mt, unit)) {
171			NOUVEAU_ERR("failed tex validate\n");
172			so_ref(NULL, &so);
173			return;
174		}
175
176		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
177		so_data  (so, (i++ << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) |
178			  (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) |
179			  NV50TCL_SET_SAMPLER_TEX_VALID);
180	}
181
182	for (; unit < nv50->state.miptree_nr; unit++) {
183		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
184		so_data  (so,
185			  (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0);
186	}
187
188	/* not sure if the following really do what I think: */
189	so_method(so, tesla, 0x1440, 1); /* sync SIFC */
190	so_data  (so, 0);
191	so_method(so, tesla, 0x1330, 1); /* flush TIC */
192	so_data  (so, 0);
193	so_method(so, tesla, 0x1338, 1); /* flush texture caches */
194	so_data  (so, 0x20);
195
196	so_ref(so, &nv50->state.tic_upload);
197	so_ref(NULL, &so);
198	nv50->state.miptree_nr = nv50->miptree_nr;
199}
200
201