gen6_wm_state.c revision e31defc825ee94f1d1092e277954abad7097c552
1/*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 *    Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include "brw_context.h"
29#include "brw_state.h"
30#include "brw_defines.h"
31#include "brw_util.h"
32#include "brw_wm.h"
33#include "program/prog_parameter.h"
34#include "program/prog_statevars.h"
35#include "intel_batchbuffer.h"
36
37static void
38prepare_wm_constants(struct brw_context *brw)
39{
40   struct intel_context *intel = &brw->intel;
41   struct gl_context *ctx = &intel->ctx;
42   const struct brw_fragment_program *fp =
43      brw_fragment_program_const(brw->fragment_program);
44
45   drm_intel_bo_unreference(brw->wm.push_const_bo);
46   brw->wm.push_const_bo = NULL;
47
48   /* Updates the ParamaterValues[i] pointers for all parameters of the
49    * basic type of PROGRAM_STATE_VAR.
50    */
51   /* XXX: Should this happen somewhere before to get our state flag set? */
52   _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
53
54   if (brw->wm.prog_data->nr_params != 0) {
55      float *constants;
56      unsigned int i;
57
58      brw->wm.push_const_bo = drm_intel_bo_alloc(intel->bufmgr,
59						 "WM constant_bo",
60						 brw->wm.prog_data->nr_params *
61						 sizeof(float),
62						 4096);
63      drm_intel_gem_bo_map_gtt(brw->wm.push_const_bo);
64      constants = brw->wm.push_const_bo->virtual;
65      for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
66	 constants[i] = convert_param(brw->wm.prog_data->param_convert[i],
67				      *brw->wm.prog_data->param[i]);
68      }
69
70      if (0) {
71	 printf("WM constants:\n");
72	 for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
73	    if ((i & 7) == 0)
74	       printf("g%d: ", brw->wm.prog_data->first_curbe_grf + i / 8);
75	    printf("%8f ", constants[i]);
76	    if ((i & 7) == 7)
77	       printf("\n");
78	 }
79	 if ((i & 7) != 0)
80	    printf("\n");
81	 printf("\n");
82      }
83
84      drm_intel_gem_bo_unmap_gtt(brw->wm.push_const_bo);
85   }
86}
87
88const struct brw_tracked_state gen6_wm_constants = {
89   .dirty = {
90      .mesa  = _NEW_PROGRAM_CONSTANTS,
91      .brw   = BRW_NEW_FRAGMENT_PROGRAM,
92      .cache = 0,
93   },
94   .prepare = prepare_wm_constants,
95};
96
97static void
98upload_wm_state(struct brw_context *brw)
99{
100   struct intel_context *intel = &brw->intel;
101   struct gl_context *ctx = &intel->ctx;
102   const struct brw_fragment_program *fp =
103      brw_fragment_program_const(brw->fragment_program);
104   uint32_t dw2, dw4, dw5, dw6;
105
106   /* CACHE_NEW_WM_PROG */
107   if (brw->wm.prog_data->nr_params == 0) {
108      /* Disable the push constant buffers. */
109      BEGIN_BATCH(5);
110      OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
111      OUT_BATCH(0);
112      OUT_BATCH(0);
113      OUT_BATCH(0);
114      OUT_BATCH(0);
115      ADVANCE_BATCH();
116   } else {
117      BEGIN_BATCH(5);
118      OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
119		GEN6_CONSTANT_BUFFER_0_ENABLE |
120		(5 - 2));
121      OUT_RELOC(brw->wm.push_const_bo,
122		I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */
123		ALIGN(brw->wm.prog_data->nr_params,
124		      brw->wm.prog_data->dispatch_width) / 8 - 1);
125      OUT_BATCH(0);
126      OUT_BATCH(0);
127      OUT_BATCH(0);
128      ADVANCE_BATCH();
129   }
130
131   dw2 = dw4 = dw5 = dw6 = 0;
132   dw4 |= GEN6_WM_STATISTICS_ENABLE;
133   dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
134   dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
135
136   /* OpenGL non-ieee floating point mode */
137   dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
138
139   /* BRW_NEW_NR_WM_SURFACES */
140   dw2 |= brw->wm.nr_surfaces << GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT;
141
142   /* CACHE_NEW_SAMPLER */
143   dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
144   dw4 |= (brw->wm.prog_data->first_curbe_grf <<
145	   GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
146
147   dw5 |= (40 - 1) << GEN6_WM_MAX_THREADS_SHIFT;
148
149   /* CACHE_NEW_WM_PROG */
150   if (brw->wm.prog_data->dispatch_width == 8)
151      dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
152   else
153      dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
154
155   /* _NEW_LINE */
156   if (ctx->Line.StippleFlag)
157      dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
158
159   /* _NEW_POLYGONSTIPPLE */
160   if (ctx->Polygon.StippleFlag)
161      dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
162
163   /* BRW_NEW_FRAGMENT_PROGRAM */
164   if (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
165      dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
166   if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
167      dw5 |= GEN6_WM_COMPUTED_DEPTH;
168
169   /* _NEW_COLOR */
170   if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
171      dw5 |= GEN6_WM_KILL_ENABLE;
172
173   if (brw_color_buffer_write_enabled(brw) ||
174       dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH)) {
175      dw5 |= GEN6_WM_DISPATCH_ENABLE;
176   }
177
178   dw6 |= GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
179
180   dw6 |= brw_count_bits(brw->fragment_program->Base.InputsRead) <<
181      GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
182
183   BEGIN_BATCH(9);
184   OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
185   OUT_RELOC(brw->wm.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
186   OUT_BATCH(dw2);
187   OUT_BATCH(0); /* scratch space base offset */
188   OUT_BATCH(dw4);
189   OUT_BATCH(dw5);
190   OUT_BATCH(dw6);
191   OUT_BATCH(0); /* kernel 1 pointer */
192   OUT_BATCH(0); /* kernel 2 pointer */
193   ADVANCE_BATCH();
194}
195
196const struct brw_tracked_state gen6_wm_state = {
197   .dirty = {
198      .mesa  = (_NEW_LINE | _NEW_POLYGONSTIPPLE | _NEW_COLOR | _NEW_BUFFERS |
199		_NEW_PROGRAM_CONSTANTS | _NEW_POLYGON),
200      .brw   = (BRW_NEW_CURBE_OFFSETS |
201		BRW_NEW_FRAGMENT_PROGRAM |
202                BRW_NEW_NR_WM_SURFACES |
203		BRW_NEW_URB_FENCE |
204		BRW_NEW_BATCH),
205      .cache = (CACHE_NEW_SAMPLER |
206		CACHE_NEW_WM_PROG)
207   },
208   .emit = upload_wm_state,
209};
210