st_glsl_to_tgsi.cpp revision 73b26e4d12e5fa07bb96b4a30f41bd3b583776aa
1/* 2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved. 3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved. 4 * Copyright © 2010 Intel Corporation 5 * Copyright © 2011 Bryan Cain 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 */ 26 27/** 28 * \file glsl_to_tgsi.cpp 29 * 30 * Translate GLSL IR to TGSI. 31 */ 32 33#include <stdio.h> 34#include "main/compiler.h" 35#include "ir.h" 36#include "ir_visitor.h" 37#include "ir_print_visitor.h" 38#include "ir_expression_flattening.h" 39#include "glsl_types.h" 40#include "glsl_parser_extras.h" 41#include "../glsl/program.h" 42#include "ir_optimization.h" 43#include "ast.h" 44 45#include "main/mtypes.h" 46#include "main/shaderobj.h" 47#include "program/hash_table.h" 48 49extern "C" { 50#include "main/shaderapi.h" 51#include "main/uniforms.h" 52#include "program/prog_instruction.h" 53#include "program/prog_optimize.h" 54#include "program/prog_print.h" 55#include "program/program.h" 56#include "program/prog_parameter.h" 57#include "program/sampler.h" 58 59#include "pipe/p_compiler.h" 60#include "pipe/p_context.h" 61#include "pipe/p_screen.h" 62#include "pipe/p_shader_tokens.h" 63#include "pipe/p_state.h" 64#include "util/u_math.h" 65#include "tgsi/tgsi_ureg.h" 66#include "tgsi/tgsi_info.h" 67#include "st_context.h" 68#include "st_program.h" 69#include "st_glsl_to_tgsi.h" 70#include "st_mesa_to_tgsi.h" 71} 72 73#define PROGRAM_IMMEDIATE PROGRAM_FILE_MAX 74#define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \ 75 (1 << PROGRAM_ENV_PARAM) | \ 76 (1 << PROGRAM_STATE_VAR) | \ 77 (1 << PROGRAM_NAMED_PARAM) | \ 78 (1 << PROGRAM_CONSTANT) | \ 79 (1 << PROGRAM_UNIFORM)) 80 81/** 82 * Maximum number of temporary registers. 83 * 84 * It is too big for stack allocated arrays -- it will cause stack overflow on 85 * Windows and likely Mac OS X. 86 */ 87#define MAX_TEMPS 4096 88 89/* will be 4 for GLSL 4.00 */ 90#define MAX_GLSL_TEXTURE_OFFSET 1 91 92class st_src_reg; 93class st_dst_reg; 94 95static int swizzle_for_size(int size); 96 97/** 98 * This struct is a corresponding struct to TGSI ureg_src. 99 */ 100class st_src_reg { 101public: 102 st_src_reg(gl_register_file file, int index, const glsl_type *type) 103 { 104 this->file = file; 105 this->index = index; 106 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix())) 107 this->swizzle = swizzle_for_size(type->vector_elements); 108 else 109 this->swizzle = SWIZZLE_XYZW; 110 this->negate = 0; 111 this->type = type ? type->base_type : GLSL_TYPE_ERROR; 112 this->reladdr = NULL; 113 } 114 115 st_src_reg(gl_register_file file, int index, int type) 116 { 117 this->type = type; 118 this->file = file; 119 this->index = index; 120 this->swizzle = SWIZZLE_XYZW; 121 this->negate = 0; 122 this->reladdr = NULL; 123 } 124 125 st_src_reg() 126 { 127 this->type = GLSL_TYPE_ERROR; 128 this->file = PROGRAM_UNDEFINED; 129 this->index = 0; 130 this->swizzle = 0; 131 this->negate = 0; 132 this->reladdr = NULL; 133 } 134 135 explicit st_src_reg(st_dst_reg reg); 136 137 gl_register_file file; /**< PROGRAM_* from Mesa */ 138 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */ 139 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */ 140 int negate; /**< NEGATE_XYZW mask from mesa */ 141 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ 142 /** Register index should be offset by the integer in this reg. */ 143 st_src_reg *reladdr; 144}; 145 146class st_dst_reg { 147public: 148 st_dst_reg(gl_register_file file, int writemask, int type) 149 { 150 this->file = file; 151 this->index = 0; 152 this->writemask = writemask; 153 this->cond_mask = COND_TR; 154 this->reladdr = NULL; 155 this->type = type; 156 } 157 158 st_dst_reg() 159 { 160 this->type = GLSL_TYPE_ERROR; 161 this->file = PROGRAM_UNDEFINED; 162 this->index = 0; 163 this->writemask = 0; 164 this->cond_mask = COND_TR; 165 this->reladdr = NULL; 166 } 167 168 explicit st_dst_reg(st_src_reg reg); 169 170 gl_register_file file; /**< PROGRAM_* from Mesa */ 171 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */ 172 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ 173 GLuint cond_mask:4; 174 int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ 175 /** Register index should be offset by the integer in this reg. */ 176 st_src_reg *reladdr; 177}; 178 179st_src_reg::st_src_reg(st_dst_reg reg) 180{ 181 this->type = reg.type; 182 this->file = reg.file; 183 this->index = reg.index; 184 this->swizzle = SWIZZLE_XYZW; 185 this->negate = 0; 186 this->reladdr = reg.reladdr; 187} 188 189st_dst_reg::st_dst_reg(st_src_reg reg) 190{ 191 this->type = reg.type; 192 this->file = reg.file; 193 this->index = reg.index; 194 this->writemask = WRITEMASK_XYZW; 195 this->cond_mask = COND_TR; 196 this->reladdr = reg.reladdr; 197} 198 199class glsl_to_tgsi_instruction : public exec_node { 200public: 201 /* Callers of this ralloc-based new need not call delete. It's 202 * easier to just ralloc_free 'ctx' (or any of its ancestors). */ 203 static void* operator new(size_t size, void *ctx) 204 { 205 void *node; 206 207 node = rzalloc_size(ctx, size); 208 assert(node != NULL); 209 210 return node; 211 } 212 213 unsigned op; 214 st_dst_reg dst; 215 st_src_reg src[3]; 216 /** Pointer to the ir source this tree came from for debugging */ 217 ir_instruction *ir; 218 GLboolean cond_update; 219 bool saturate; 220 int sampler; /**< sampler index */ 221 int tex_target; /**< One of TEXTURE_*_INDEX */ 222 GLboolean tex_shadow; 223 struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; 224 unsigned tex_offset_num_offset; 225 int dead_mask; /**< Used in dead code elimination */ 226 227 class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */ 228}; 229 230class variable_storage : public exec_node { 231public: 232 variable_storage(ir_variable *var, gl_register_file file, int index) 233 : file(file), index(index), var(var) 234 { 235 /* empty */ 236 } 237 238 gl_register_file file; 239 int index; 240 ir_variable *var; /* variable that maps to this, if any */ 241}; 242 243class immediate_storage : public exec_node { 244public: 245 immediate_storage(gl_constant_value *values, int size, int type) 246 { 247 memcpy(this->values, values, size * sizeof(gl_constant_value)); 248 this->size = size; 249 this->type = type; 250 } 251 252 gl_constant_value values[4]; 253 int size; /**< Number of components (1-4) */ 254 int type; /**< GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */ 255}; 256 257class function_entry : public exec_node { 258public: 259 ir_function_signature *sig; 260 261 /** 262 * identifier of this function signature used by the program. 263 * 264 * At the point that TGSI instructions for function calls are 265 * generated, we don't know the address of the first instruction of 266 * the function body. So we make the BranchTarget that is called a 267 * small integer and rewrite them during set_branchtargets(). 268 */ 269 int sig_id; 270 271 /** 272 * Pointer to first instruction of the function body. 273 * 274 * Set during function body emits after main() is processed. 275 */ 276 glsl_to_tgsi_instruction *bgn_inst; 277 278 /** 279 * Index of the first instruction of the function body in actual TGSI. 280 * 281 * Set after conversion from glsl_to_tgsi_instruction to TGSI. 282 */ 283 int inst; 284 285 /** Storage for the return value. */ 286 st_src_reg return_reg; 287}; 288 289class glsl_to_tgsi_visitor : public ir_visitor { 290public: 291 glsl_to_tgsi_visitor(); 292 ~glsl_to_tgsi_visitor(); 293 294 function_entry *current_function; 295 296 struct gl_context *ctx; 297 struct gl_program *prog; 298 struct gl_shader_program *shader_program; 299 struct gl_shader_compiler_options *options; 300 301 int next_temp; 302 303 int num_address_regs; 304 int samplers_used; 305 bool indirect_addr_temps; 306 bool indirect_addr_consts; 307 int num_clip_distances; 308 309 int glsl_version; 310 bool native_integers; 311 312 variable_storage *find_variable_storage(ir_variable *var); 313 314 int add_constant(gl_register_file file, gl_constant_value values[4], 315 int size, int datatype, GLuint *swizzle_out); 316 317 function_entry *get_function_signature(ir_function_signature *sig); 318 319 st_src_reg get_temp(const glsl_type *type); 320 void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr); 321 322 st_src_reg st_src_reg_for_float(float val); 323 st_src_reg st_src_reg_for_int(int val); 324 st_src_reg st_src_reg_for_type(int type, int val); 325 326 /** 327 * \name Visit methods 328 * 329 * As typical for the visitor pattern, there must be one \c visit method for 330 * each concrete subclass of \c ir_instruction. Virtual base classes within 331 * the hierarchy should not have \c visit methods. 332 */ 333 /*@{*/ 334 virtual void visit(ir_variable *); 335 virtual void visit(ir_loop *); 336 virtual void visit(ir_loop_jump *); 337 virtual void visit(ir_function_signature *); 338 virtual void visit(ir_function *); 339 virtual void visit(ir_expression *); 340 virtual void visit(ir_swizzle *); 341 virtual void visit(ir_dereference_variable *); 342 virtual void visit(ir_dereference_array *); 343 virtual void visit(ir_dereference_record *); 344 virtual void visit(ir_assignment *); 345 virtual void visit(ir_constant *); 346 virtual void visit(ir_call *); 347 virtual void visit(ir_return *); 348 virtual void visit(ir_discard *); 349 virtual void visit(ir_texture *); 350 virtual void visit(ir_if *); 351 /*@}*/ 352 353 st_src_reg result; 354 355 /** List of variable_storage */ 356 exec_list variables; 357 358 /** List of immediate_storage */ 359 exec_list immediates; 360 int num_immediates; 361 362 /** List of function_entry */ 363 exec_list function_signatures; 364 int next_signature_id; 365 366 /** List of glsl_to_tgsi_instruction */ 367 exec_list instructions; 368 369 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op); 370 371 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 372 st_dst_reg dst, st_src_reg src0); 373 374 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 375 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 376 377 glsl_to_tgsi_instruction *emit(ir_instruction *ir, unsigned op, 378 st_dst_reg dst, 379 st_src_reg src0, st_src_reg src1, st_src_reg src2); 380 381 unsigned get_opcode(ir_instruction *ir, unsigned op, 382 st_dst_reg dst, 383 st_src_reg src0, st_src_reg src1); 384 385 /** 386 * Emit the correct dot-product instruction for the type of arguments 387 */ 388 glsl_to_tgsi_instruction *emit_dp(ir_instruction *ir, 389 st_dst_reg dst, 390 st_src_reg src0, 391 st_src_reg src1, 392 unsigned elements); 393 394 void emit_scalar(ir_instruction *ir, unsigned op, 395 st_dst_reg dst, st_src_reg src0); 396 397 void emit_scalar(ir_instruction *ir, unsigned op, 398 st_dst_reg dst, st_src_reg src0, st_src_reg src1); 399 400 void try_emit_float_set(ir_instruction *ir, unsigned op, st_dst_reg dst); 401 402 void emit_arl(ir_instruction *ir, st_dst_reg dst, st_src_reg src0); 403 404 void emit_scs(ir_instruction *ir, unsigned op, 405 st_dst_reg dst, const st_src_reg &src); 406 407 bool try_emit_mad(ir_expression *ir, 408 int mul_operand); 409 bool try_emit_mad_for_and_not(ir_expression *ir, 410 int mul_operand); 411 bool try_emit_sat(ir_expression *ir); 412 413 void emit_swz(ir_expression *ir); 414 415 bool process_move_condition(ir_rvalue *ir); 416 417 void simplify_cmp(void); 418 419 void rename_temp_register(int index, int new_index); 420 int get_first_temp_read(int index); 421 int get_first_temp_write(int index); 422 int get_last_temp_read(int index); 423 int get_last_temp_write(int index); 424 425 void copy_propagate(void); 426 void eliminate_dead_code(void); 427 int eliminate_dead_code_advanced(void); 428 void merge_registers(void); 429 void renumber_registers(void); 430 431 void *mem_ctx; 432}; 433 434static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR); 435 436static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR); 437 438static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT); 439 440static void 441fail_link(struct gl_shader_program *prog, const char *fmt, ...) PRINTFLIKE(2, 3); 442 443static void 444fail_link(struct gl_shader_program *prog, const char *fmt, ...) 445{ 446 va_list args; 447 va_start(args, fmt); 448 ralloc_vasprintf_append(&prog->InfoLog, fmt, args); 449 va_end(args); 450 451 prog->LinkStatus = GL_FALSE; 452} 453 454static int 455swizzle_for_size(int size) 456{ 457 int size_swizzles[4] = { 458 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X), 459 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y), 460 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z), 461 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W), 462 }; 463 464 assert((size >= 1) && (size <= 4)); 465 return size_swizzles[size - 1]; 466} 467 468static bool 469is_tex_instruction(unsigned opcode) 470{ 471 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 472 return info->is_tex; 473} 474 475static unsigned 476num_inst_dst_regs(unsigned opcode) 477{ 478 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 479 return info->num_dst; 480} 481 482static unsigned 483num_inst_src_regs(unsigned opcode) 484{ 485 const tgsi_opcode_info* info = tgsi_get_opcode_info(opcode); 486 return info->is_tex ? info->num_src - 1 : info->num_src; 487} 488 489glsl_to_tgsi_instruction * 490glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 491 st_dst_reg dst, 492 st_src_reg src0, st_src_reg src1, st_src_reg src2) 493{ 494 glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction(); 495 int num_reladdr = 0, i; 496 497 op = get_opcode(ir, op, dst, src0, src1); 498 499 /* If we have to do relative addressing, we want to load the ARL 500 * reg directly for one of the regs, and preload the other reladdr 501 * sources into temps. 502 */ 503 num_reladdr += dst.reladdr != NULL; 504 num_reladdr += src0.reladdr != NULL; 505 num_reladdr += src1.reladdr != NULL; 506 num_reladdr += src2.reladdr != NULL; 507 508 reladdr_to_temp(ir, &src2, &num_reladdr); 509 reladdr_to_temp(ir, &src1, &num_reladdr); 510 reladdr_to_temp(ir, &src0, &num_reladdr); 511 512 if (dst.reladdr) { 513 emit_arl(ir, address_reg, *dst.reladdr); 514 num_reladdr--; 515 } 516 assert(num_reladdr == 0); 517 518 inst->op = op; 519 inst->dst = dst; 520 inst->src[0] = src0; 521 inst->src[1] = src1; 522 inst->src[2] = src2; 523 inst->ir = ir; 524 inst->dead_mask = 0; 525 526 inst->function = NULL; 527 528 if (op == TGSI_OPCODE_ARL || op == TGSI_OPCODE_UARL) 529 this->num_address_regs = 1; 530 531 /* Update indirect addressing status used by TGSI */ 532 if (dst.reladdr) { 533 switch(dst.file) { 534 case PROGRAM_TEMPORARY: 535 this->indirect_addr_temps = true; 536 break; 537 case PROGRAM_LOCAL_PARAM: 538 case PROGRAM_ENV_PARAM: 539 case PROGRAM_STATE_VAR: 540 case PROGRAM_NAMED_PARAM: 541 case PROGRAM_CONSTANT: 542 case PROGRAM_UNIFORM: 543 this->indirect_addr_consts = true; 544 break; 545 case PROGRAM_IMMEDIATE: 546 assert(!"immediates should not have indirect addressing"); 547 break; 548 default: 549 break; 550 } 551 } 552 else { 553 for (i=0; i<3; i++) { 554 if(inst->src[i].reladdr) { 555 switch(inst->src[i].file) { 556 case PROGRAM_TEMPORARY: 557 this->indirect_addr_temps = true; 558 break; 559 case PROGRAM_LOCAL_PARAM: 560 case PROGRAM_ENV_PARAM: 561 case PROGRAM_STATE_VAR: 562 case PROGRAM_NAMED_PARAM: 563 case PROGRAM_CONSTANT: 564 case PROGRAM_UNIFORM: 565 this->indirect_addr_consts = true; 566 break; 567 case PROGRAM_IMMEDIATE: 568 assert(!"immediates should not have indirect addressing"); 569 break; 570 default: 571 break; 572 } 573 } 574 } 575 } 576 577 this->instructions.push_tail(inst); 578 579 if (native_integers) 580 try_emit_float_set(ir, op, dst); 581 582 return inst; 583} 584 585 586glsl_to_tgsi_instruction * 587glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 588 st_dst_reg dst, st_src_reg src0, st_src_reg src1) 589{ 590 return emit(ir, op, dst, src0, src1, undef_src); 591} 592 593glsl_to_tgsi_instruction * 594glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op, 595 st_dst_reg dst, st_src_reg src0) 596{ 597 assert(dst.writemask != 0); 598 return emit(ir, op, dst, src0, undef_src, undef_src); 599} 600 601glsl_to_tgsi_instruction * 602glsl_to_tgsi_visitor::emit(ir_instruction *ir, unsigned op) 603{ 604 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src); 605} 606 607 /** 608 * Emits the code to convert the result of float SET instructions to integers. 609 */ 610void 611glsl_to_tgsi_visitor::try_emit_float_set(ir_instruction *ir, unsigned op, 612 st_dst_reg dst) 613{ 614 if ((op == TGSI_OPCODE_SEQ || 615 op == TGSI_OPCODE_SNE || 616 op == TGSI_OPCODE_SGE || 617 op == TGSI_OPCODE_SLT)) 618 { 619 st_src_reg src = st_src_reg(dst); 620 src.negate = ~src.negate; 621 dst.type = GLSL_TYPE_FLOAT; 622 emit(ir, TGSI_OPCODE_F2I, dst, src); 623 } 624} 625 626/** 627 * Determines whether to use an integer, unsigned integer, or float opcode 628 * based on the operands and input opcode, then emits the result. 629 */ 630unsigned 631glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, 632 st_dst_reg dst, 633 st_src_reg src0, st_src_reg src1) 634{ 635 int type = GLSL_TYPE_FLOAT; 636 637 if (src0.type == GLSL_TYPE_FLOAT || src1.type == GLSL_TYPE_FLOAT) 638 type = GLSL_TYPE_FLOAT; 639 else if (native_integers) 640 type = src0.type == GLSL_TYPE_BOOL ? GLSL_TYPE_INT : src0.type; 641 642#define case4(c, f, i, u) \ 643 case TGSI_OPCODE_##c: \ 644 if (type == GLSL_TYPE_INT) op = TGSI_OPCODE_##i; \ 645 else if (type == GLSL_TYPE_UINT) op = TGSI_OPCODE_##u; \ 646 else op = TGSI_OPCODE_##f; \ 647 break; 648#define case3(f, i, u) case4(f, f, i, u) 649#define case2fi(f, i) case4(f, f, i, i) 650#define case2iu(i, u) case4(i, LAST, i, u) 651 652 switch(op) { 653 case2fi(ADD, UADD); 654 case2fi(MUL, UMUL); 655 case2fi(MAD, UMAD); 656 case3(DIV, IDIV, UDIV); 657 case3(MAX, IMAX, UMAX); 658 case3(MIN, IMIN, UMIN); 659 case2iu(MOD, UMOD); 660 661 case2fi(SEQ, USEQ); 662 case2fi(SNE, USNE); 663 case3(SGE, ISGE, USGE); 664 case3(SLT, ISLT, USLT); 665 666 case2iu(ISHR, USHR); 667 668 default: break; 669 } 670 671 assert(op != TGSI_OPCODE_LAST); 672 return op; 673} 674 675glsl_to_tgsi_instruction * 676glsl_to_tgsi_visitor::emit_dp(ir_instruction *ir, 677 st_dst_reg dst, st_src_reg src0, st_src_reg src1, 678 unsigned elements) 679{ 680 static const unsigned dot_opcodes[] = { 681 TGSI_OPCODE_DP2, TGSI_OPCODE_DP3, TGSI_OPCODE_DP4 682 }; 683 684 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1); 685} 686 687/** 688 * Emits TGSI scalar opcodes to produce unique answers across channels. 689 * 690 * Some TGSI opcodes are scalar-only, like ARB_fp/vp. The src X 691 * channel determines the result across all channels. So to do a vec4 692 * of this operation, we want to emit a scalar per source channel used 693 * to produce dest channels. 694 */ 695void 696glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, 697 st_dst_reg dst, 698 st_src_reg orig_src0, st_src_reg orig_src1) 699{ 700 int i, j; 701 int done_mask = ~dst.writemask; 702 703 /* TGSI RCP is a scalar operation splatting results to all channels, 704 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our 705 * dst channels. 706 */ 707 for (i = 0; i < 4; i++) { 708 GLuint this_mask = (1 << i); 709 glsl_to_tgsi_instruction *inst; 710 st_src_reg src0 = orig_src0; 711 st_src_reg src1 = orig_src1; 712 713 if (done_mask & this_mask) 714 continue; 715 716 GLuint src0_swiz = GET_SWZ(src0.swizzle, i); 717 GLuint src1_swiz = GET_SWZ(src1.swizzle, i); 718 for (j = i + 1; j < 4; j++) { 719 /* If there is another enabled component in the destination that is 720 * derived from the same inputs, generate its value on this pass as 721 * well. 722 */ 723 if (!(done_mask & (1 << j)) && 724 GET_SWZ(src0.swizzle, j) == src0_swiz && 725 GET_SWZ(src1.swizzle, j) == src1_swiz) { 726 this_mask |= (1 << j); 727 } 728 } 729 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, 730 src0_swiz, src0_swiz); 731 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz, 732 src1_swiz, src1_swiz); 733 734 inst = emit(ir, op, dst, src0, src1); 735 inst->dst.writemask = this_mask; 736 done_mask |= this_mask; 737 } 738} 739 740void 741glsl_to_tgsi_visitor::emit_scalar(ir_instruction *ir, unsigned op, 742 st_dst_reg dst, st_src_reg src0) 743{ 744 st_src_reg undef = undef_src; 745 746 undef.swizzle = SWIZZLE_XXXX; 747 748 emit_scalar(ir, op, dst, src0, undef); 749} 750 751void 752glsl_to_tgsi_visitor::emit_arl(ir_instruction *ir, 753 st_dst_reg dst, st_src_reg src0) 754{ 755 int op = TGSI_OPCODE_ARL; 756 757 if (src0.type == GLSL_TYPE_INT || src0.type == GLSL_TYPE_UINT) 758 op = TGSI_OPCODE_UARL; 759 760 emit(NULL, op, dst, src0); 761} 762 763/** 764 * Emit an TGSI_OPCODE_SCS instruction 765 * 766 * The \c SCS opcode functions a bit differently than the other TGSI opcodes. 767 * Instead of splatting its result across all four components of the 768 * destination, it writes one value to the \c x component and another value to 769 * the \c y component. 770 * 771 * \param ir IR instruction being processed 772 * \param op Either \c TGSI_OPCODE_SIN or \c TGSI_OPCODE_COS depending 773 * on which value is desired. 774 * \param dst Destination register 775 * \param src Source register 776 */ 777void 778glsl_to_tgsi_visitor::emit_scs(ir_instruction *ir, unsigned op, 779 st_dst_reg dst, 780 const st_src_reg &src) 781{ 782 /* Vertex programs cannot use the SCS opcode. 783 */ 784 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) { 785 emit_scalar(ir, op, dst, src); 786 return; 787 } 788 789 const unsigned component = (op == TGSI_OPCODE_SIN) ? 0 : 1; 790 const unsigned scs_mask = (1U << component); 791 int done_mask = ~dst.writemask; 792 st_src_reg tmp; 793 794 assert(op == TGSI_OPCODE_SIN || op == TGSI_OPCODE_COS); 795 796 /* If there are compnents in the destination that differ from the component 797 * that will be written by the SCS instrution, we'll need a temporary. 798 */ 799 if (scs_mask != unsigned(dst.writemask)) { 800 tmp = get_temp(glsl_type::vec4_type); 801 } 802 803 for (unsigned i = 0; i < 4; i++) { 804 unsigned this_mask = (1U << i); 805 st_src_reg src0 = src; 806 807 if ((done_mask & this_mask) != 0) 808 continue; 809 810 /* The source swizzle specified which component of the source generates 811 * sine / cosine for the current component in the destination. The SCS 812 * instruction requires that this value be swizzle to the X component. 813 * Replace the current swizzle with a swizzle that puts the source in 814 * the X component. 815 */ 816 unsigned src0_swiz = GET_SWZ(src.swizzle, i); 817 818 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz, 819 src0_swiz, src0_swiz); 820 for (unsigned j = i + 1; j < 4; j++) { 821 /* If there is another enabled component in the destination that is 822 * derived from the same inputs, generate its value on this pass as 823 * well. 824 */ 825 if (!(done_mask & (1 << j)) && 826 GET_SWZ(src0.swizzle, j) == src0_swiz) { 827 this_mask |= (1 << j); 828 } 829 } 830 831 if (this_mask != scs_mask) { 832 glsl_to_tgsi_instruction *inst; 833 st_dst_reg tmp_dst = st_dst_reg(tmp); 834 835 /* Emit the SCS instruction. 836 */ 837 inst = emit(ir, TGSI_OPCODE_SCS, tmp_dst, src0); 838 inst->dst.writemask = scs_mask; 839 840 /* Move the result of the SCS instruction to the desired location in 841 * the destination. 842 */ 843 tmp.swizzle = MAKE_SWIZZLE4(component, component, 844 component, component); 845 inst = emit(ir, TGSI_OPCODE_SCS, dst, tmp); 846 inst->dst.writemask = this_mask; 847 } else { 848 /* Emit the SCS instruction to write directly to the destination. 849 */ 850 glsl_to_tgsi_instruction *inst = emit(ir, TGSI_OPCODE_SCS, dst, src0); 851 inst->dst.writemask = scs_mask; 852 } 853 854 done_mask |= this_mask; 855 } 856} 857 858int 859glsl_to_tgsi_visitor::add_constant(gl_register_file file, 860 gl_constant_value values[4], int size, int datatype, 861 GLuint *swizzle_out) 862{ 863 if (file == PROGRAM_CONSTANT) { 864 return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, 865 size, datatype, swizzle_out); 866 } else { 867 int index = 0; 868 immediate_storage *entry; 869 assert(file == PROGRAM_IMMEDIATE); 870 871 /* Search immediate storage to see if we already have an identical 872 * immediate that we can use instead of adding a duplicate entry. 873 */ 874 foreach_iter(exec_list_iterator, iter, this->immediates) { 875 entry = (immediate_storage *)iter.get(); 876 877 if (entry->size == size && 878 entry->type == datatype && 879 !memcmp(entry->values, values, size * sizeof(gl_constant_value))) { 880 return index; 881 } 882 index++; 883 } 884 885 /* Add this immediate to the list. */ 886 entry = new(mem_ctx) immediate_storage(values, size, datatype); 887 this->immediates.push_tail(entry); 888 this->num_immediates++; 889 return index; 890 } 891} 892 893st_src_reg 894glsl_to_tgsi_visitor::st_src_reg_for_float(float val) 895{ 896 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_FLOAT); 897 union gl_constant_value uval; 898 899 uval.f = val; 900 src.index = add_constant(src.file, &uval, 1, GL_FLOAT, &src.swizzle); 901 902 return src; 903} 904 905st_src_reg 906glsl_to_tgsi_visitor::st_src_reg_for_int(int val) 907{ 908 st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_INT); 909 union gl_constant_value uval; 910 911 assert(native_integers); 912 913 uval.i = val; 914 src.index = add_constant(src.file, &uval, 1, GL_INT, &src.swizzle); 915 916 return src; 917} 918 919st_src_reg 920glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val) 921{ 922 if (native_integers) 923 return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) : 924 st_src_reg_for_int(val); 925 else 926 return st_src_reg_for_float(val); 927} 928 929static int 930type_size(const struct glsl_type *type) 931{ 932 unsigned int i; 933 int size; 934 935 switch (type->base_type) { 936 case GLSL_TYPE_UINT: 937 case GLSL_TYPE_INT: 938 case GLSL_TYPE_FLOAT: 939 case GLSL_TYPE_BOOL: 940 if (type->is_matrix()) { 941 return type->matrix_columns; 942 } else { 943 /* Regardless of size of vector, it gets a vec4. This is bad 944 * packing for things like floats, but otherwise arrays become a 945 * mess. Hopefully a later pass over the code can pack scalars 946 * down if appropriate. 947 */ 948 return 1; 949 } 950 case GLSL_TYPE_ARRAY: 951 assert(type->length > 0); 952 return type_size(type->fields.array) * type->length; 953 case GLSL_TYPE_STRUCT: 954 size = 0; 955 for (i = 0; i < type->length; i++) { 956 size += type_size(type->fields.structure[i].type); 957 } 958 return size; 959 case GLSL_TYPE_SAMPLER: 960 /* Samplers take up one slot in UNIFORMS[], but they're baked in 961 * at link time. 962 */ 963 return 1; 964 default: 965 assert(0); 966 return 0; 967 } 968} 969 970/** 971 * In the initial pass of codegen, we assign temporary numbers to 972 * intermediate results. (not SSA -- variable assignments will reuse 973 * storage). 974 */ 975st_src_reg 976glsl_to_tgsi_visitor::get_temp(const glsl_type *type) 977{ 978 st_src_reg src; 979 980 src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT; 981 src.file = PROGRAM_TEMPORARY; 982 src.index = next_temp; 983 src.reladdr = NULL; 984 next_temp += type_size(type); 985 986 if (type->is_array() || type->is_record()) { 987 src.swizzle = SWIZZLE_NOOP; 988 } else { 989 src.swizzle = swizzle_for_size(type->vector_elements); 990 } 991 src.negate = 0; 992 993 return src; 994} 995 996variable_storage * 997glsl_to_tgsi_visitor::find_variable_storage(ir_variable *var) 998{ 999 1000 variable_storage *entry; 1001 1002 foreach_iter(exec_list_iterator, iter, this->variables) { 1003 entry = (variable_storage *)iter.get(); 1004 1005 if (entry->var == var) 1006 return entry; 1007 } 1008 1009 return NULL; 1010} 1011 1012void 1013glsl_to_tgsi_visitor::visit(ir_variable *ir) 1014{ 1015 if (strcmp(ir->name, "gl_FragCoord") == 0) { 1016 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; 1017 1018 fp->OriginUpperLeft = ir->origin_upper_left; 1019 fp->PixelCenterInteger = ir->pixel_center_integer; 1020 } 1021 1022 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) { 1023 unsigned int i; 1024 const ir_state_slot *const slots = ir->state_slots; 1025 assert(ir->state_slots != NULL); 1026 1027 /* Check if this statevar's setup in the STATE file exactly 1028 * matches how we'll want to reference it as a 1029 * struct/array/whatever. If not, then we need to move it into 1030 * temporary storage and hope that it'll get copy-propagated 1031 * out. 1032 */ 1033 for (i = 0; i < ir->num_state_slots; i++) { 1034 if (slots[i].swizzle != SWIZZLE_XYZW) { 1035 break; 1036 } 1037 } 1038 1039 variable_storage *storage; 1040 st_dst_reg dst; 1041 if (i == ir->num_state_slots) { 1042 /* We'll set the index later. */ 1043 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1); 1044 this->variables.push_tail(storage); 1045 1046 dst = undef_dst; 1047 } else { 1048 /* The variable_storage constructor allocates slots based on the size 1049 * of the type. However, this had better match the number of state 1050 * elements that we're going to copy into the new temporary. 1051 */ 1052 assert((int) ir->num_state_slots == type_size(ir->type)); 1053 1054 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY, 1055 this->next_temp); 1056 this->variables.push_tail(storage); 1057 this->next_temp += type_size(ir->type); 1058 1059 dst = st_dst_reg(st_src_reg(PROGRAM_TEMPORARY, storage->index, 1060 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT)); 1061 } 1062 1063 1064 for (unsigned int i = 0; i < ir->num_state_slots; i++) { 1065 int index = _mesa_add_state_reference(this->prog->Parameters, 1066 (gl_state_index *)slots[i].tokens); 1067 1068 if (storage->file == PROGRAM_STATE_VAR) { 1069 if (storage->index == -1) { 1070 storage->index = index; 1071 } else { 1072 assert(index == storage->index + (int)i); 1073 } 1074 } else { 1075 st_src_reg src(PROGRAM_STATE_VAR, index, 1076 native_integers ? ir->type->base_type : GLSL_TYPE_FLOAT); 1077 src.swizzle = slots[i].swizzle; 1078 emit(ir, TGSI_OPCODE_MOV, dst, src); 1079 /* even a float takes up a whole vec4 reg in a struct/array. */ 1080 dst.index++; 1081 } 1082 } 1083 1084 if (storage->file == PROGRAM_TEMPORARY && 1085 dst.index != storage->index + (int) ir->num_state_slots) { 1086 fail_link(this->shader_program, 1087 "failed to load builtin uniform `%s' (%d/%d regs loaded)\n", 1088 ir->name, dst.index - storage->index, 1089 type_size(ir->type)); 1090 } 1091 } 1092} 1093 1094void 1095glsl_to_tgsi_visitor::visit(ir_loop *ir) 1096{ 1097 ir_dereference_variable *counter = NULL; 1098 1099 if (ir->counter != NULL) 1100 counter = new(ir) ir_dereference_variable(ir->counter); 1101 1102 if (ir->from != NULL) { 1103 assert(ir->counter != NULL); 1104 1105 ir_assignment *a = new(ir) ir_assignment(counter, ir->from, NULL); 1106 1107 a->accept(this); 1108 delete a; 1109 } 1110 1111 emit(NULL, TGSI_OPCODE_BGNLOOP); 1112 1113 if (ir->to) { 1114 ir_expression *e = 1115 new(ir) ir_expression(ir->cmp, glsl_type::bool_type, 1116 counter, ir->to); 1117 ir_if *if_stmt = new(ir) ir_if(e); 1118 1119 ir_loop_jump *brk = new(ir) ir_loop_jump(ir_loop_jump::jump_break); 1120 1121 if_stmt->then_instructions.push_tail(brk); 1122 1123 if_stmt->accept(this); 1124 1125 delete if_stmt; 1126 delete e; 1127 delete brk; 1128 } 1129 1130 visit_exec_list(&ir->body_instructions, this); 1131 1132 if (ir->increment) { 1133 ir_expression *e = 1134 new(ir) ir_expression(ir_binop_add, counter->type, 1135 counter, ir->increment); 1136 1137 ir_assignment *a = new(ir) ir_assignment(counter, e, NULL); 1138 1139 a->accept(this); 1140 delete a; 1141 delete e; 1142 } 1143 1144 emit(NULL, TGSI_OPCODE_ENDLOOP); 1145} 1146 1147void 1148glsl_to_tgsi_visitor::visit(ir_loop_jump *ir) 1149{ 1150 switch (ir->mode) { 1151 case ir_loop_jump::jump_break: 1152 emit(NULL, TGSI_OPCODE_BRK); 1153 break; 1154 case ir_loop_jump::jump_continue: 1155 emit(NULL, TGSI_OPCODE_CONT); 1156 break; 1157 } 1158} 1159 1160 1161void 1162glsl_to_tgsi_visitor::visit(ir_function_signature *ir) 1163{ 1164 assert(0); 1165 (void)ir; 1166} 1167 1168void 1169glsl_to_tgsi_visitor::visit(ir_function *ir) 1170{ 1171 /* Ignore function bodies other than main() -- we shouldn't see calls to 1172 * them since they should all be inlined before we get to glsl_to_tgsi. 1173 */ 1174 if (strcmp(ir->name, "main") == 0) { 1175 const ir_function_signature *sig; 1176 exec_list empty; 1177 1178 sig = ir->matching_signature(&empty); 1179 1180 assert(sig); 1181 1182 foreach_iter(exec_list_iterator, iter, sig->body) { 1183 ir_instruction *ir = (ir_instruction *)iter.get(); 1184 1185 ir->accept(this); 1186 } 1187 } 1188} 1189 1190bool 1191glsl_to_tgsi_visitor::try_emit_mad(ir_expression *ir, int mul_operand) 1192{ 1193 int nonmul_operand = 1 - mul_operand; 1194 st_src_reg a, b, c; 1195 st_dst_reg result_dst; 1196 1197 ir_expression *expr = ir->operands[mul_operand]->as_expression(); 1198 if (!expr || expr->operation != ir_binop_mul) 1199 return false; 1200 1201 expr->operands[0]->accept(this); 1202 a = this->result; 1203 expr->operands[1]->accept(this); 1204 b = this->result; 1205 ir->operands[nonmul_operand]->accept(this); 1206 c = this->result; 1207 1208 this->result = get_temp(ir->type); 1209 result_dst = st_dst_reg(this->result); 1210 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1211 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); 1212 1213 return true; 1214} 1215 1216/** 1217 * Emit MAD(a, -b, a) instead of AND(a, NOT(b)) 1218 * 1219 * The logic values are 1.0 for true and 0.0 for false. Logical-and is 1220 * implemented using multiplication, and logical-or is implemented using 1221 * addition. Logical-not can be implemented as (true - x), or (1.0 - x). 1222 * As result, the logical expression (a & !b) can be rewritten as: 1223 * 1224 * - a * !b 1225 * - a * (1 - b) 1226 * - (a * 1) - (a * b) 1227 * - a + -(a * b) 1228 * - a + (a * -b) 1229 * 1230 * This final expression can be implemented as a single MAD(a, -b, a) 1231 * instruction. 1232 */ 1233bool 1234glsl_to_tgsi_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand) 1235{ 1236 const int other_operand = 1 - try_operand; 1237 st_src_reg a, b; 1238 1239 ir_expression *expr = ir->operands[try_operand]->as_expression(); 1240 if (!expr || expr->operation != ir_unop_logic_not) 1241 return false; 1242 1243 ir->operands[other_operand]->accept(this); 1244 a = this->result; 1245 expr->operands[0]->accept(this); 1246 b = this->result; 1247 1248 b.negate = ~b.negate; 1249 1250 this->result = get_temp(ir->type); 1251 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); 1252 1253 return true; 1254} 1255 1256bool 1257glsl_to_tgsi_visitor::try_emit_sat(ir_expression *ir) 1258{ 1259 /* Saturates were only introduced to vertex programs in 1260 * NV_vertex_program3, so don't give them to drivers in the VP. 1261 */ 1262 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) 1263 return false; 1264 1265 ir_rvalue *sat_src = ir->as_rvalue_to_saturate(); 1266 if (!sat_src) 1267 return false; 1268 1269 sat_src->accept(this); 1270 st_src_reg src = this->result; 1271 1272 /* If we generated an expression instruction into a temporary in 1273 * processing the saturate's operand, apply the saturate to that 1274 * instruction. Otherwise, generate a MOV to do the saturate. 1275 * 1276 * Note that we have to be careful to only do this optimization if 1277 * the instruction in question was what generated src->result. For 1278 * example, ir_dereference_array might generate a MUL instruction 1279 * to create the reladdr, and return us a src reg using that 1280 * reladdr. That MUL result is not the value we're trying to 1281 * saturate. 1282 */ 1283 ir_expression *sat_src_expr = sat_src->as_expression(); 1284 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul || 1285 sat_src_expr->operation == ir_binop_add || 1286 sat_src_expr->operation == ir_binop_dot)) { 1287 glsl_to_tgsi_instruction *new_inst; 1288 new_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 1289 new_inst->saturate = true; 1290 } else { 1291 this->result = get_temp(ir->type); 1292 st_dst_reg result_dst = st_dst_reg(this->result); 1293 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1294 glsl_to_tgsi_instruction *inst; 1295 inst = emit(ir, TGSI_OPCODE_MOV, result_dst, src); 1296 inst->saturate = true; 1297 } 1298 1299 return true; 1300} 1301 1302void 1303glsl_to_tgsi_visitor::reladdr_to_temp(ir_instruction *ir, 1304 st_src_reg *reg, int *num_reladdr) 1305{ 1306 if (!reg->reladdr) 1307 return; 1308 1309 emit_arl(ir, address_reg, *reg->reladdr); 1310 1311 if (*num_reladdr != 1) { 1312 st_src_reg temp = get_temp(glsl_type::vec4_type); 1313 1314 emit(ir, TGSI_OPCODE_MOV, st_dst_reg(temp), *reg); 1315 *reg = temp; 1316 } 1317 1318 (*num_reladdr)--; 1319} 1320 1321void 1322glsl_to_tgsi_visitor::visit(ir_expression *ir) 1323{ 1324 unsigned int operand; 1325 st_src_reg op[Elements(ir->operands)]; 1326 st_src_reg result_src; 1327 st_dst_reg result_dst; 1328 1329 /* Quick peephole: Emit MAD(a, b, c) instead of ADD(MUL(a, b), c) 1330 */ 1331 if (ir->operation == ir_binop_add) { 1332 if (try_emit_mad(ir, 1)) 1333 return; 1334 if (try_emit_mad(ir, 0)) 1335 return; 1336 } 1337 1338 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b)) 1339 */ 1340 if (ir->operation == ir_binop_logic_and) { 1341 if (try_emit_mad_for_and_not(ir, 1)) 1342 return; 1343 if (try_emit_mad_for_and_not(ir, 0)) 1344 return; 1345 } 1346 1347 if (try_emit_sat(ir)) 1348 return; 1349 1350 if (ir->operation == ir_quadop_vector) 1351 assert(!"ir_quadop_vector should have been lowered"); 1352 1353 for (operand = 0; operand < ir->get_num_operands(); operand++) { 1354 this->result.file = PROGRAM_UNDEFINED; 1355 ir->operands[operand]->accept(this); 1356 if (this->result.file == PROGRAM_UNDEFINED) { 1357 ir_print_visitor v; 1358 printf("Failed to get tree for expression operand:\n"); 1359 ir->operands[operand]->accept(&v); 1360 exit(1); 1361 } 1362 op[operand] = this->result; 1363 1364 /* Matrix expression operands should have been broken down to vector 1365 * operations already. 1366 */ 1367 assert(!ir->operands[operand]->type->is_matrix()); 1368 } 1369 1370 int vector_elements = ir->operands[0]->type->vector_elements; 1371 if (ir->operands[1]) { 1372 vector_elements = MAX2(vector_elements, 1373 ir->operands[1]->type->vector_elements); 1374 } 1375 1376 this->result.file = PROGRAM_UNDEFINED; 1377 1378 /* Storage for our result. Ideally for an assignment we'd be using 1379 * the actual storage for the result here, instead. 1380 */ 1381 result_src = get_temp(ir->type); 1382 /* convenience for the emit functions below. */ 1383 result_dst = st_dst_reg(result_src); 1384 /* Limit writes to the channels that will be used by result_src later. 1385 * This does limit this temp's use as a temporary for multi-instruction 1386 * sequences. 1387 */ 1388 result_dst.writemask = (1 << ir->type->vector_elements) - 1; 1389 1390 switch (ir->operation) { 1391 case ir_unop_logic_not: 1392 if (result_dst.type != GLSL_TYPE_FLOAT) 1393 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); 1394 else { 1395 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many 1396 * older GPUs implement SEQ using multiple instructions (i915 uses two 1397 * SGE instructions and a MUL instruction). Since our logic values are 1398 * 0.0 and 1.0, 1-x also implements !x. 1399 */ 1400 op[0].negate = ~op[0].negate; 1401 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], st_src_reg_for_float(1.0)); 1402 } 1403 break; 1404 case ir_unop_neg: 1405 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT) 1406 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); 1407 else { 1408 op[0].negate = ~op[0].negate; 1409 result_src = op[0]; 1410 } 1411 break; 1412 case ir_unop_abs: 1413 if (result_dst.type == GLSL_TYPE_INT || result_dst.type == GLSL_TYPE_UINT) 1414 emit(ir, TGSI_OPCODE_IABS, result_dst, op[0]); 1415 else 1416 emit(ir, TGSI_OPCODE_ABS, result_dst, op[0]); 1417 break; 1418 case ir_unop_sign: 1419 emit(ir, TGSI_OPCODE_SSG, result_dst, op[0]); 1420 break; 1421 case ir_unop_rcp: 1422 emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, op[0]); 1423 break; 1424 1425 case ir_unop_exp2: 1426 emit_scalar(ir, TGSI_OPCODE_EX2, result_dst, op[0]); 1427 break; 1428 case ir_unop_exp: 1429 case ir_unop_log: 1430 assert(!"not reached: should be handled by ir_explog_to_explog2"); 1431 break; 1432 case ir_unop_log2: 1433 emit_scalar(ir, TGSI_OPCODE_LG2, result_dst, op[0]); 1434 break; 1435 case ir_unop_sin: 1436 emit_scalar(ir, TGSI_OPCODE_SIN, result_dst, op[0]); 1437 break; 1438 case ir_unop_cos: 1439 emit_scalar(ir, TGSI_OPCODE_COS, result_dst, op[0]); 1440 break; 1441 case ir_unop_sin_reduced: 1442 emit_scs(ir, TGSI_OPCODE_SIN, result_dst, op[0]); 1443 break; 1444 case ir_unop_cos_reduced: 1445 emit_scs(ir, TGSI_OPCODE_COS, result_dst, op[0]); 1446 break; 1447 1448 case ir_unop_dFdx: 1449 emit(ir, TGSI_OPCODE_DDX, result_dst, op[0]); 1450 break; 1451 case ir_unop_dFdy: 1452 op[0].negate = ~op[0].negate; 1453 emit(ir, TGSI_OPCODE_DDY, result_dst, op[0]); 1454 break; 1455 1456 case ir_unop_noise: { 1457 /* At some point, a motivated person could add a better 1458 * implementation of noise. Currently not even the nvidia 1459 * binary drivers do anything more than this. In any case, the 1460 * place to do this is in the GL state tracker, not the poor 1461 * driver. 1462 */ 1463 emit(ir, TGSI_OPCODE_MOV, result_dst, st_src_reg_for_float(0.5)); 1464 break; 1465 } 1466 1467 case ir_binop_add: 1468 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); 1469 break; 1470 case ir_binop_sub: 1471 emit(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]); 1472 break; 1473 1474 case ir_binop_mul: 1475 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); 1476 break; 1477 case ir_binop_div: 1478 if (result_dst.type == GLSL_TYPE_FLOAT) 1479 assert(!"not reached: should be handled by ir_div_to_mul_rcp"); 1480 else 1481 emit(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); 1482 break; 1483 case ir_binop_mod: 1484 if (result_dst.type == GLSL_TYPE_FLOAT) 1485 assert(!"ir_binop_mod should have been converted to b * fract(a/b)"); 1486 else 1487 emit(ir, TGSI_OPCODE_MOD, result_dst, op[0], op[1]); 1488 break; 1489 1490 case ir_binop_less: 1491 emit(ir, TGSI_OPCODE_SLT, result_dst, op[0], op[1]); 1492 break; 1493 case ir_binop_greater: 1494 emit(ir, TGSI_OPCODE_SLT, result_dst, op[1], op[0]); 1495 break; 1496 case ir_binop_lequal: 1497 emit(ir, TGSI_OPCODE_SGE, result_dst, op[1], op[0]); 1498 break; 1499 case ir_binop_gequal: 1500 emit(ir, TGSI_OPCODE_SGE, result_dst, op[0], op[1]); 1501 break; 1502 case ir_binop_equal: 1503 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); 1504 break; 1505 case ir_binop_nequal: 1506 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1507 break; 1508 case ir_binop_all_equal: 1509 /* "==" operator producing a scalar boolean. */ 1510 if (ir->operands[0]->type->is_vector() || 1511 ir->operands[1]->type->is_vector()) { 1512 st_src_reg temp = get_temp(native_integers ? 1513 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : 1514 glsl_type::vec4_type); 1515 1516 if (native_integers) { 1517 st_dst_reg temp_dst = st_dst_reg(temp); 1518 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); 1519 1520 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); 1521 1522 /* Emit 1-3 AND operations to combine the SEQ results. */ 1523 switch (ir->operands[0]->type->vector_elements) { 1524 case 2: 1525 break; 1526 case 3: 1527 temp_dst.writemask = WRITEMASK_Y; 1528 temp1.swizzle = SWIZZLE_YYYY; 1529 temp2.swizzle = SWIZZLE_ZZZZ; 1530 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1531 break; 1532 case 4: 1533 temp_dst.writemask = WRITEMASK_X; 1534 temp1.swizzle = SWIZZLE_XXXX; 1535 temp2.swizzle = SWIZZLE_YYYY; 1536 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1537 temp_dst.writemask = WRITEMASK_Y; 1538 temp1.swizzle = SWIZZLE_ZZZZ; 1539 temp2.swizzle = SWIZZLE_WWWW; 1540 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); 1541 } 1542 1543 temp1.swizzle = SWIZZLE_XXXX; 1544 temp2.swizzle = SWIZZLE_YYYY; 1545 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2); 1546 } else { 1547 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); 1548 1549 /* After the dot-product, the value will be an integer on the 1550 * range [0,4]. Zero becomes 1.0, and positive values become zero. 1551 */ 1552 emit_dp(ir, result_dst, temp, temp, vector_elements); 1553 1554 /* Negating the result of the dot-product gives values on the range 1555 * [-4, 0]. Zero becomes 1.0, and negative values become zero. 1556 * This is achieved using SGE. 1557 */ 1558 st_src_reg sge_src = result_src; 1559 sge_src.negate = ~sge_src.negate; 1560 emit(ir, TGSI_OPCODE_SGE, result_dst, sge_src, st_src_reg_for_float(0.0)); 1561 } 1562 } else { 1563 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); 1564 } 1565 break; 1566 case ir_binop_any_nequal: 1567 /* "!=" operator producing a scalar boolean. */ 1568 if (ir->operands[0]->type->is_vector() || 1569 ir->operands[1]->type->is_vector()) { 1570 st_src_reg temp = get_temp(native_integers ? 1571 glsl_type::get_instance(ir->operands[0]->type->base_type, 4, 1) : 1572 glsl_type::vec4_type); 1573 emit(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); 1574 1575 if (native_integers) { 1576 st_dst_reg temp_dst = st_dst_reg(temp); 1577 st_src_reg temp1 = st_src_reg(temp), temp2 = st_src_reg(temp); 1578 1579 /* Emit 1-3 OR operations to combine the SNE results. */ 1580 switch (ir->operands[0]->type->vector_elements) { 1581 case 2: 1582 break; 1583 case 3: 1584 temp_dst.writemask = WRITEMASK_Y; 1585 temp1.swizzle = SWIZZLE_YYYY; 1586 temp2.swizzle = SWIZZLE_ZZZZ; 1587 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1588 break; 1589 case 4: 1590 temp_dst.writemask = WRITEMASK_X; 1591 temp1.swizzle = SWIZZLE_XXXX; 1592 temp2.swizzle = SWIZZLE_YYYY; 1593 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1594 temp_dst.writemask = WRITEMASK_Y; 1595 temp1.swizzle = SWIZZLE_ZZZZ; 1596 temp2.swizzle = SWIZZLE_WWWW; 1597 emit(ir, TGSI_OPCODE_OR, temp_dst, temp1, temp2); 1598 } 1599 1600 temp1.swizzle = SWIZZLE_XXXX; 1601 temp2.swizzle = SWIZZLE_YYYY; 1602 emit(ir, TGSI_OPCODE_OR, result_dst, temp1, temp2); 1603 } else { 1604 /* After the dot-product, the value will be an integer on the 1605 * range [0,4]. Zero stays zero, and positive values become 1.0. 1606 */ 1607 glsl_to_tgsi_instruction *const dp = 1608 emit_dp(ir, result_dst, temp, temp, vector_elements); 1609 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { 1610 /* The clamping to [0,1] can be done for free in the fragment 1611 * shader with a saturate. 1612 */ 1613 dp->saturate = true; 1614 } else { 1615 /* Negating the result of the dot-product gives values on the range 1616 * [-4, 0]. Zero stays zero, and negative values become 1.0. This 1617 * achieved using SLT. 1618 */ 1619 st_src_reg slt_src = result_src; 1620 slt_src.negate = ~slt_src.negate; 1621 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1622 } 1623 } 1624 } else { 1625 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1626 } 1627 break; 1628 1629 case ir_unop_any: { 1630 assert(ir->operands[0]->type->is_vector()); 1631 1632 /* After the dot-product, the value will be an integer on the 1633 * range [0,4]. Zero stays zero, and positive values become 1.0. 1634 */ 1635 glsl_to_tgsi_instruction *const dp = 1636 emit_dp(ir, result_dst, op[0], op[0], 1637 ir->operands[0]->type->vector_elements); 1638 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB && 1639 result_dst.type == GLSL_TYPE_FLOAT) { 1640 /* The clamping to [0,1] can be done for free in the fragment 1641 * shader with a saturate. 1642 */ 1643 dp->saturate = true; 1644 } else if (result_dst.type == GLSL_TYPE_FLOAT) { 1645 /* Negating the result of the dot-product gives values on the range 1646 * [-4, 0]. Zero stays zero, and negative values become 1.0. This 1647 * is achieved using SLT. 1648 */ 1649 st_src_reg slt_src = result_src; 1650 slt_src.negate = ~slt_src.negate; 1651 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1652 } 1653 else { 1654 /* Use SNE 0 if integers are being used as boolean values. */ 1655 emit(ir, TGSI_OPCODE_SNE, result_dst, result_src, st_src_reg_for_int(0)); 1656 } 1657 break; 1658 } 1659 1660 case ir_binop_logic_xor: 1661 if (native_integers) 1662 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); 1663 else 1664 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); 1665 break; 1666 1667 case ir_binop_logic_or: { 1668 if (native_integers) { 1669 /* If integers are used as booleans, we can use an actual "or" 1670 * instruction. 1671 */ 1672 assert(native_integers); 1673 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); 1674 } else { 1675 /* After the addition, the value will be an integer on the 1676 * range [0,2]. Zero stays zero, and positive values become 1.0. 1677 */ 1678 glsl_to_tgsi_instruction *add = 1679 emit(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); 1680 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { 1681 /* The clamping to [0,1] can be done for free in the fragment 1682 * shader with a saturate if floats are being used as boolean values. 1683 */ 1684 add->saturate = true; 1685 } else { 1686 /* Negating the result of the addition gives values on the range 1687 * [-2, 0]. Zero stays zero, and negative values become 1.0. This 1688 * is achieved using SLT. 1689 */ 1690 st_src_reg slt_src = result_src; 1691 slt_src.negate = ~slt_src.negate; 1692 emit(ir, TGSI_OPCODE_SLT, result_dst, slt_src, st_src_reg_for_float(0.0)); 1693 } 1694 } 1695 break; 1696 } 1697 1698 case ir_binop_logic_and: 1699 /* If native integers are disabled, the bool args are stored as float 0.0 1700 * or 1.0, so "mul" gives us "and". If they're enabled, just use the 1701 * actual AND opcode. 1702 */ 1703 if (native_integers) 1704 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); 1705 else 1706 emit(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); 1707 break; 1708 1709 case ir_binop_dot: 1710 assert(ir->operands[0]->type->is_vector()); 1711 assert(ir->operands[0]->type == ir->operands[1]->type); 1712 emit_dp(ir, result_dst, op[0], op[1], 1713 ir->operands[0]->type->vector_elements); 1714 break; 1715 1716 case ir_unop_sqrt: 1717 /* sqrt(x) = x * rsq(x). */ 1718 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); 1719 emit(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]); 1720 /* For incoming channels <= 0, set the result to 0. */ 1721 op[0].negate = ~op[0].negate; 1722 emit(ir, TGSI_OPCODE_CMP, result_dst, 1723 op[0], result_src, st_src_reg_for_float(0.0)); 1724 break; 1725 case ir_unop_rsq: 1726 emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); 1727 break; 1728 case ir_unop_i2f: 1729 if (native_integers) { 1730 emit(ir, TGSI_OPCODE_I2F, result_dst, op[0]); 1731 break; 1732 } 1733 /* fallthrough to next case otherwise */ 1734 case ir_unop_b2f: 1735 if (native_integers) { 1736 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0)); 1737 break; 1738 } 1739 /* fallthrough to next case otherwise */ 1740 case ir_unop_i2u: 1741 case ir_unop_u2i: 1742 /* Converting between signed and unsigned integers is a no-op. */ 1743 result_src = op[0]; 1744 break; 1745 case ir_unop_b2i: 1746 if (native_integers) { 1747 /* Booleans are stored as integers using ~0 for true and 0 for false. 1748 * GLSL requires that int(bool) return 1 for true and 0 for false. 1749 * This conversion is done with AND, but it could be done with NEG. 1750 */ 1751 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1)); 1752 } else { 1753 /* Booleans and integers are both stored as floats when native 1754 * integers are disabled. 1755 */ 1756 result_src = op[0]; 1757 } 1758 break; 1759 case ir_unop_f2i: 1760 if (native_integers) 1761 emit(ir, TGSI_OPCODE_F2I, result_dst, op[0]); 1762 else 1763 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); 1764 break; 1765 case ir_unop_f2b: 1766 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); 1767 break; 1768 case ir_unop_i2b: 1769 if (native_integers) 1770 emit(ir, TGSI_OPCODE_INEG, result_dst, op[0]); 1771 else 1772 emit(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); 1773 break; 1774 case ir_unop_trunc: 1775 emit(ir, TGSI_OPCODE_TRUNC, result_dst, op[0]); 1776 break; 1777 case ir_unop_ceil: 1778 op[0].negate = ~op[0].negate; 1779 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]); 1780 result_src.negate = ~result_src.negate; 1781 break; 1782 case ir_unop_floor: 1783 emit(ir, TGSI_OPCODE_FLR, result_dst, op[0]); 1784 break; 1785 case ir_unop_round_even: 1786 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]); 1787 break; 1788 case ir_unop_fract: 1789 emit(ir, TGSI_OPCODE_FRC, result_dst, op[0]); 1790 break; 1791 1792 case ir_binop_min: 1793 emit(ir, TGSI_OPCODE_MIN, result_dst, op[0], op[1]); 1794 break; 1795 case ir_binop_max: 1796 emit(ir, TGSI_OPCODE_MAX, result_dst, op[0], op[1]); 1797 break; 1798 case ir_binop_pow: 1799 emit_scalar(ir, TGSI_OPCODE_POW, result_dst, op[0], op[1]); 1800 break; 1801 1802 case ir_unop_bit_not: 1803 if (native_integers) { 1804 emit(ir, TGSI_OPCODE_NOT, result_dst, op[0]); 1805 break; 1806 } 1807 case ir_unop_u2f: 1808 if (native_integers) { 1809 emit(ir, TGSI_OPCODE_U2F, result_dst, op[0]); 1810 break; 1811 } 1812 case ir_binop_lshift: 1813 if (native_integers) { 1814 emit(ir, TGSI_OPCODE_SHL, result_dst, op[0], op[1]); 1815 break; 1816 } 1817 case ir_binop_rshift: 1818 if (native_integers) { 1819 emit(ir, TGSI_OPCODE_ISHR, result_dst, op[0], op[1]); 1820 break; 1821 } 1822 case ir_binop_bit_and: 1823 if (native_integers) { 1824 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); 1825 break; 1826 } 1827 case ir_binop_bit_xor: 1828 if (native_integers) { 1829 emit(ir, TGSI_OPCODE_XOR, result_dst, op[0], op[1]); 1830 break; 1831 } 1832 case ir_binop_bit_or: 1833 if (native_integers) { 1834 emit(ir, TGSI_OPCODE_OR, result_dst, op[0], op[1]); 1835 break; 1836 } 1837 1838 assert(!"GLSL 1.30 features unsupported"); 1839 break; 1840 1841 case ir_quadop_vector: 1842 /* This operation should have already been handled. 1843 */ 1844 assert(!"Should not get here."); 1845 break; 1846 } 1847 1848 this->result = result_src; 1849} 1850 1851 1852void 1853glsl_to_tgsi_visitor::visit(ir_swizzle *ir) 1854{ 1855 st_src_reg src; 1856 int i; 1857 int swizzle[4]; 1858 1859 /* Note that this is only swizzles in expressions, not those on the left 1860 * hand side of an assignment, which do write masking. See ir_assignment 1861 * for that. 1862 */ 1863 1864 ir->val->accept(this); 1865 src = this->result; 1866 assert(src.file != PROGRAM_UNDEFINED); 1867 1868 for (i = 0; i < 4; i++) { 1869 if (i < ir->type->vector_elements) { 1870 switch (i) { 1871 case 0: 1872 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x); 1873 break; 1874 case 1: 1875 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y); 1876 break; 1877 case 2: 1878 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z); 1879 break; 1880 case 3: 1881 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w); 1882 break; 1883 } 1884 } else { 1885 /* If the type is smaller than a vec4, replicate the last 1886 * channel out. 1887 */ 1888 swizzle[i] = swizzle[ir->type->vector_elements - 1]; 1889 } 1890 } 1891 1892 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]); 1893 1894 this->result = src; 1895} 1896 1897void 1898glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) 1899{ 1900 variable_storage *entry = find_variable_storage(ir->var); 1901 ir_variable *var = ir->var; 1902 1903 if (!entry) { 1904 switch (var->mode) { 1905 case ir_var_uniform: 1906 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM, 1907 var->location); 1908 this->variables.push_tail(entry); 1909 break; 1910 case ir_var_in: 1911 case ir_var_inout: 1912 /* The linker assigns locations for varyings and attributes, 1913 * including deprecated builtins (like gl_Color), user-assign 1914 * generic attributes (glBindVertexLocation), and 1915 * user-defined varyings. 1916 * 1917 * FINISHME: We would hit this path for function arguments. Fix! 1918 */ 1919 assert(var->location != -1); 1920 entry = new(mem_ctx) variable_storage(var, 1921 PROGRAM_INPUT, 1922 var->location); 1923 break; 1924 case ir_var_out: 1925 assert(var->location != -1); 1926 entry = new(mem_ctx) variable_storage(var, 1927 PROGRAM_OUTPUT, 1928 var->location); 1929 break; 1930 case ir_var_system_value: 1931 entry = new(mem_ctx) variable_storage(var, 1932 PROGRAM_SYSTEM_VALUE, 1933 var->location); 1934 break; 1935 case ir_var_auto: 1936 case ir_var_temporary: 1937 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY, 1938 this->next_temp); 1939 this->variables.push_tail(entry); 1940 1941 next_temp += type_size(var->type); 1942 break; 1943 } 1944 1945 if (!entry) { 1946 printf("Failed to make storage for %s\n", var->name); 1947 exit(1); 1948 } 1949 } 1950 1951 this->result = st_src_reg(entry->file, entry->index, var->type); 1952 if (!native_integers) 1953 this->result.type = GLSL_TYPE_FLOAT; 1954} 1955 1956void 1957glsl_to_tgsi_visitor::visit(ir_dereference_array *ir) 1958{ 1959 ir_constant *index; 1960 st_src_reg src; 1961 int element_size = type_size(ir->type); 1962 1963 index = ir->array_index->constant_expression_value(); 1964 1965 ir->array->accept(this); 1966 src = this->result; 1967 1968 if (index) { 1969 src.index += index->value.i[0] * element_size; 1970 } else { 1971 /* Variable index array dereference. It eats the "vec4" of the 1972 * base of the array and an index that offsets the TGSI register 1973 * index. 1974 */ 1975 ir->array_index->accept(this); 1976 1977 st_src_reg index_reg; 1978 1979 if (element_size == 1) { 1980 index_reg = this->result; 1981 } else { 1982 index_reg = get_temp(native_integers ? 1983 glsl_type::int_type : glsl_type::float_type); 1984 1985 emit(ir, TGSI_OPCODE_MUL, st_dst_reg(index_reg), 1986 this->result, st_src_reg_for_type(index_reg.type, element_size)); 1987 } 1988 1989 /* If there was already a relative address register involved, add the 1990 * new and the old together to get the new offset. 1991 */ 1992 if (src.reladdr != NULL) { 1993 st_src_reg accum_reg = get_temp(native_integers ? 1994 glsl_type::int_type : glsl_type::float_type); 1995 1996 emit(ir, TGSI_OPCODE_ADD, st_dst_reg(accum_reg), 1997 index_reg, *src.reladdr); 1998 1999 index_reg = accum_reg; 2000 } 2001 2002 src.reladdr = ralloc(mem_ctx, st_src_reg); 2003 memcpy(src.reladdr, &index_reg, sizeof(index_reg)); 2004 } 2005 2006 /* If the type is smaller than a vec4, replicate the last channel out. */ 2007 if (ir->type->is_scalar() || ir->type->is_vector()) 2008 src.swizzle = swizzle_for_size(ir->type->vector_elements); 2009 else 2010 src.swizzle = SWIZZLE_NOOP; 2011 2012 this->result = src; 2013} 2014 2015void 2016glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) 2017{ 2018 unsigned int i; 2019 const glsl_type *struct_type = ir->record->type; 2020 int offset = 0; 2021 2022 ir->record->accept(this); 2023 2024 for (i = 0; i < struct_type->length; i++) { 2025 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0) 2026 break; 2027 offset += type_size(struct_type->fields.structure[i].type); 2028 } 2029 2030 /* If the type is smaller than a vec4, replicate the last channel out. */ 2031 if (ir->type->is_scalar() || ir->type->is_vector()) 2032 this->result.swizzle = swizzle_for_size(ir->type->vector_elements); 2033 else 2034 this->result.swizzle = SWIZZLE_NOOP; 2035 2036 this->result.index += offset; 2037} 2038 2039/** 2040 * We want to be careful in assignment setup to hit the actual storage 2041 * instead of potentially using a temporary like we might with the 2042 * ir_dereference handler. 2043 */ 2044static st_dst_reg 2045get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v) 2046{ 2047 /* The LHS must be a dereference. If the LHS is a variable indexed array 2048 * access of a vector, it must be separated into a series conditional moves 2049 * before reaching this point (see ir_vec_index_to_cond_assign). 2050 */ 2051 assert(ir->as_dereference()); 2052 ir_dereference_array *deref_array = ir->as_dereference_array(); 2053 if (deref_array) { 2054 assert(!deref_array->array->type->is_vector()); 2055 } 2056 2057 /* Use the rvalue deref handler for the most part. We'll ignore 2058 * swizzles in it and write swizzles using writemask, though. 2059 */ 2060 ir->accept(v); 2061 return st_dst_reg(v->result); 2062} 2063 2064/** 2065 * Process the condition of a conditional assignment 2066 * 2067 * Examines the condition of a conditional assignment to generate the optimal 2068 * first operand of a \c CMP instruction. If the condition is a relational 2069 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be 2070 * used as the source for the \c CMP instruction. Otherwise the comparison 2071 * is processed to a boolean result, and the boolean result is used as the 2072 * operand to the CMP instruction. 2073 */ 2074bool 2075glsl_to_tgsi_visitor::process_move_condition(ir_rvalue *ir) 2076{ 2077 ir_rvalue *src_ir = ir; 2078 bool negate = true; 2079 bool switch_order = false; 2080 2081 ir_expression *const expr = ir->as_expression(); 2082 if ((expr != NULL) && (expr->get_num_operands() == 2)) { 2083 bool zero_on_left = false; 2084 2085 if (expr->operands[0]->is_zero()) { 2086 src_ir = expr->operands[1]; 2087 zero_on_left = true; 2088 } else if (expr->operands[1]->is_zero()) { 2089 src_ir = expr->operands[0]; 2090 zero_on_left = false; 2091 } 2092 2093 /* a is - 0 + - 0 + 2094 * (a < 0) T F F ( a < 0) T F F 2095 * (0 < a) F F T (-a < 0) F F T 2096 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands) 2097 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands) 2098 * (a > 0) F F T (-a < 0) F F T 2099 * (0 > a) T F F ( a < 0) T F F 2100 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands) 2101 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands) 2102 * 2103 * Note that exchanging the order of 0 and 'a' in the comparison simply 2104 * means that the value of 'a' should be negated. 2105 */ 2106 if (src_ir != ir) { 2107 switch (expr->operation) { 2108 case ir_binop_less: 2109 switch_order = false; 2110 negate = zero_on_left; 2111 break; 2112 2113 case ir_binop_greater: 2114 switch_order = false; 2115 negate = !zero_on_left; 2116 break; 2117 2118 case ir_binop_lequal: 2119 switch_order = true; 2120 negate = !zero_on_left; 2121 break; 2122 2123 case ir_binop_gequal: 2124 switch_order = true; 2125 negate = zero_on_left; 2126 break; 2127 2128 default: 2129 /* This isn't the right kind of comparison afterall, so make sure 2130 * the whole condition is visited. 2131 */ 2132 src_ir = ir; 2133 break; 2134 } 2135 } 2136 } 2137 2138 src_ir->accept(this); 2139 2140 /* We use the TGSI_OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the 2141 * condition we produced is 0.0 or 1.0. By flipping the sign, we can 2142 * choose which value TGSI_OPCODE_CMP produces without an extra instruction 2143 * computing the condition. 2144 */ 2145 if (negate) 2146 this->result.negate = ~this->result.negate; 2147 2148 return switch_order; 2149} 2150 2151void 2152glsl_to_tgsi_visitor::visit(ir_assignment *ir) 2153{ 2154 st_dst_reg l; 2155 st_src_reg r; 2156 int i; 2157 2158 ir->rhs->accept(this); 2159 r = this->result; 2160 2161 l = get_assignment_lhs(ir->lhs, this); 2162 2163 /* FINISHME: This should really set to the correct maximal writemask for each 2164 * FINISHME: component written (in the loops below). This case can only 2165 * FINISHME: occur for matrices, arrays, and structures. 2166 */ 2167 if (ir->write_mask == 0) { 2168 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); 2169 l.writemask = WRITEMASK_XYZW; 2170 } else if (ir->lhs->type->is_scalar() && 2171 ir->lhs->variable_referenced()->mode == ir_var_out) { 2172 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the 2173 * FINISHME: W component of fragment shader output zero, work correctly. 2174 */ 2175 l.writemask = WRITEMASK_XYZW; 2176 } else { 2177 int swizzles[4]; 2178 int first_enabled_chan = 0; 2179 int rhs_chan = 0; 2180 2181 l.writemask = ir->write_mask; 2182 2183 for (int i = 0; i < 4; i++) { 2184 if (l.writemask & (1 << i)) { 2185 first_enabled_chan = GET_SWZ(r.swizzle, i); 2186 break; 2187 } 2188 } 2189 2190 /* Swizzle a small RHS vector into the channels being written. 2191 * 2192 * glsl ir treats write_mask as dictating how many channels are 2193 * present on the RHS while TGSI treats write_mask as just 2194 * showing which channels of the vec4 RHS get written. 2195 */ 2196 for (int i = 0; i < 4; i++) { 2197 if (l.writemask & (1 << i)) 2198 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++); 2199 else 2200 swizzles[i] = first_enabled_chan; 2201 } 2202 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1], 2203 swizzles[2], swizzles[3]); 2204 } 2205 2206 assert(l.file != PROGRAM_UNDEFINED); 2207 assert(r.file != PROGRAM_UNDEFINED); 2208 2209 if (ir->condition) { 2210 const bool switch_order = this->process_move_condition(ir->condition); 2211 st_src_reg condition = this->result; 2212 2213 for (i = 0; i < type_size(ir->lhs->type); i++) { 2214 st_src_reg l_src = st_src_reg(l); 2215 st_src_reg condition_temp = condition; 2216 l_src.swizzle = swizzle_for_size(ir->lhs->type->vector_elements); 2217 2218 if (native_integers) { 2219 /* This is necessary because TGSI's CMP instruction expects the 2220 * condition to be a float, and we store booleans as integers. 2221 * If TGSI had a UCMP instruction or similar, this extra 2222 * instruction would not be necessary. 2223 */ 2224 condition_temp = get_temp(glsl_type::vec4_type); 2225 condition.negate = 0; 2226 emit(ir, TGSI_OPCODE_I2F, st_dst_reg(condition_temp), condition); 2227 condition_temp.swizzle = condition.swizzle; 2228 } 2229 2230 if (switch_order) { 2231 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, l_src, r); 2232 } else { 2233 emit(ir, TGSI_OPCODE_CMP, l, condition_temp, r, l_src); 2234 } 2235 2236 l.index++; 2237 r.index++; 2238 } 2239 } else if (ir->rhs->as_expression() && 2240 this->instructions.get_tail() && 2241 ir->rhs == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->ir && 2242 type_size(ir->lhs->type) == 1 && 2243 l.writemask == ((glsl_to_tgsi_instruction *)this->instructions.get_tail())->dst.writemask) { 2244 /* To avoid emitting an extra MOV when assigning an expression to a 2245 * variable, emit the last instruction of the expression again, but 2246 * replace the destination register with the target of the assignment. 2247 * Dead code elimination will remove the original instruction. 2248 */ 2249 glsl_to_tgsi_instruction *inst, *new_inst; 2250 inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2251 new_inst = emit(ir, inst->op, l, inst->src[0], inst->src[1], inst->src[2]); 2252 new_inst->saturate = inst->saturate; 2253 inst->dead_mask = inst->dst.writemask; 2254 } else { 2255 for (i = 0; i < type_size(ir->lhs->type); i++) { 2256 emit(ir, TGSI_OPCODE_MOV, l, r); 2257 l.index++; 2258 r.index++; 2259 } 2260 } 2261} 2262 2263 2264void 2265glsl_to_tgsi_visitor::visit(ir_constant *ir) 2266{ 2267 st_src_reg src; 2268 GLfloat stack_vals[4] = { 0 }; 2269 gl_constant_value *values = (gl_constant_value *) stack_vals; 2270 GLenum gl_type = GL_NONE; 2271 unsigned int i; 2272 static int in_array = 0; 2273 gl_register_file file = in_array ? PROGRAM_CONSTANT : PROGRAM_IMMEDIATE; 2274 2275 /* Unfortunately, 4 floats is all we can get into 2276 * _mesa_add_typed_unnamed_constant. So, make a temp to store an 2277 * aggregate constant and move each constant value into it. If we 2278 * get lucky, copy propagation will eliminate the extra moves. 2279 */ 2280 if (ir->type->base_type == GLSL_TYPE_STRUCT) { 2281 st_src_reg temp_base = get_temp(ir->type); 2282 st_dst_reg temp = st_dst_reg(temp_base); 2283 2284 foreach_iter(exec_list_iterator, iter, ir->components) { 2285 ir_constant *field_value = (ir_constant *)iter.get(); 2286 int size = type_size(field_value->type); 2287 2288 assert(size > 0); 2289 2290 field_value->accept(this); 2291 src = this->result; 2292 2293 for (i = 0; i < (unsigned int)size; i++) { 2294 emit(ir, TGSI_OPCODE_MOV, temp, src); 2295 2296 src.index++; 2297 temp.index++; 2298 } 2299 } 2300 this->result = temp_base; 2301 return; 2302 } 2303 2304 if (ir->type->is_array()) { 2305 st_src_reg temp_base = get_temp(ir->type); 2306 st_dst_reg temp = st_dst_reg(temp_base); 2307 int size = type_size(ir->type->fields.array); 2308 2309 assert(size > 0); 2310 in_array++; 2311 2312 for (i = 0; i < ir->type->length; i++) { 2313 ir->array_elements[i]->accept(this); 2314 src = this->result; 2315 for (int j = 0; j < size; j++) { 2316 emit(ir, TGSI_OPCODE_MOV, temp, src); 2317 2318 src.index++; 2319 temp.index++; 2320 } 2321 } 2322 this->result = temp_base; 2323 in_array--; 2324 return; 2325 } 2326 2327 if (ir->type->is_matrix()) { 2328 st_src_reg mat = get_temp(ir->type); 2329 st_dst_reg mat_column = st_dst_reg(mat); 2330 2331 for (i = 0; i < ir->type->matrix_columns; i++) { 2332 assert(ir->type->base_type == GLSL_TYPE_FLOAT); 2333 values = (gl_constant_value *) &ir->value.f[i * ir->type->vector_elements]; 2334 2335 src = st_src_reg(file, -1, ir->type->base_type); 2336 src.index = add_constant(file, 2337 values, 2338 ir->type->vector_elements, 2339 GL_FLOAT, 2340 &src.swizzle); 2341 emit(ir, TGSI_OPCODE_MOV, mat_column, src); 2342 2343 mat_column.index++; 2344 } 2345 2346 this->result = mat; 2347 return; 2348 } 2349 2350 switch (ir->type->base_type) { 2351 case GLSL_TYPE_FLOAT: 2352 gl_type = GL_FLOAT; 2353 for (i = 0; i < ir->type->vector_elements; i++) { 2354 values[i].f = ir->value.f[i]; 2355 } 2356 break; 2357 case GLSL_TYPE_UINT: 2358 gl_type = native_integers ? GL_UNSIGNED_INT : GL_FLOAT; 2359 for (i = 0; i < ir->type->vector_elements; i++) { 2360 if (native_integers) 2361 values[i].u = ir->value.u[i]; 2362 else 2363 values[i].f = ir->value.u[i]; 2364 } 2365 break; 2366 case GLSL_TYPE_INT: 2367 gl_type = native_integers ? GL_INT : GL_FLOAT; 2368 for (i = 0; i < ir->type->vector_elements; i++) { 2369 if (native_integers) 2370 values[i].i = ir->value.i[i]; 2371 else 2372 values[i].f = ir->value.i[i]; 2373 } 2374 break; 2375 case GLSL_TYPE_BOOL: 2376 gl_type = native_integers ? GL_BOOL : GL_FLOAT; 2377 for (i = 0; i < ir->type->vector_elements; i++) { 2378 if (native_integers) 2379 values[i].u = ir->value.b[i] ? ~0 : 0; 2380 else 2381 values[i].f = ir->value.b[i]; 2382 } 2383 break; 2384 default: 2385 assert(!"Non-float/uint/int/bool constant"); 2386 } 2387 2388 this->result = st_src_reg(file, -1, ir->type); 2389 this->result.index = add_constant(file, 2390 values, 2391 ir->type->vector_elements, 2392 gl_type, 2393 &this->result.swizzle); 2394} 2395 2396function_entry * 2397glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig) 2398{ 2399 function_entry *entry; 2400 2401 foreach_iter(exec_list_iterator, iter, this->function_signatures) { 2402 entry = (function_entry *)iter.get(); 2403 2404 if (entry->sig == sig) 2405 return entry; 2406 } 2407 2408 entry = ralloc(mem_ctx, function_entry); 2409 entry->sig = sig; 2410 entry->sig_id = this->next_signature_id++; 2411 entry->bgn_inst = NULL; 2412 2413 /* Allocate storage for all the parameters. */ 2414 foreach_iter(exec_list_iterator, iter, sig->parameters) { 2415 ir_variable *param = (ir_variable *)iter.get(); 2416 variable_storage *storage; 2417 2418 storage = find_variable_storage(param); 2419 assert(!storage); 2420 2421 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY, 2422 this->next_temp); 2423 this->variables.push_tail(storage); 2424 2425 this->next_temp += type_size(param->type); 2426 } 2427 2428 if (!sig->return_type->is_void()) { 2429 entry->return_reg = get_temp(sig->return_type); 2430 } else { 2431 entry->return_reg = undef_src; 2432 } 2433 2434 this->function_signatures.push_tail(entry); 2435 return entry; 2436} 2437 2438void 2439glsl_to_tgsi_visitor::visit(ir_call *ir) 2440{ 2441 glsl_to_tgsi_instruction *call_inst; 2442 ir_function_signature *sig = ir->get_callee(); 2443 function_entry *entry = get_function_signature(sig); 2444 int i; 2445 2446 /* Process in parameters. */ 2447 exec_list_iterator sig_iter = sig->parameters.iterator(); 2448 foreach_iter(exec_list_iterator, iter, *ir) { 2449 ir_rvalue *param_rval = (ir_rvalue *)iter.get(); 2450 ir_variable *param = (ir_variable *)sig_iter.get(); 2451 2452 if (param->mode == ir_var_in || 2453 param->mode == ir_var_inout) { 2454 variable_storage *storage = find_variable_storage(param); 2455 assert(storage); 2456 2457 param_rval->accept(this); 2458 st_src_reg r = this->result; 2459 2460 st_dst_reg l; 2461 l.file = storage->file; 2462 l.index = storage->index; 2463 l.reladdr = NULL; 2464 l.writemask = WRITEMASK_XYZW; 2465 l.cond_mask = COND_TR; 2466 2467 for (i = 0; i < type_size(param->type); i++) { 2468 emit(ir, TGSI_OPCODE_MOV, l, r); 2469 l.index++; 2470 r.index++; 2471 } 2472 } 2473 2474 sig_iter.next(); 2475 } 2476 assert(!sig_iter.has_next()); 2477 2478 /* Emit call instruction */ 2479 call_inst = emit(ir, TGSI_OPCODE_CAL); 2480 call_inst->function = entry; 2481 2482 /* Process out parameters. */ 2483 sig_iter = sig->parameters.iterator(); 2484 foreach_iter(exec_list_iterator, iter, *ir) { 2485 ir_rvalue *param_rval = (ir_rvalue *)iter.get(); 2486 ir_variable *param = (ir_variable *)sig_iter.get(); 2487 2488 if (param->mode == ir_var_out || 2489 param->mode == ir_var_inout) { 2490 variable_storage *storage = find_variable_storage(param); 2491 assert(storage); 2492 2493 st_src_reg r; 2494 r.file = storage->file; 2495 r.index = storage->index; 2496 r.reladdr = NULL; 2497 r.swizzle = SWIZZLE_NOOP; 2498 r.negate = 0; 2499 2500 param_rval->accept(this); 2501 st_dst_reg l = st_dst_reg(this->result); 2502 2503 for (i = 0; i < type_size(param->type); i++) { 2504 emit(ir, TGSI_OPCODE_MOV, l, r); 2505 l.index++; 2506 r.index++; 2507 } 2508 } 2509 2510 sig_iter.next(); 2511 } 2512 assert(!sig_iter.has_next()); 2513 2514 /* Process return value. */ 2515 this->result = entry->return_reg; 2516} 2517 2518void 2519glsl_to_tgsi_visitor::visit(ir_texture *ir) 2520{ 2521 st_src_reg result_src, coord, lod_info, projector, dx, dy, offset; 2522 st_dst_reg result_dst, coord_dst; 2523 glsl_to_tgsi_instruction *inst = NULL; 2524 unsigned opcode = TGSI_OPCODE_NOP; 2525 2526 if (ir->coordinate) { 2527 ir->coordinate->accept(this); 2528 2529 /* Put our coords in a temp. We'll need to modify them for shadow, 2530 * projection, or LOD, so the only case we'd use it as is is if 2531 * we're doing plain old texturing. The optimization passes on 2532 * glsl_to_tgsi_visitor should handle cleaning up our mess in that case. 2533 */ 2534 coord = get_temp(glsl_type::vec4_type); 2535 coord_dst = st_dst_reg(coord); 2536 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); 2537 } 2538 2539 if (ir->projector) { 2540 ir->projector->accept(this); 2541 projector = this->result; 2542 } 2543 2544 /* Storage for our result. Ideally for an assignment we'd be using 2545 * the actual storage for the result here, instead. 2546 */ 2547 result_src = get_temp(glsl_type::vec4_type); 2548 result_dst = st_dst_reg(result_src); 2549 2550 switch (ir->op) { 2551 case ir_tex: 2552 opcode = TGSI_OPCODE_TEX; 2553 break; 2554 case ir_txb: 2555 opcode = TGSI_OPCODE_TXB; 2556 ir->lod_info.bias->accept(this); 2557 lod_info = this->result; 2558 break; 2559 case ir_txl: 2560 opcode = TGSI_OPCODE_TXL; 2561 ir->lod_info.lod->accept(this); 2562 lod_info = this->result; 2563 break; 2564 case ir_txd: 2565 opcode = TGSI_OPCODE_TXD; 2566 ir->lod_info.grad.dPdx->accept(this); 2567 dx = this->result; 2568 ir->lod_info.grad.dPdy->accept(this); 2569 dy = this->result; 2570 break; 2571 case ir_txs: 2572 opcode = TGSI_OPCODE_TXQ; 2573 ir->lod_info.lod->accept(this); 2574 lod_info = this->result; 2575 break; 2576 case ir_txf: 2577 opcode = TGSI_OPCODE_TXF; 2578 ir->lod_info.lod->accept(this); 2579 lod_info = this->result; 2580 if (ir->offset) { 2581 ir->offset->accept(this); 2582 offset = this->result; 2583 } 2584 break; 2585 } 2586 2587 const glsl_type *sampler_type = ir->sampler->type; 2588 2589 if (ir->projector) { 2590 if (opcode == TGSI_OPCODE_TEX) { 2591 /* Slot the projector in as the last component of the coord. */ 2592 coord_dst.writemask = WRITEMASK_W; 2593 emit(ir, TGSI_OPCODE_MOV, coord_dst, projector); 2594 coord_dst.writemask = WRITEMASK_XYZW; 2595 opcode = TGSI_OPCODE_TXP; 2596 } else { 2597 st_src_reg coord_w = coord; 2598 coord_w.swizzle = SWIZZLE_WWWW; 2599 2600 /* For the other TEX opcodes there's no projective version 2601 * since the last slot is taken up by LOD info. Do the 2602 * projective divide now. 2603 */ 2604 coord_dst.writemask = WRITEMASK_W; 2605 emit(ir, TGSI_OPCODE_RCP, coord_dst, projector); 2606 2607 /* In the case where we have to project the coordinates "by hand," 2608 * the shadow comparator value must also be projected. 2609 */ 2610 st_src_reg tmp_src = coord; 2611 if (ir->shadow_comparitor) { 2612 /* Slot the shadow value in as the second to last component of the 2613 * coord. 2614 */ 2615 ir->shadow_comparitor->accept(this); 2616 2617 tmp_src = get_temp(glsl_type::vec4_type); 2618 st_dst_reg tmp_dst = st_dst_reg(tmp_src); 2619 2620 /* Projective division not allowed for array samplers. */ 2621 assert(!sampler_type->sampler_array); 2622 2623 tmp_dst.writemask = WRITEMASK_Z; 2624 emit(ir, TGSI_OPCODE_MOV, tmp_dst, this->result); 2625 2626 tmp_dst.writemask = WRITEMASK_XY; 2627 emit(ir, TGSI_OPCODE_MOV, tmp_dst, coord); 2628 } 2629 2630 coord_dst.writemask = WRITEMASK_XYZ; 2631 emit(ir, TGSI_OPCODE_MUL, coord_dst, tmp_src, coord_w); 2632 2633 coord_dst.writemask = WRITEMASK_XYZW; 2634 coord.swizzle = SWIZZLE_XYZW; 2635 } 2636 } 2637 2638 /* If projection is done and the opcode is not TGSI_OPCODE_TXP, then the shadow 2639 * comparator was put in the correct place (and projected) by the code, 2640 * above, that handles by-hand projection. 2641 */ 2642 if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) { 2643 /* Slot the shadow value in as the second to last component of the 2644 * coord. 2645 */ 2646 ir->shadow_comparitor->accept(this); 2647 2648 /* XXX This will need to be updated for cubemap array samplers. */ 2649 if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D && 2650 sampler_type->sampler_array) { 2651 coord_dst.writemask = WRITEMASK_W; 2652 } else { 2653 coord_dst.writemask = WRITEMASK_Z; 2654 } 2655 2656 emit(ir, TGSI_OPCODE_MOV, coord_dst, this->result); 2657 coord_dst.writemask = WRITEMASK_XYZW; 2658 } 2659 2660 if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXB || 2661 opcode == TGSI_OPCODE_TXF) { 2662 /* TGSI stores LOD or LOD bias in the last channel of the coords. */ 2663 coord_dst.writemask = WRITEMASK_W; 2664 emit(ir, TGSI_OPCODE_MOV, coord_dst, lod_info); 2665 coord_dst.writemask = WRITEMASK_XYZW; 2666 } 2667 2668 if (opcode == TGSI_OPCODE_TXD) 2669 inst = emit(ir, opcode, result_dst, coord, dx, dy); 2670 else if (opcode == TGSI_OPCODE_TXQ) 2671 inst = emit(ir, opcode, result_dst, lod_info); 2672 else if (opcode == TGSI_OPCODE_TXF) { 2673 inst = emit(ir, opcode, result_dst, coord); 2674 } else 2675 inst = emit(ir, opcode, result_dst, coord); 2676 2677 if (ir->shadow_comparitor) 2678 inst->tex_shadow = GL_TRUE; 2679 2680 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler, 2681 this->shader_program, 2682 this->prog); 2683 2684 if (ir->offset) { 2685 inst->tex_offset_num_offset = 1; 2686 inst->tex_offsets[0].Index = offset.index; 2687 inst->tex_offsets[0].File = offset.file; 2688 inst->tex_offsets[0].SwizzleX = GET_SWZ(offset.swizzle, 0); 2689 inst->tex_offsets[0].SwizzleY = GET_SWZ(offset.swizzle, 1); 2690 inst->tex_offsets[0].SwizzleZ = GET_SWZ(offset.swizzle, 2); 2691 } 2692 2693 switch (sampler_type->sampler_dimensionality) { 2694 case GLSL_SAMPLER_DIM_1D: 2695 inst->tex_target = (sampler_type->sampler_array) 2696 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX; 2697 break; 2698 case GLSL_SAMPLER_DIM_2D: 2699 inst->tex_target = (sampler_type->sampler_array) 2700 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX; 2701 break; 2702 case GLSL_SAMPLER_DIM_3D: 2703 inst->tex_target = TEXTURE_3D_INDEX; 2704 break; 2705 case GLSL_SAMPLER_DIM_CUBE: 2706 inst->tex_target = TEXTURE_CUBE_INDEX; 2707 break; 2708 case GLSL_SAMPLER_DIM_RECT: 2709 inst->tex_target = TEXTURE_RECT_INDEX; 2710 break; 2711 case GLSL_SAMPLER_DIM_BUF: 2712 assert(!"FINISHME: Implement ARB_texture_buffer_object"); 2713 break; 2714 case GLSL_SAMPLER_DIM_EXTERNAL: 2715 inst->tex_target = TEXTURE_EXTERNAL_INDEX; 2716 break; 2717 default: 2718 assert(!"Should not get here."); 2719 } 2720 2721 this->result = result_src; 2722} 2723 2724void 2725glsl_to_tgsi_visitor::visit(ir_return *ir) 2726{ 2727 if (ir->get_value()) { 2728 st_dst_reg l; 2729 int i; 2730 2731 assert(current_function); 2732 2733 ir->get_value()->accept(this); 2734 st_src_reg r = this->result; 2735 2736 l = st_dst_reg(current_function->return_reg); 2737 2738 for (i = 0; i < type_size(current_function->sig->return_type); i++) { 2739 emit(ir, TGSI_OPCODE_MOV, l, r); 2740 l.index++; 2741 r.index++; 2742 } 2743 } 2744 2745 emit(ir, TGSI_OPCODE_RET); 2746} 2747 2748void 2749glsl_to_tgsi_visitor::visit(ir_discard *ir) 2750{ 2751 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; 2752 2753 if (ir->condition) { 2754 ir->condition->accept(this); 2755 this->result.negate = ~this->result.negate; 2756 emit(ir, TGSI_OPCODE_KIL, undef_dst, this->result); 2757 } else { 2758 emit(ir, TGSI_OPCODE_KILP); 2759 } 2760 2761 fp->UsesKill = GL_TRUE; 2762} 2763 2764void 2765glsl_to_tgsi_visitor::visit(ir_if *ir) 2766{ 2767 glsl_to_tgsi_instruction *cond_inst, *if_inst; 2768 glsl_to_tgsi_instruction *prev_inst; 2769 2770 prev_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2771 2772 ir->condition->accept(this); 2773 assert(this->result.file != PROGRAM_UNDEFINED); 2774 2775 if (this->options->EmitCondCodes) { 2776 cond_inst = (glsl_to_tgsi_instruction *)this->instructions.get_tail(); 2777 2778 /* See if we actually generated any instruction for generating 2779 * the condition. If not, then cook up a move to a temp so we 2780 * have something to set cond_update on. 2781 */ 2782 if (cond_inst == prev_inst) { 2783 st_src_reg temp = get_temp(glsl_type::bool_type); 2784 cond_inst = emit(ir->condition, TGSI_OPCODE_MOV, st_dst_reg(temp), result); 2785 } 2786 cond_inst->cond_update = GL_TRUE; 2787 2788 if_inst = emit(ir->condition, TGSI_OPCODE_IF); 2789 if_inst->dst.cond_mask = COND_NE; 2790 } else { 2791 if_inst = emit(ir->condition, TGSI_OPCODE_IF, undef_dst, this->result); 2792 } 2793 2794 this->instructions.push_tail(if_inst); 2795 2796 visit_exec_list(&ir->then_instructions, this); 2797 2798 if (!ir->else_instructions.is_empty()) { 2799 emit(ir->condition, TGSI_OPCODE_ELSE); 2800 visit_exec_list(&ir->else_instructions, this); 2801 } 2802 2803 if_inst = emit(ir->condition, TGSI_OPCODE_ENDIF); 2804} 2805 2806glsl_to_tgsi_visitor::glsl_to_tgsi_visitor() 2807{ 2808 result.file = PROGRAM_UNDEFINED; 2809 next_temp = 1; 2810 next_signature_id = 1; 2811 num_immediates = 0; 2812 current_function = NULL; 2813 num_address_regs = 0; 2814 indirect_addr_temps = false; 2815 indirect_addr_consts = false; 2816 mem_ctx = ralloc_context(NULL); 2817} 2818 2819glsl_to_tgsi_visitor::~glsl_to_tgsi_visitor() 2820{ 2821 ralloc_free(mem_ctx); 2822} 2823 2824extern "C" void free_glsl_to_tgsi_visitor(glsl_to_tgsi_visitor *v) 2825{ 2826 delete v; 2827} 2828 2829 2830/** 2831 * Count resources used by the given gpu program (number of texture 2832 * samplers, etc). 2833 */ 2834static void 2835count_resources(glsl_to_tgsi_visitor *v, gl_program *prog) 2836{ 2837 v->samplers_used = 0; 2838 2839 foreach_iter(exec_list_iterator, iter, v->instructions) { 2840 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 2841 2842 if (is_tex_instruction(inst->op)) { 2843 v->samplers_used |= 1 << inst->sampler; 2844 2845 prog->SamplerTargets[inst->sampler] = 2846 (gl_texture_index)inst->tex_target; 2847 if (inst->tex_shadow) { 2848 prog->ShadowSamplers |= 1 << inst->sampler; 2849 } 2850 } 2851 } 2852 2853 prog->SamplersUsed = v->samplers_used; 2854 _mesa_update_shader_textures_used(prog); 2855} 2856 2857static void 2858set_uniform_initializer(struct gl_context *ctx, void *mem_ctx, 2859 struct gl_shader_program *shader_program, 2860 const char *name, const glsl_type *type, 2861 ir_constant *val) 2862{ 2863 if (type->is_record()) { 2864 ir_constant *field_constant; 2865 2866 field_constant = (ir_constant *)val->components.get_head(); 2867 2868 for (unsigned int i = 0; i < type->length; i++) { 2869 const glsl_type *field_type = type->fields.structure[i].type; 2870 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name, 2871 type->fields.structure[i].name); 2872 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name, 2873 field_type, field_constant); 2874 field_constant = (ir_constant *)field_constant->next; 2875 } 2876 return; 2877 } 2878 2879 int loc = _mesa_get_uniform_location(ctx, shader_program, name); 2880 2881 if (loc == -1) { 2882 fail_link(shader_program, 2883 "Couldn't find uniform for initializer %s\n", name); 2884 return; 2885 } 2886 2887 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) { 2888 ir_constant *element; 2889 const glsl_type *element_type; 2890 if (type->is_array()) { 2891 element = val->array_elements[i]; 2892 element_type = type->fields.array; 2893 } else { 2894 element = val; 2895 element_type = type; 2896 } 2897 2898 void *values; 2899 2900 if (element_type->base_type == GLSL_TYPE_BOOL) { 2901 int *conv = ralloc_array(mem_ctx, int, element_type->components()); 2902 for (unsigned int j = 0; j < element_type->components(); j++) { 2903 conv[j] = element->value.b[j]; 2904 } 2905 values = (void *)conv; 2906 element_type = glsl_type::get_instance(GLSL_TYPE_INT, 2907 element_type->vector_elements, 2908 1); 2909 } else { 2910 values = &element->value; 2911 } 2912 2913 if (element_type->is_matrix()) { 2914 _mesa_uniform_matrix(ctx, shader_program, 2915 element_type->matrix_columns, 2916 element_type->vector_elements, 2917 loc, 1, GL_FALSE, (GLfloat *)values); 2918 } else { 2919 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns, 2920 values, element_type->gl_type); 2921 } 2922 2923 loc++; 2924 } 2925} 2926 2927/** 2928 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which 2929 * are read from the given src in this instruction 2930 */ 2931static int 2932get_src_arg_mask(st_dst_reg dst, st_src_reg src) 2933{ 2934 int read_mask = 0, comp; 2935 2936 /* Now, given the src swizzle and the written channels, find which 2937 * components are actually read 2938 */ 2939 for (comp = 0; comp < 4; ++comp) { 2940 const unsigned coord = GET_SWZ(src.swizzle, comp); 2941 ASSERT(coord < 4); 2942 if (dst.writemask & (1 << comp) && coord <= SWIZZLE_W) 2943 read_mask |= 1 << coord; 2944 } 2945 2946 return read_mask; 2947} 2948 2949/** 2950 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP 2951 * instruction is the first instruction to write to register T0. There are 2952 * several lowering passes done in GLSL IR (e.g. branches and 2953 * relative addressing) that create a large number of conditional assignments 2954 * that ir_to_mesa converts to CMP instructions like the one mentioned above. 2955 * 2956 * Here is why this conversion is safe: 2957 * CMP T0, T1 T2 T0 can be expanded to: 2958 * if (T1 < 0.0) 2959 * MOV T0, T2; 2960 * else 2961 * MOV T0, T0; 2962 * 2963 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same 2964 * as the original program. If (T1 < 0.0) evaluates to false, executing 2965 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized. 2966 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2 2967 * because any instruction that was going to read from T0 after this was going 2968 * to read a garbage value anyway. 2969 */ 2970void 2971glsl_to_tgsi_visitor::simplify_cmp(void) 2972{ 2973 unsigned *tempWrites; 2974 unsigned outputWrites[MAX_PROGRAM_OUTPUTS]; 2975 2976 tempWrites = new unsigned[MAX_TEMPS]; 2977 if (!tempWrites) { 2978 return; 2979 } 2980 memset(tempWrites, 0, sizeof(tempWrites)); 2981 memset(outputWrites, 0, sizeof(outputWrites)); 2982 2983 foreach_iter(exec_list_iterator, iter, this->instructions) { 2984 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 2985 unsigned prevWriteMask = 0; 2986 2987 /* Give up if we encounter relative addressing or flow control. */ 2988 if (inst->dst.reladdr || 2989 tgsi_get_opcode_info(inst->op)->is_branch || 2990 inst->op == TGSI_OPCODE_BGNSUB || 2991 inst->op == TGSI_OPCODE_CONT || 2992 inst->op == TGSI_OPCODE_END || 2993 inst->op == TGSI_OPCODE_ENDSUB || 2994 inst->op == TGSI_OPCODE_RET) { 2995 break; 2996 } 2997 2998 if (inst->dst.file == PROGRAM_OUTPUT) { 2999 assert(inst->dst.index < MAX_PROGRAM_OUTPUTS); 3000 prevWriteMask = outputWrites[inst->dst.index]; 3001 outputWrites[inst->dst.index] |= inst->dst.writemask; 3002 } else if (inst->dst.file == PROGRAM_TEMPORARY) { 3003 assert(inst->dst.index < MAX_TEMPS); 3004 prevWriteMask = tempWrites[inst->dst.index]; 3005 tempWrites[inst->dst.index] |= inst->dst.writemask; 3006 } 3007 3008 /* For a CMP to be considered a conditional write, the destination 3009 * register and source register two must be the same. */ 3010 if (inst->op == TGSI_OPCODE_CMP 3011 && !(inst->dst.writemask & prevWriteMask) 3012 && inst->src[2].file == inst->dst.file 3013 && inst->src[2].index == inst->dst.index 3014 && inst->dst.writemask == get_src_arg_mask(inst->dst, inst->src[2])) { 3015 3016 inst->op = TGSI_OPCODE_MOV; 3017 inst->src[0] = inst->src[1]; 3018 } 3019 } 3020 3021 delete [] tempWrites; 3022} 3023 3024/* Replaces all references to a temporary register index with another index. */ 3025void 3026glsl_to_tgsi_visitor::rename_temp_register(int index, int new_index) 3027{ 3028 foreach_iter(exec_list_iterator, iter, this->instructions) { 3029 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3030 unsigned j; 3031 3032 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3033 if (inst->src[j].file == PROGRAM_TEMPORARY && 3034 inst->src[j].index == index) { 3035 inst->src[j].index = new_index; 3036 } 3037 } 3038 3039 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { 3040 inst->dst.index = new_index; 3041 } 3042 } 3043} 3044 3045int 3046glsl_to_tgsi_visitor::get_first_temp_read(int index) 3047{ 3048 int depth = 0; /* loop depth */ 3049 int loop_start = -1; /* index of the first active BGNLOOP (if any) */ 3050 unsigned i = 0, j; 3051 3052 foreach_iter(exec_list_iterator, iter, this->instructions) { 3053 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3054 3055 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3056 if (inst->src[j].file == PROGRAM_TEMPORARY && 3057 inst->src[j].index == index) { 3058 return (depth == 0) ? i : loop_start; 3059 } 3060 } 3061 3062 if (inst->op == TGSI_OPCODE_BGNLOOP) { 3063 if(depth++ == 0) 3064 loop_start = i; 3065 } else if (inst->op == TGSI_OPCODE_ENDLOOP) { 3066 if (--depth == 0) 3067 loop_start = -1; 3068 } 3069 assert(depth >= 0); 3070 3071 i++; 3072 } 3073 3074 return -1; 3075} 3076 3077int 3078glsl_to_tgsi_visitor::get_first_temp_write(int index) 3079{ 3080 int depth = 0; /* loop depth */ 3081 int loop_start = -1; /* index of the first active BGNLOOP (if any) */ 3082 int i = 0; 3083 3084 foreach_iter(exec_list_iterator, iter, this->instructions) { 3085 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3086 3087 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) { 3088 return (depth == 0) ? i : loop_start; 3089 } 3090 3091 if (inst->op == TGSI_OPCODE_BGNLOOP) { 3092 if(depth++ == 0) 3093 loop_start = i; 3094 } else if (inst->op == TGSI_OPCODE_ENDLOOP) { 3095 if (--depth == 0) 3096 loop_start = -1; 3097 } 3098 assert(depth >= 0); 3099 3100 i++; 3101 } 3102 3103 return -1; 3104} 3105 3106int 3107glsl_to_tgsi_visitor::get_last_temp_read(int index) 3108{ 3109 int depth = 0; /* loop depth */ 3110 int last = -1; /* index of last instruction that reads the temporary */ 3111 unsigned i = 0, j; 3112 3113 foreach_iter(exec_list_iterator, iter, this->instructions) { 3114 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3115 3116 for (j=0; j < num_inst_src_regs(inst->op); j++) { 3117 if (inst->src[j].file == PROGRAM_TEMPORARY && 3118 inst->src[j].index == index) { 3119 last = (depth == 0) ? i : -2; 3120 } 3121 } 3122 3123 if (inst->op == TGSI_OPCODE_BGNLOOP) 3124 depth++; 3125 else if (inst->op == TGSI_OPCODE_ENDLOOP) 3126 if (--depth == 0 && last == -2) 3127 last = i; 3128 assert(depth >= 0); 3129 3130 i++; 3131 } 3132 3133 assert(last >= -1); 3134 return last; 3135} 3136 3137int 3138glsl_to_tgsi_visitor::get_last_temp_write(int index) 3139{ 3140 int depth = 0; /* loop depth */ 3141 int last = -1; /* index of last instruction that writes to the temporary */ 3142 int i = 0; 3143 3144 foreach_iter(exec_list_iterator, iter, this->instructions) { 3145 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3146 3147 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == index) 3148 last = (depth == 0) ? i : -2; 3149 3150 if (inst->op == TGSI_OPCODE_BGNLOOP) 3151 depth++; 3152 else if (inst->op == TGSI_OPCODE_ENDLOOP) 3153 if (--depth == 0 && last == -2) 3154 last = i; 3155 assert(depth >= 0); 3156 3157 i++; 3158 } 3159 3160 assert(last >= -1); 3161 return last; 3162} 3163 3164/* 3165 * On a basic block basis, tracks available PROGRAM_TEMPORARY register 3166 * channels for copy propagation and updates following instructions to 3167 * use the original versions. 3168 * 3169 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3170 * will occur. As an example, a TXP production before this pass: 3171 * 3172 * 0: MOV TEMP[1], INPUT[4].xyyy; 3173 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3174 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D; 3175 * 3176 * and after: 3177 * 3178 * 0: MOV TEMP[1], INPUT[4].xyyy; 3179 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3180 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3181 * 3182 * which allows for dead code elimination on TEMP[1]'s writes. 3183 */ 3184void 3185glsl_to_tgsi_visitor::copy_propagate(void) 3186{ 3187 glsl_to_tgsi_instruction **acp = rzalloc_array(mem_ctx, 3188 glsl_to_tgsi_instruction *, 3189 this->next_temp * 4); 3190 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4); 3191 int level = 0; 3192 3193 foreach_iter(exec_list_iterator, iter, this->instructions) { 3194 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3195 3196 assert(inst->dst.file != PROGRAM_TEMPORARY 3197 || inst->dst.index < this->next_temp); 3198 3199 /* First, do any copy propagation possible into the src regs. */ 3200 for (int r = 0; r < 3; r++) { 3201 glsl_to_tgsi_instruction *first = NULL; 3202 bool good = true; 3203 int acp_base = inst->src[r].index * 4; 3204 3205 if (inst->src[r].file != PROGRAM_TEMPORARY || 3206 inst->src[r].reladdr) 3207 continue; 3208 3209 /* See if we can find entries in the ACP consisting of MOVs 3210 * from the same src register for all the swizzled channels 3211 * of this src register reference. 3212 */ 3213 for (int i = 0; i < 4; i++) { 3214 int src_chan = GET_SWZ(inst->src[r].swizzle, i); 3215 glsl_to_tgsi_instruction *copy_chan = acp[acp_base + src_chan]; 3216 3217 if (!copy_chan) { 3218 good = false; 3219 break; 3220 } 3221 3222 assert(acp_level[acp_base + src_chan] <= level); 3223 3224 if (!first) { 3225 first = copy_chan; 3226 } else { 3227 if (first->src[0].file != copy_chan->src[0].file || 3228 first->src[0].index != copy_chan->src[0].index) { 3229 good = false; 3230 break; 3231 } 3232 } 3233 } 3234 3235 if (good) { 3236 /* We've now validated that we can copy-propagate to 3237 * replace this src register reference. Do it. 3238 */ 3239 inst->src[r].file = first->src[0].file; 3240 inst->src[r].index = first->src[0].index; 3241 3242 int swizzle = 0; 3243 for (int i = 0; i < 4; i++) { 3244 int src_chan = GET_SWZ(inst->src[r].swizzle, i); 3245 glsl_to_tgsi_instruction *copy_inst = acp[acp_base + src_chan]; 3246 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) << 3247 (3 * i)); 3248 } 3249 inst->src[r].swizzle = swizzle; 3250 } 3251 } 3252 3253 switch (inst->op) { 3254 case TGSI_OPCODE_BGNLOOP: 3255 case TGSI_OPCODE_ENDLOOP: 3256 /* End of a basic block, clear the ACP entirely. */ 3257 memset(acp, 0, sizeof(*acp) * this->next_temp * 4); 3258 break; 3259 3260 case TGSI_OPCODE_IF: 3261 ++level; 3262 break; 3263 3264 case TGSI_OPCODE_ENDIF: 3265 case TGSI_OPCODE_ELSE: 3266 /* Clear all channels written inside the block from the ACP, but 3267 * leaving those that were not touched. 3268 */ 3269 for (int r = 0; r < this->next_temp; r++) { 3270 for (int c = 0; c < 4; c++) { 3271 if (!acp[4 * r + c]) 3272 continue; 3273 3274 if (acp_level[4 * r + c] >= level) 3275 acp[4 * r + c] = NULL; 3276 } 3277 } 3278 if (inst->op == TGSI_OPCODE_ENDIF) 3279 --level; 3280 break; 3281 3282 default: 3283 /* Continuing the block, clear any written channels from 3284 * the ACP. 3285 */ 3286 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) { 3287 /* Any temporary might be written, so no copy propagation 3288 * across this instruction. 3289 */ 3290 memset(acp, 0, sizeof(*acp) * this->next_temp * 4); 3291 } else if (inst->dst.file == PROGRAM_OUTPUT && 3292 inst->dst.reladdr) { 3293 /* Any output might be written, so no copy propagation 3294 * from outputs across this instruction. 3295 */ 3296 for (int r = 0; r < this->next_temp; r++) { 3297 for (int c = 0; c < 4; c++) { 3298 if (!acp[4 * r + c]) 3299 continue; 3300 3301 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT) 3302 acp[4 * r + c] = NULL; 3303 } 3304 } 3305 } else if (inst->dst.file == PROGRAM_TEMPORARY || 3306 inst->dst.file == PROGRAM_OUTPUT) { 3307 /* Clear where it's used as dst. */ 3308 if (inst->dst.file == PROGRAM_TEMPORARY) { 3309 for (int c = 0; c < 4; c++) { 3310 if (inst->dst.writemask & (1 << c)) { 3311 acp[4 * inst->dst.index + c] = NULL; 3312 } 3313 } 3314 } 3315 3316 /* Clear where it's used as src. */ 3317 for (int r = 0; r < this->next_temp; r++) { 3318 for (int c = 0; c < 4; c++) { 3319 if (!acp[4 * r + c]) 3320 continue; 3321 3322 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c); 3323 3324 if (acp[4 * r + c]->src[0].file == inst->dst.file && 3325 acp[4 * r + c]->src[0].index == inst->dst.index && 3326 inst->dst.writemask & (1 << src_chan)) 3327 { 3328 acp[4 * r + c] = NULL; 3329 } 3330 } 3331 } 3332 } 3333 break; 3334 } 3335 3336 /* If this is a copy, add it to the ACP. */ 3337 if (inst->op == TGSI_OPCODE_MOV && 3338 inst->dst.file == PROGRAM_TEMPORARY && 3339 !inst->dst.reladdr && 3340 !inst->saturate && 3341 !inst->src[0].reladdr && 3342 !inst->src[0].negate) { 3343 for (int i = 0; i < 4; i++) { 3344 if (inst->dst.writemask & (1 << i)) { 3345 acp[4 * inst->dst.index + i] = inst; 3346 acp_level[4 * inst->dst.index + i] = level; 3347 } 3348 } 3349 } 3350 } 3351 3352 ralloc_free(acp_level); 3353 ralloc_free(acp); 3354} 3355 3356/* 3357 * Tracks available PROGRAM_TEMPORARY registers for dead code elimination. 3358 * 3359 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3360 * will occur. As an example, a TXP production after copy propagation but 3361 * before this pass: 3362 * 3363 * 0: MOV TEMP[1], INPUT[4].xyyy; 3364 * 1: MOV TEMP[1].w, INPUT[4].wwww; 3365 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3366 * 3367 * and after this pass: 3368 * 3369 * 0: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D; 3370 * 3371 * FIXME: assumes that all functions are inlined (no support for BGNSUB/ENDSUB) 3372 * FIXME: doesn't eliminate all dead code inside of loops; it steps around them 3373 */ 3374void 3375glsl_to_tgsi_visitor::eliminate_dead_code(void) 3376{ 3377 int i; 3378 3379 for (i=0; i < this->next_temp; i++) { 3380 int last_read = get_last_temp_read(i); 3381 int j = 0; 3382 3383 foreach_iter(exec_list_iterator, iter, this->instructions) { 3384 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3385 3386 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.index == i && 3387 j > last_read) 3388 { 3389 iter.remove(); 3390 delete inst; 3391 } 3392 3393 j++; 3394 } 3395 } 3396} 3397 3398/* 3399 * On a basic block basis, tracks available PROGRAM_TEMPORARY registers for dead 3400 * code elimination. This is less primitive than eliminate_dead_code(), as it 3401 * is per-channel and can detect consecutive writes without a read between them 3402 * as dead code. However, there is some dead code that can be eliminated by 3403 * eliminate_dead_code() but not this function - for example, this function 3404 * cannot eliminate an instruction writing to a register that is never read and 3405 * is the only instruction writing to that register. 3406 * 3407 * The glsl_to_tgsi_visitor lazily produces code assuming that this pass 3408 * will occur. 3409 */ 3410int 3411glsl_to_tgsi_visitor::eliminate_dead_code_advanced(void) 3412{ 3413 glsl_to_tgsi_instruction **writes = rzalloc_array(mem_ctx, 3414 glsl_to_tgsi_instruction *, 3415 this->next_temp * 4); 3416 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4); 3417 int level = 0; 3418 int removed = 0; 3419 3420 foreach_iter(exec_list_iterator, iter, this->instructions) { 3421 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3422 3423 assert(inst->dst.file != PROGRAM_TEMPORARY 3424 || inst->dst.index < this->next_temp); 3425 3426 switch (inst->op) { 3427 case TGSI_OPCODE_BGNLOOP: 3428 case TGSI_OPCODE_ENDLOOP: 3429 case TGSI_OPCODE_CONT: 3430 case TGSI_OPCODE_BRK: 3431 /* End of a basic block, clear the write array entirely. 3432 * 3433 * This keeps us from killing dead code when the writes are 3434 * on either side of a loop, even when the register isn't touched 3435 * inside the loop. However, glsl_to_tgsi_visitor doesn't seem to emit 3436 * dead code of this type, so it shouldn't make a difference as long as 3437 * the dead code elimination pass in the GLSL compiler does its job. 3438 */ 3439 memset(writes, 0, sizeof(*writes) * this->next_temp * 4); 3440 break; 3441 3442 case TGSI_OPCODE_ENDIF: 3443 case TGSI_OPCODE_ELSE: 3444 /* Promote the recorded level of all channels written inside the 3445 * preceding if or else block to the level above the if/else block. 3446 */ 3447 for (int r = 0; r < this->next_temp; r++) { 3448 for (int c = 0; c < 4; c++) { 3449 if (!writes[4 * r + c]) 3450 continue; 3451 3452 if (write_level[4 * r + c] == level) 3453 write_level[4 * r + c] = level-1; 3454 } 3455 } 3456 3457 if(inst->op == TGSI_OPCODE_ENDIF) 3458 --level; 3459 3460 break; 3461 3462 case TGSI_OPCODE_IF: 3463 ++level; 3464 /* fallthrough to default case to mark the condition as read */ 3465 3466 default: 3467 /* Continuing the block, clear any channels from the write array that 3468 * are read by this instruction. 3469 */ 3470 for (unsigned i = 0; i < Elements(inst->src); i++) { 3471 if (inst->src[i].file == PROGRAM_TEMPORARY && inst->src[i].reladdr){ 3472 /* Any temporary might be read, so no dead code elimination 3473 * across this instruction. 3474 */ 3475 memset(writes, 0, sizeof(*writes) * this->next_temp * 4); 3476 } else if (inst->src[i].file == PROGRAM_TEMPORARY) { 3477 /* Clear where it's used as src. */ 3478 int src_chans = 1 << GET_SWZ(inst->src[i].swizzle, 0); 3479 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 1); 3480 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 2); 3481 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3); 3482 3483 for (int c = 0; c < 4; c++) { 3484 if (src_chans & (1 << c)) { 3485 writes[4 * inst->src[i].index + c] = NULL; 3486 } 3487 } 3488 } 3489 } 3490 break; 3491 } 3492 3493 /* If this instruction writes to a temporary, add it to the write array. 3494 * If there is already an instruction in the write array for one or more 3495 * of the channels, flag that channel write as dead. 3496 */ 3497 if (inst->dst.file == PROGRAM_TEMPORARY && 3498 !inst->dst.reladdr && 3499 !inst->saturate) { 3500 for (int c = 0; c < 4; c++) { 3501 if (inst->dst.writemask & (1 << c)) { 3502 if (writes[4 * inst->dst.index + c]) { 3503 if (write_level[4 * inst->dst.index + c] < level) 3504 continue; 3505 else 3506 writes[4 * inst->dst.index + c]->dead_mask |= (1 << c); 3507 } 3508 writes[4 * inst->dst.index + c] = inst; 3509 write_level[4 * inst->dst.index + c] = level; 3510 } 3511 } 3512 } 3513 } 3514 3515 /* Anything still in the write array at this point is dead code. */ 3516 for (int r = 0; r < this->next_temp; r++) { 3517 for (int c = 0; c < 4; c++) { 3518 glsl_to_tgsi_instruction *inst = writes[4 * r + c]; 3519 if (inst) 3520 inst->dead_mask |= (1 << c); 3521 } 3522 } 3523 3524 /* Now actually remove the instructions that are completely dead and update 3525 * the writemask of other instructions with dead channels. 3526 */ 3527 foreach_iter(exec_list_iterator, iter, this->instructions) { 3528 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3529 3530 if (!inst->dead_mask || !inst->dst.writemask) 3531 continue; 3532 else if ((inst->dst.writemask & ~inst->dead_mask) == 0) { 3533 iter.remove(); 3534 delete inst; 3535 removed++; 3536 } else 3537 inst->dst.writemask &= ~(inst->dead_mask); 3538 } 3539 3540 ralloc_free(write_level); 3541 ralloc_free(writes); 3542 3543 return removed; 3544} 3545 3546/* Merges temporary registers together where possible to reduce the number of 3547 * registers needed to run a program. 3548 * 3549 * Produces optimal code only after copy propagation and dead code elimination 3550 * have been run. */ 3551void 3552glsl_to_tgsi_visitor::merge_registers(void) 3553{ 3554 int *last_reads = rzalloc_array(mem_ctx, int, this->next_temp); 3555 int *first_writes = rzalloc_array(mem_ctx, int, this->next_temp); 3556 int i, j; 3557 3558 /* Read the indices of the last read and first write to each temp register 3559 * into an array so that we don't have to traverse the instruction list as 3560 * much. */ 3561 for (i=0; i < this->next_temp; i++) { 3562 last_reads[i] = get_last_temp_read(i); 3563 first_writes[i] = get_first_temp_write(i); 3564 } 3565 3566 /* Start looking for registers with non-overlapping usages that can be 3567 * merged together. */ 3568 for (i=0; i < this->next_temp; i++) { 3569 /* Don't touch unused registers. */ 3570 if (last_reads[i] < 0 || first_writes[i] < 0) continue; 3571 3572 for (j=0; j < this->next_temp; j++) { 3573 /* Don't touch unused registers. */ 3574 if (last_reads[j] < 0 || first_writes[j] < 0) continue; 3575 3576 /* We can merge the two registers if the first write to j is after or 3577 * in the same instruction as the last read from i. Note that the 3578 * register at index i will always be used earlier or at the same time 3579 * as the register at index j. */ 3580 if (first_writes[i] <= first_writes[j] && 3581 last_reads[i] <= first_writes[j]) 3582 { 3583 rename_temp_register(j, i); /* Replace all references to j with i.*/ 3584 3585 /* Update the first_writes and last_reads arrays with the new 3586 * values for the merged register index, and mark the newly unused 3587 * register index as such. */ 3588 last_reads[i] = last_reads[j]; 3589 first_writes[j] = -1; 3590 last_reads[j] = -1; 3591 } 3592 } 3593 } 3594 3595 ralloc_free(last_reads); 3596 ralloc_free(first_writes); 3597} 3598 3599/* Reassign indices to temporary registers by reusing unused indices created 3600 * by optimization passes. */ 3601void 3602glsl_to_tgsi_visitor::renumber_registers(void) 3603{ 3604 int i = 0; 3605 int new_index = 0; 3606 3607 for (i=0; i < this->next_temp; i++) { 3608 if (get_first_temp_read(i) < 0) continue; 3609 if (i != new_index) 3610 rename_temp_register(i, new_index); 3611 new_index++; 3612 } 3613 3614 this->next_temp = new_index; 3615} 3616 3617/** 3618 * Returns a fragment program which implements the current pixel transfer ops. 3619 * Based on get_pixel_transfer_program in st_atom_pixeltransfer.c. 3620 */ 3621extern "C" void 3622get_pixel_transfer_visitor(struct st_fragment_program *fp, 3623 glsl_to_tgsi_visitor *original, 3624 int scale_and_bias, int pixel_maps) 3625{ 3626 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); 3627 struct st_context *st = st_context(original->ctx); 3628 struct gl_program *prog = &fp->Base.Base; 3629 struct gl_program_parameter_list *params = _mesa_new_parameter_list(); 3630 st_src_reg coord, src0; 3631 st_dst_reg dst0; 3632 glsl_to_tgsi_instruction *inst; 3633 3634 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ 3635 v->ctx = original->ctx; 3636 v->prog = prog; 3637 v->shader_program = NULL; 3638 v->glsl_version = original->glsl_version; 3639 v->native_integers = original->native_integers; 3640 v->options = original->options; 3641 v->next_temp = original->next_temp; 3642 v->num_address_regs = original->num_address_regs; 3643 v->samplers_used = prog->SamplersUsed = original->samplers_used; 3644 v->indirect_addr_temps = original->indirect_addr_temps; 3645 v->indirect_addr_consts = original->indirect_addr_consts; 3646 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); 3647 3648 /* 3649 * Get initial pixel color from the texture. 3650 * TEX colorTemp, fragment.texcoord[0], texture[0], 2D; 3651 */ 3652 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type); 3653 src0 = v->get_temp(glsl_type::vec4_type); 3654 dst0 = st_dst_reg(src0); 3655 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); 3656 inst->sampler = 0; 3657 inst->tex_target = TEXTURE_2D_INDEX; 3658 3659 prog->InputsRead |= FRAG_BIT_TEX0; 3660 prog->SamplersUsed |= (1 << 0); /* mark sampler 0 as used */ 3661 v->samplers_used |= (1 << 0); 3662 3663 if (scale_and_bias) { 3664 static const gl_state_index scale_state[STATE_LENGTH] = 3665 { STATE_INTERNAL, STATE_PT_SCALE, 3666 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; 3667 static const gl_state_index bias_state[STATE_LENGTH] = 3668 { STATE_INTERNAL, STATE_PT_BIAS, 3669 (gl_state_index) 0, (gl_state_index) 0, (gl_state_index) 0 }; 3670 GLint scale_p, bias_p; 3671 st_src_reg scale, bias; 3672 3673 scale_p = _mesa_add_state_reference(params, scale_state); 3674 bias_p = _mesa_add_state_reference(params, bias_state); 3675 3676 /* MAD colorTemp, colorTemp, scale, bias; */ 3677 scale = st_src_reg(PROGRAM_STATE_VAR, scale_p, GLSL_TYPE_FLOAT); 3678 bias = st_src_reg(PROGRAM_STATE_VAR, bias_p, GLSL_TYPE_FLOAT); 3679 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias); 3680 } 3681 3682 if (pixel_maps) { 3683 st_src_reg temp = v->get_temp(glsl_type::vec4_type); 3684 st_dst_reg temp_dst = st_dst_reg(temp); 3685 3686 assert(st->pixel_xfer.pixelmap_texture); 3687 3688 /* With a little effort, we can do four pixel map look-ups with 3689 * two TEX instructions: 3690 */ 3691 3692 /* TEX temp.rg, colorTemp.rgba, texture[1], 2D; */ 3693 temp_dst.writemask = WRITEMASK_XY; /* write R,G */ 3694 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); 3695 inst->sampler = 1; 3696 inst->tex_target = TEXTURE_2D_INDEX; 3697 3698 /* TEX temp.ba, colorTemp.baba, texture[1], 2D; */ 3699 src0.swizzle = MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_W, SWIZZLE_Z, SWIZZLE_W); 3700 temp_dst.writemask = WRITEMASK_ZW; /* write B,A */ 3701 inst = v->emit(NULL, TGSI_OPCODE_TEX, temp_dst, src0); 3702 inst->sampler = 1; 3703 inst->tex_target = TEXTURE_2D_INDEX; 3704 3705 prog->SamplersUsed |= (1 << 1); /* mark sampler 1 as used */ 3706 v->samplers_used |= (1 << 1); 3707 3708 /* MOV colorTemp, temp; */ 3709 inst = v->emit(NULL, TGSI_OPCODE_MOV, dst0, temp); 3710 } 3711 3712 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the 3713 * new visitor. */ 3714 foreach_iter(exec_list_iterator, iter, original->instructions) { 3715 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3716 glsl_to_tgsi_instruction *newinst; 3717 st_src_reg src_regs[3]; 3718 3719 if (inst->dst.file == PROGRAM_OUTPUT) 3720 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); 3721 3722 for (int i=0; i<3; i++) { 3723 src_regs[i] = inst->src[i]; 3724 if (src_regs[i].file == PROGRAM_INPUT && 3725 src_regs[i].index == FRAG_ATTRIB_COL0) 3726 { 3727 src_regs[i].file = PROGRAM_TEMPORARY; 3728 src_regs[i].index = src0.index; 3729 } 3730 else if (src_regs[i].file == PROGRAM_INPUT) 3731 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); 3732 } 3733 3734 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); 3735 newinst->tex_target = inst->tex_target; 3736 } 3737 3738 /* Make modifications to fragment program info. */ 3739 prog->Parameters = _mesa_combine_parameter_lists(params, 3740 original->prog->Parameters); 3741 _mesa_free_parameter_list(params); 3742 count_resources(v, prog); 3743 fp->glsl_to_tgsi = v; 3744} 3745 3746/** 3747 * Make fragment program for glBitmap: 3748 * Sample the texture and kill the fragment if the bit is 0. 3749 * This program will be combined with the user's fragment program. 3750 * 3751 * Based on make_bitmap_fragment_program in st_cb_bitmap.c. 3752 */ 3753extern "C" void 3754get_bitmap_visitor(struct st_fragment_program *fp, 3755 glsl_to_tgsi_visitor *original, int samplerIndex) 3756{ 3757 glsl_to_tgsi_visitor *v = new glsl_to_tgsi_visitor(); 3758 struct st_context *st = st_context(original->ctx); 3759 struct gl_program *prog = &fp->Base.Base; 3760 st_src_reg coord, src0; 3761 st_dst_reg dst0; 3762 glsl_to_tgsi_instruction *inst; 3763 3764 /* Copy attributes of the glsl_to_tgsi_visitor in the original shader. */ 3765 v->ctx = original->ctx; 3766 v->prog = prog; 3767 v->shader_program = NULL; 3768 v->glsl_version = original->glsl_version; 3769 v->native_integers = original->native_integers; 3770 v->options = original->options; 3771 v->next_temp = original->next_temp; 3772 v->num_address_regs = original->num_address_regs; 3773 v->samplers_used = prog->SamplersUsed = original->samplers_used; 3774 v->indirect_addr_temps = original->indirect_addr_temps; 3775 v->indirect_addr_consts = original->indirect_addr_consts; 3776 memcpy(&v->immediates, &original->immediates, sizeof(v->immediates)); 3777 3778 /* TEX tmp0, fragment.texcoord[0], texture[0], 2D; */ 3779 coord = st_src_reg(PROGRAM_INPUT, FRAG_ATTRIB_TEX0, glsl_type::vec2_type); 3780 src0 = v->get_temp(glsl_type::vec4_type); 3781 dst0 = st_dst_reg(src0); 3782 inst = v->emit(NULL, TGSI_OPCODE_TEX, dst0, coord); 3783 inst->sampler = samplerIndex; 3784 inst->tex_target = TEXTURE_2D_INDEX; 3785 3786 prog->InputsRead |= FRAG_BIT_TEX0; 3787 prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */ 3788 v->samplers_used |= (1 << samplerIndex); 3789 3790 /* KIL if -tmp0 < 0 # texel=0 -> keep / texel=0 -> discard */ 3791 src0.negate = NEGATE_XYZW; 3792 if (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM) 3793 src0.swizzle = SWIZZLE_XXXX; 3794 inst = v->emit(NULL, TGSI_OPCODE_KIL, undef_dst, src0); 3795 3796 /* Now copy the instructions from the original glsl_to_tgsi_visitor into the 3797 * new visitor. */ 3798 foreach_iter(exec_list_iterator, iter, original->instructions) { 3799 glsl_to_tgsi_instruction *inst = (glsl_to_tgsi_instruction *)iter.get(); 3800 glsl_to_tgsi_instruction *newinst; 3801 st_src_reg src_regs[3]; 3802 3803 if (inst->dst.file == PROGRAM_OUTPUT) 3804 prog->OutputsWritten |= BITFIELD64_BIT(inst->dst.index); 3805 3806 for (int i=0; i<3; i++) { 3807 src_regs[i] = inst->src[i]; 3808 if (src_regs[i].file == PROGRAM_INPUT) 3809 prog->InputsRead |= BITFIELD64_BIT(src_regs[i].index); 3810 } 3811 3812 newinst = v->emit(NULL, inst->op, inst->dst, src_regs[0], src_regs[1], src_regs[2]); 3813 newinst->tex_target = inst->tex_target; 3814 } 3815 3816 /* Make modifications to fragment program info. */ 3817 prog->Parameters = _mesa_clone_parameter_list(original->prog->Parameters); 3818 count_resources(v, prog); 3819 fp->glsl_to_tgsi = v; 3820} 3821 3822/* ------------------------- TGSI conversion stuff -------------------------- */ 3823struct label { 3824 unsigned branch_target; 3825 unsigned token; 3826}; 3827 3828/** 3829 * Intermediate state used during shader translation. 3830 */ 3831struct st_translate { 3832 struct ureg_program *ureg; 3833 3834 struct ureg_dst temps[MAX_TEMPS]; 3835 struct ureg_src *constants; 3836 struct ureg_src *immediates; 3837 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS]; 3838 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS]; 3839 struct ureg_dst address[1]; 3840 struct ureg_src samplers[PIPE_MAX_SAMPLERS]; 3841 struct ureg_src systemValues[SYSTEM_VALUE_MAX]; 3842 3843 /* Extra info for handling point size clamping in vertex shader */ 3844 struct ureg_dst pointSizeResult; /**< Actual point size output register */ 3845 struct ureg_src pointSizeConst; /**< Point size range constant register */ 3846 GLint pointSizeOutIndex; /**< Temp point size output register */ 3847 GLboolean prevInstWrotePointSize; 3848 3849 const GLuint *inputMapping; 3850 const GLuint *outputMapping; 3851 3852 /* For every instruction that contains a label (eg CALL), keep 3853 * details so that we can go back afterwards and emit the correct 3854 * tgsi instruction number for each label. 3855 */ 3856 struct label *labels; 3857 unsigned labels_size; 3858 unsigned labels_count; 3859 3860 /* Keep a record of the tgsi instruction number that each mesa 3861 * instruction starts at, will be used to fix up labels after 3862 * translation. 3863 */ 3864 unsigned *insn; 3865 unsigned insn_size; 3866 unsigned insn_count; 3867 3868 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */ 3869 3870 boolean error; 3871}; 3872 3873/** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */ 3874static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = { 3875 TGSI_SEMANTIC_FACE, 3876 TGSI_SEMANTIC_VERTEXID, 3877 TGSI_SEMANTIC_INSTANCEID 3878}; 3879 3880/** 3881 * Make note of a branch to a label in the TGSI code. 3882 * After we've emitted all instructions, we'll go over the list 3883 * of labels built here and patch the TGSI code with the actual 3884 * location of each label. 3885 */ 3886static unsigned *get_label(struct st_translate *t, unsigned branch_target) 3887{ 3888 unsigned i; 3889 3890 if (t->labels_count + 1 >= t->labels_size) { 3891 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1); 3892 t->labels = (struct label *)realloc(t->labels, 3893 t->labels_size * sizeof(struct label)); 3894 if (t->labels == NULL) { 3895 static unsigned dummy; 3896 t->error = TRUE; 3897 return &dummy; 3898 } 3899 } 3900 3901 i = t->labels_count++; 3902 t->labels[i].branch_target = branch_target; 3903 return &t->labels[i].token; 3904} 3905 3906/** 3907 * Called prior to emitting the TGSI code for each instruction. 3908 * Allocate additional space for instructions if needed. 3909 * Update the insn[] array so the next glsl_to_tgsi_instruction points to 3910 * the next TGSI instruction. 3911 */ 3912static void set_insn_start(struct st_translate *t, unsigned start) 3913{ 3914 if (t->insn_count + 1 >= t->insn_size) { 3915 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1); 3916 t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0])); 3917 if (t->insn == NULL) { 3918 t->error = TRUE; 3919 return; 3920 } 3921 } 3922 3923 t->insn[t->insn_count++] = start; 3924} 3925 3926/** 3927 * Map a glsl_to_tgsi constant/immediate to a TGSI immediate. 3928 */ 3929static struct ureg_src 3930emit_immediate(struct st_translate *t, 3931 gl_constant_value values[4], 3932 int type, int size) 3933{ 3934 struct ureg_program *ureg = t->ureg; 3935 3936 switch(type) 3937 { 3938 case GL_FLOAT: 3939 return ureg_DECL_immediate(ureg, &values[0].f, size); 3940 case GL_INT: 3941 return ureg_DECL_immediate_int(ureg, &values[0].i, size); 3942 case GL_UNSIGNED_INT: 3943 case GL_BOOL: 3944 return ureg_DECL_immediate_uint(ureg, &values[0].u, size); 3945 default: 3946 assert(!"should not get here - type must be float, int, uint, or bool"); 3947 return ureg_src_undef(); 3948 } 3949} 3950 3951/** 3952 * Map a glsl_to_tgsi dst register to a TGSI ureg_dst register. 3953 */ 3954static struct ureg_dst 3955dst_register(struct st_translate *t, 3956 gl_register_file file, 3957 GLuint index) 3958{ 3959 switch(file) { 3960 case PROGRAM_UNDEFINED: 3961 return ureg_dst_undef(); 3962 3963 case PROGRAM_TEMPORARY: 3964 if (ureg_dst_is_undef(t->temps[index])) 3965 t->temps[index] = ureg_DECL_temporary(t->ureg); 3966 3967 return t->temps[index]; 3968 3969 case PROGRAM_OUTPUT: 3970 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ) 3971 t->prevInstWrotePointSize = GL_TRUE; 3972 3973 if (t->procType == TGSI_PROCESSOR_VERTEX) 3974 assert(index < VERT_RESULT_MAX); 3975 else if (t->procType == TGSI_PROCESSOR_FRAGMENT) 3976 assert(index < FRAG_RESULT_MAX); 3977 else 3978 assert(index < GEOM_RESULT_MAX); 3979 3980 assert(t->outputMapping[index] < Elements(t->outputs)); 3981 3982 return t->outputs[t->outputMapping[index]]; 3983 3984 case PROGRAM_ADDRESS: 3985 return t->address[index]; 3986 3987 default: 3988 assert(!"unknown dst register file"); 3989 return ureg_dst_undef(); 3990 } 3991} 3992 3993/** 3994 * Map a glsl_to_tgsi src register to a TGSI ureg_src register. 3995 */ 3996static struct ureg_src 3997src_register(struct st_translate *t, 3998 gl_register_file file, 3999 GLuint index) 4000{ 4001 switch(file) { 4002 case PROGRAM_UNDEFINED: 4003 return ureg_src_undef(); 4004 4005 case PROGRAM_TEMPORARY: 4006 assert(index >= 0); 4007 assert(index < Elements(t->temps)); 4008 if (ureg_dst_is_undef(t->temps[index])) 4009 t->temps[index] = ureg_DECL_temporary(t->ureg); 4010 return ureg_src(t->temps[index]); 4011 4012 case PROGRAM_NAMED_PARAM: 4013 case PROGRAM_ENV_PARAM: 4014 case PROGRAM_LOCAL_PARAM: 4015 case PROGRAM_UNIFORM: 4016 assert(index >= 0); 4017 return t->constants[index]; 4018 case PROGRAM_STATE_VAR: 4019 case PROGRAM_CONSTANT: /* ie, immediate */ 4020 if (index < 0) 4021 return ureg_DECL_constant(t->ureg, 0); 4022 else 4023 return t->constants[index]; 4024 4025 case PROGRAM_IMMEDIATE: 4026 return t->immediates[index]; 4027 4028 case PROGRAM_INPUT: 4029 assert(t->inputMapping[index] < Elements(t->inputs)); 4030 return t->inputs[t->inputMapping[index]]; 4031 4032 case PROGRAM_OUTPUT: 4033 assert(t->outputMapping[index] < Elements(t->outputs)); 4034 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */ 4035 4036 case PROGRAM_ADDRESS: 4037 return ureg_src(t->address[index]); 4038 4039 case PROGRAM_SYSTEM_VALUE: 4040 assert(index < Elements(t->systemValues)); 4041 return t->systemValues[index]; 4042 4043 default: 4044 assert(!"unknown src register file"); 4045 return ureg_src_undef(); 4046 } 4047} 4048 4049/** 4050 * Create a TGSI ureg_dst register from an st_dst_reg. 4051 */ 4052static struct ureg_dst 4053translate_dst(struct st_translate *t, 4054 const st_dst_reg *dst_reg, 4055 bool saturate) 4056{ 4057 struct ureg_dst dst = dst_register(t, 4058 dst_reg->file, 4059 dst_reg->index); 4060 4061 dst = ureg_writemask(dst, dst_reg->writemask); 4062 4063 if (saturate) 4064 dst = ureg_saturate(dst); 4065 4066 if (dst_reg->reladdr != NULL) 4067 dst = ureg_dst_indirect(dst, ureg_src(t->address[0])); 4068 4069 return dst; 4070} 4071 4072/** 4073 * Create a TGSI ureg_src register from an st_src_reg. 4074 */ 4075static struct ureg_src 4076translate_src(struct st_translate *t, const st_src_reg *src_reg) 4077{ 4078 struct ureg_src src = src_register(t, src_reg->file, src_reg->index); 4079 4080 src = ureg_swizzle(src, 4081 GET_SWZ(src_reg->swizzle, 0) & 0x3, 4082 GET_SWZ(src_reg->swizzle, 1) & 0x3, 4083 GET_SWZ(src_reg->swizzle, 2) & 0x3, 4084 GET_SWZ(src_reg->swizzle, 3) & 0x3); 4085 4086 if ((src_reg->negate & 0xf) == NEGATE_XYZW) 4087 src = ureg_negate(src); 4088 4089 if (src_reg->reladdr != NULL) { 4090 /* Normally ureg_src_indirect() would be used here, but a stupid compiler 4091 * bug in g++ makes ureg_src_indirect (an inline C function) erroneously 4092 * set the bit for src.Negate. So we have to do the operation manually 4093 * here to work around the compiler's problems. */ 4094 /*src = ureg_src_indirect(src, ureg_src(t->address[0]));*/ 4095 struct ureg_src addr = ureg_src(t->address[0]); 4096 src.Indirect = 1; 4097 src.IndirectFile = addr.File; 4098 src.IndirectIndex = addr.Index; 4099 src.IndirectSwizzle = addr.SwizzleX; 4100 4101 if (src_reg->file != PROGRAM_INPUT && 4102 src_reg->file != PROGRAM_OUTPUT) { 4103 /* If src_reg->index was negative, it was set to zero in 4104 * src_register(). Reassign it now. But don't do this 4105 * for input/output regs since they get remapped while 4106 * const buffers don't. 4107 */ 4108 src.Index = src_reg->index; 4109 } 4110 } 4111 4112 return src; 4113} 4114 4115static struct tgsi_texture_offset 4116translate_tex_offset(struct st_translate *t, 4117 const struct tgsi_texture_offset *in_offset) 4118{ 4119 struct tgsi_texture_offset offset; 4120 4121 assert(in_offset->File == PROGRAM_IMMEDIATE); 4122 4123 offset.File = TGSI_FILE_IMMEDIATE; 4124 offset.Index = in_offset->Index; 4125 offset.SwizzleX = in_offset->SwizzleX; 4126 offset.SwizzleY = in_offset->SwizzleY; 4127 offset.SwizzleZ = in_offset->SwizzleZ; 4128 4129 return offset; 4130} 4131 4132static void 4133compile_tgsi_instruction(struct st_translate *t, 4134 const glsl_to_tgsi_instruction *inst) 4135{ 4136 struct ureg_program *ureg = t->ureg; 4137 GLuint i; 4138 struct ureg_dst dst[1]; 4139 struct ureg_src src[4]; 4140 struct tgsi_texture_offset texoffsets[MAX_GLSL_TEXTURE_OFFSET]; 4141 4142 unsigned num_dst; 4143 unsigned num_src; 4144 4145 num_dst = num_inst_dst_regs(inst->op); 4146 num_src = num_inst_src_regs(inst->op); 4147 4148 if (num_dst) 4149 dst[0] = translate_dst(t, 4150 &inst->dst, 4151 inst->saturate); 4152 4153 for (i = 0; i < num_src; i++) 4154 src[i] = translate_src(t, &inst->src[i]); 4155 4156 switch(inst->op) { 4157 case TGSI_OPCODE_BGNLOOP: 4158 case TGSI_OPCODE_CAL: 4159 case TGSI_OPCODE_ELSE: 4160 case TGSI_OPCODE_ENDLOOP: 4161 case TGSI_OPCODE_IF: 4162 assert(num_dst == 0); 4163 ureg_label_insn(ureg, 4164 inst->op, 4165 src, num_src, 4166 get_label(t, 4167 inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0)); 4168 return; 4169 4170 case TGSI_OPCODE_TEX: 4171 case TGSI_OPCODE_TXB: 4172 case TGSI_OPCODE_TXD: 4173 case TGSI_OPCODE_TXL: 4174 case TGSI_OPCODE_TXP: 4175 case TGSI_OPCODE_TXQ: 4176 case TGSI_OPCODE_TXF: 4177 src[num_src++] = t->samplers[inst->sampler]; 4178 for (i = 0; i < inst->tex_offset_num_offset; i++) { 4179 texoffsets[i] = translate_tex_offset(t, &inst->tex_offsets[i]); 4180 } 4181 ureg_tex_insn(ureg, 4182 inst->op, 4183 dst, num_dst, 4184 translate_texture_target(inst->tex_target, inst->tex_shadow), 4185 texoffsets, inst->tex_offset_num_offset, 4186 src, num_src); 4187 return; 4188 4189 case TGSI_OPCODE_SCS: 4190 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY); 4191 ureg_insn(ureg, inst->op, dst, num_dst, src, num_src); 4192 break; 4193 4194 default: 4195 ureg_insn(ureg, 4196 inst->op, 4197 dst, num_dst, 4198 src, num_src); 4199 break; 4200 } 4201} 4202 4203/** 4204 * Emit the TGSI instructions for inverting and adjusting WPOS. 4205 * This code is unavoidable because it also depends on whether 4206 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM). 4207 */ 4208static void 4209emit_wpos_adjustment( struct st_translate *t, 4210 const struct gl_program *program, 4211 boolean invert, 4212 GLfloat adjX, GLfloat adjY[2]) 4213{ 4214 struct ureg_program *ureg = t->ureg; 4215 4216 /* Fragment program uses fragment position input. 4217 * Need to replace instances of INPUT[WPOS] with temp T 4218 * where T = INPUT[WPOS] by y is inverted. 4219 */ 4220 static const gl_state_index wposTransformState[STATE_LENGTH] 4221 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 4222 (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 }; 4223 4224 /* XXX: note we are modifying the incoming shader here! Need to 4225 * do this before emitting the constant decls below, or this 4226 * will be missed: 4227 */ 4228 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters, 4229 wposTransformState); 4230 4231 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst ); 4232 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg ); 4233 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]]; 4234 4235 /* First, apply the coordinate shift: */ 4236 if (adjX || adjY[0] || adjY[1]) { 4237 if (adjY[0] != adjY[1]) { 4238 /* Adjust the y coordinate by adjY[1] or adjY[0] respectively 4239 * depending on whether inversion is actually going to be applied 4240 * or not, which is determined by testing against the inversion 4241 * state variable used below, which will be either +1 or -1. 4242 */ 4243 struct ureg_dst adj_temp = ureg_DECL_temporary(ureg); 4244 4245 ureg_CMP(ureg, adj_temp, 4246 ureg_scalar(wpostrans, invert ? 2 : 0), 4247 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f), 4248 ureg_imm4f(ureg, adjX, adjY[1], 0.0f, 0.0f)); 4249 ureg_ADD(ureg, wpos_temp, wpos_input, ureg_src(adj_temp)); 4250 } else { 4251 ureg_ADD(ureg, wpos_temp, wpos_input, 4252 ureg_imm4f(ureg, adjX, adjY[0], 0.0f, 0.0f)); 4253 } 4254 wpos_input = ureg_src(wpos_temp); 4255 } else { 4256 /* MOV wpos_temp, input[wpos] 4257 */ 4258 ureg_MOV( ureg, wpos_temp, wpos_input ); 4259 } 4260 4261 /* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be 4262 * inversion/identity, or the other way around if we're drawing to an FBO. 4263 */ 4264 if (invert) { 4265 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy 4266 */ 4267 ureg_MAD( ureg, 4268 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ), 4269 wpos_input, 4270 ureg_scalar(wpostrans, 0), 4271 ureg_scalar(wpostrans, 1)); 4272 } else { 4273 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww 4274 */ 4275 ureg_MAD( ureg, 4276 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ), 4277 wpos_input, 4278 ureg_scalar(wpostrans, 2), 4279 ureg_scalar(wpostrans, 3)); 4280 } 4281 4282 /* Use wpos_temp as position input from here on: 4283 */ 4284 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp); 4285} 4286 4287 4288/** 4289 * Emit fragment position/ooordinate code. 4290 */ 4291static void 4292emit_wpos(struct st_context *st, 4293 struct st_translate *t, 4294 const struct gl_program *program, 4295 struct ureg_program *ureg) 4296{ 4297 const struct gl_fragment_program *fp = 4298 (const struct gl_fragment_program *) program; 4299 struct pipe_screen *pscreen = st->pipe->screen; 4300 GLfloat adjX = 0.0f; 4301 GLfloat adjY[2] = { 0.0f, 0.0f }; 4302 boolean invert = FALSE; 4303 4304 /* Query the pixel center conventions supported by the pipe driver and set 4305 * adjX, adjY to help out if it cannot handle the requested one internally. 4306 * 4307 * The bias of the y-coordinate depends on whether y-inversion takes place 4308 * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are 4309 * drawing to an FBO (causes additional inversion), and whether the the pipe 4310 * driver origin and the requested origin differ (the latter condition is 4311 * stored in the 'invert' variable). 4312 * 4313 * For height = 100 (i = integer, h = half-integer, l = lower, u = upper): 4314 * 4315 * center shift only: 4316 * i -> h: +0.5 4317 * h -> i: -0.5 4318 * 4319 * inversion only: 4320 * l,i -> u,i: ( 0.0 + 1.0) * -1 + 100 = 99 4321 * l,h -> u,h: ( 0.5 + 0.0) * -1 + 100 = 99.5 4322 * u,i -> l,i: (99.0 + 1.0) * -1 + 100 = 0 4323 * u,h -> l,h: (99.5 + 0.0) * -1 + 100 = 0.5 4324 * 4325 * inversion and center shift: 4326 * l,i -> u,h: ( 0.0 + 0.5) * -1 + 100 = 99.5 4327 * l,h -> u,i: ( 0.5 + 0.5) * -1 + 100 = 99 4328 * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5 4329 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0 4330 */ 4331 if (fp->OriginUpperLeft) { 4332 /* Fragment shader wants origin in upper-left */ 4333 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) { 4334 /* the driver supports upper-left origin */ 4335 } 4336 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) { 4337 /* the driver supports lower-left origin, need to invert Y */ 4338 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT); 4339 invert = TRUE; 4340 } 4341 else 4342 assert(0); 4343 } 4344 else { 4345 /* Fragment shader wants origin in lower-left */ 4346 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) 4347 /* the driver supports lower-left origin */ 4348 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT); 4349 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) 4350 /* the driver supports upper-left origin, need to invert Y */ 4351 invert = TRUE; 4352 else 4353 assert(0); 4354 } 4355 4356 if (fp->PixelCenterInteger) { 4357 /* Fragment shader wants pixel center integer */ 4358 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { 4359 /* the driver supports pixel center integer */ 4360 adjY[1] = 1.0f; 4361 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER); 4362 } 4363 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) { 4364 /* the driver supports pixel center half integer, need to bias X,Y */ 4365 adjX = -0.5f; 4366 adjY[0] = -0.5f; 4367 adjY[1] = 0.5f; 4368 } 4369 else 4370 assert(0); 4371 } 4372 else { 4373 /* Fragment shader wants pixel center half integer */ 4374 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) { 4375 /* the driver supports pixel center half integer */ 4376 } 4377 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { 4378 /* the driver supports pixel center integer, need to bias X,Y */ 4379 adjX = adjY[0] = adjY[1] = 0.5f; 4380 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER); 4381 } 4382 else 4383 assert(0); 4384 } 4385 4386 /* we invert after adjustment so that we avoid the MOV to temporary, 4387 * and reuse the adjustment ADD instead */ 4388 emit_wpos_adjustment(t, program, invert, adjX, adjY); 4389} 4390 4391/** 4392 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back. 4393 * TGSI uses +1 for front, -1 for back. 4394 * This function converts the TGSI value to the GL value. Simply clamping/ 4395 * saturating the value to [0,1] does the job. 4396 */ 4397static void 4398emit_face_var(struct st_translate *t) 4399{ 4400 struct ureg_program *ureg = t->ureg; 4401 struct ureg_dst face_temp = ureg_DECL_temporary(ureg); 4402 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]]; 4403 4404 /* MOV_SAT face_temp, input[face] */ 4405 face_temp = ureg_saturate(face_temp); 4406 ureg_MOV(ureg, face_temp, face_input); 4407 4408 /* Use face_temp as face input from here on: */ 4409 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp); 4410} 4411 4412static void 4413emit_edgeflags(struct st_translate *t) 4414{ 4415 struct ureg_program *ureg = t->ureg; 4416 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]]; 4417 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]]; 4418 4419 ureg_MOV(ureg, edge_dst, edge_src); 4420} 4421 4422/** 4423 * Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format. 4424 * \param program the program to translate 4425 * \param numInputs number of input registers used 4426 * \param inputMapping maps Mesa fragment program inputs to TGSI generic 4427 * input indexes 4428 * \param inputSemanticName the TGSI_SEMANTIC flag for each input 4429 * \param inputSemanticIndex the semantic index (ex: which texcoord) for 4430 * each input 4431 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input 4432 * \param numOutputs number of output registers used 4433 * \param outputMapping maps Mesa fragment program outputs to TGSI 4434 * generic outputs 4435 * \param outputSemanticName the TGSI_SEMANTIC flag for each output 4436 * \param outputSemanticIndex the semantic index (ex: which texcoord) for 4437 * each output 4438 * 4439 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY 4440 */ 4441extern "C" enum pipe_error 4442st_translate_program( 4443 struct gl_context *ctx, 4444 uint procType, 4445 struct ureg_program *ureg, 4446 glsl_to_tgsi_visitor *program, 4447 const struct gl_program *proginfo, 4448 GLuint numInputs, 4449 const GLuint inputMapping[], 4450 const ubyte inputSemanticName[], 4451 const ubyte inputSemanticIndex[], 4452 const GLuint interpMode[], 4453 GLuint numOutputs, 4454 const GLuint outputMapping[], 4455 const ubyte outputSemanticName[], 4456 const ubyte outputSemanticIndex[], 4457 boolean passthrough_edgeflags) 4458{ 4459 struct st_translate *t; 4460 unsigned i; 4461 enum pipe_error ret = PIPE_OK; 4462 4463 assert(numInputs <= Elements(t->inputs)); 4464 assert(numOutputs <= Elements(t->outputs)); 4465 4466 t = CALLOC_STRUCT(st_translate); 4467 if (!t) { 4468 ret = PIPE_ERROR_OUT_OF_MEMORY; 4469 goto out; 4470 } 4471 4472 memset(t, 0, sizeof *t); 4473 4474 t->procType = procType; 4475 t->inputMapping = inputMapping; 4476 t->outputMapping = outputMapping; 4477 t->ureg = ureg; 4478 t->pointSizeOutIndex = -1; 4479 t->prevInstWrotePointSize = GL_FALSE; 4480 4481 if (program->shader_program) { 4482 for (i = 0; i < program->shader_program->NumUserUniformStorage; i++) { 4483 struct gl_uniform_storage *const storage = 4484 &program->shader_program->UniformStorage[i]; 4485 4486 _mesa_uniform_detach_all_driver_storage(storage); 4487 } 4488 } 4489 4490 /* 4491 * Declare input attributes. 4492 */ 4493 if (procType == TGSI_PROCESSOR_FRAGMENT) { 4494 for (i = 0; i < numInputs; i++) { 4495 t->inputs[i] = ureg_DECL_fs_input(ureg, 4496 inputSemanticName[i], 4497 inputSemanticIndex[i], 4498 interpMode[i]); 4499 } 4500 4501 if (proginfo->InputsRead & FRAG_BIT_WPOS) { 4502 /* Must do this after setting up t->inputs, and before 4503 * emitting constant references, below: 4504 */ 4505 emit_wpos(st_context(ctx), t, proginfo, ureg); 4506 } 4507 4508 if (proginfo->InputsRead & FRAG_BIT_FACE) 4509 emit_face_var(t); 4510 4511 /* 4512 * Declare output attributes. 4513 */ 4514 for (i = 0; i < numOutputs; i++) { 4515 switch (outputSemanticName[i]) { 4516 case TGSI_SEMANTIC_POSITION: 4517 t->outputs[i] = ureg_DECL_output(ureg, 4518 TGSI_SEMANTIC_POSITION, /* Z/Depth */ 4519 outputSemanticIndex[i]); 4520 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Z); 4521 break; 4522 case TGSI_SEMANTIC_STENCIL: 4523 t->outputs[i] = ureg_DECL_output(ureg, 4524 TGSI_SEMANTIC_STENCIL, /* Stencil */ 4525 outputSemanticIndex[i]); 4526 t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_Y); 4527 break; 4528 case TGSI_SEMANTIC_COLOR: 4529 t->outputs[i] = ureg_DECL_output(ureg, 4530 TGSI_SEMANTIC_COLOR, 4531 outputSemanticIndex[i]); 4532 break; 4533 default: 4534 assert(!"fragment shader outputs must be POSITION/STENCIL/COLOR"); 4535 ret = PIPE_ERROR_BAD_INPUT; 4536 goto out; 4537 } 4538 } 4539 } 4540 else if (procType == TGSI_PROCESSOR_GEOMETRY) { 4541 for (i = 0; i < numInputs; i++) { 4542 t->inputs[i] = ureg_DECL_gs_input(ureg, 4543 i, 4544 inputSemanticName[i], 4545 inputSemanticIndex[i]); 4546 } 4547 4548 for (i = 0; i < numOutputs; i++) { 4549 t->outputs[i] = ureg_DECL_output(ureg, 4550 outputSemanticName[i], 4551 outputSemanticIndex[i]); 4552 } 4553 } 4554 else { 4555 assert(procType == TGSI_PROCESSOR_VERTEX); 4556 4557 for (i = 0; i < numInputs; i++) { 4558 t->inputs[i] = ureg_DECL_vs_input(ureg, i); 4559 } 4560 4561 for (i = 0; i < numOutputs; i++) { 4562 if (outputSemanticName[i] == TGSI_SEMANTIC_CLIPDIST) { 4563 int mask = ((1 << (program->num_clip_distances - 4*outputSemanticIndex[i])) - 1) & TGSI_WRITEMASK_XYZW; 4564 t->outputs[i] = ureg_DECL_output_masked(ureg, 4565 outputSemanticName[i], 4566 outputSemanticIndex[i], 4567 mask); 4568 } else { 4569 t->outputs[i] = ureg_DECL_output(ureg, 4570 outputSemanticName[i], 4571 outputSemanticIndex[i]); 4572 } 4573 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && proginfo->Id) { 4574 /* Writing to the point size result register requires special 4575 * handling to implement clamping. 4576 */ 4577 static const gl_state_index pointSizeClampState[STATE_LENGTH] 4578 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, (gl_state_index)0, (gl_state_index)0, (gl_state_index)0 }; 4579 /* XXX: note we are modifying the incoming shader here! Need to 4580 * do this before emitting the constant decls below, or this 4581 * will be missed. 4582 */ 4583 unsigned pointSizeClampConst = 4584 _mesa_add_state_reference(proginfo->Parameters, 4585 pointSizeClampState); 4586 struct ureg_dst psizregtemp = ureg_DECL_temporary(ureg); 4587 t->pointSizeConst = ureg_DECL_constant(ureg, pointSizeClampConst); 4588 t->pointSizeResult = t->outputs[i]; 4589 t->pointSizeOutIndex = i; 4590 t->outputs[i] = psizregtemp; 4591 } 4592 } 4593 if (passthrough_edgeflags) 4594 emit_edgeflags(t); 4595 } 4596 4597 /* Declare address register. 4598 */ 4599 if (program->num_address_regs > 0) { 4600 assert(program->num_address_regs == 1); 4601 t->address[0] = ureg_DECL_address(ureg); 4602 } 4603 4604 /* Declare misc input registers 4605 */ 4606 { 4607 GLbitfield sysInputs = proginfo->SystemValuesRead; 4608 unsigned numSys = 0; 4609 for (i = 0; sysInputs; i++) { 4610 if (sysInputs & (1 << i)) { 4611 unsigned semName = mesa_sysval_to_semantic[i]; 4612 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0); 4613 numSys++; 4614 sysInputs &= ~(1 << i); 4615 } 4616 } 4617 } 4618 4619 if (program->indirect_addr_temps) { 4620 /* If temps are accessed with indirect addressing, declare temporaries 4621 * in sequential order. Else, we declare them on demand elsewhere. 4622 * (Note: the number of temporaries is equal to program->next_temp) 4623 */ 4624 for (i = 0; i < (unsigned)program->next_temp; i++) { 4625 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */ 4626 t->temps[i] = ureg_DECL_temporary(t->ureg); 4627 } 4628 } 4629 4630 /* Emit constants and uniforms. TGSI uses a single index space for these, 4631 * so we put all the translated regs in t->constants. 4632 */ 4633 if (proginfo->Parameters) { 4634 t->constants = (struct ureg_src *)CALLOC(proginfo->Parameters->NumParameters * sizeof(t->constants[0])); 4635 if (t->constants == NULL) { 4636 ret = PIPE_ERROR_OUT_OF_MEMORY; 4637 goto out; 4638 } 4639 4640 for (i = 0; i < proginfo->Parameters->NumParameters; i++) { 4641 switch (proginfo->Parameters->Parameters[i].Type) { 4642 case PROGRAM_ENV_PARAM: 4643 case PROGRAM_LOCAL_PARAM: 4644 case PROGRAM_STATE_VAR: 4645 case PROGRAM_NAMED_PARAM: 4646 case PROGRAM_UNIFORM: 4647 t->constants[i] = ureg_DECL_constant(ureg, i); 4648 break; 4649 4650 /* Emit immediates for PROGRAM_CONSTANT only when there's no indirect 4651 * addressing of the const buffer. 4652 * FIXME: Be smarter and recognize param arrays: 4653 * indirect addressing is only valid within the referenced 4654 * array. 4655 */ 4656 case PROGRAM_CONSTANT: 4657 if (program->indirect_addr_consts) 4658 t->constants[i] = ureg_DECL_constant(ureg, i); 4659 else 4660 t->constants[i] = emit_immediate(t, 4661 proginfo->Parameters->ParameterValues[i], 4662 proginfo->Parameters->Parameters[i].DataType, 4663 4); 4664 break; 4665 default: 4666 break; 4667 } 4668 } 4669 } 4670 4671 /* Emit immediate values. 4672 */ 4673 t->immediates = (struct ureg_src *)CALLOC(program->num_immediates * sizeof(struct ureg_src)); 4674 if (t->immediates == NULL) { 4675 ret = PIPE_ERROR_OUT_OF_MEMORY; 4676 goto out; 4677 } 4678 i = 0; 4679 foreach_iter(exec_list_iterator, iter, program->immediates) { 4680 immediate_storage *imm = (immediate_storage *)iter.get(); 4681 t->immediates[i++] = emit_immediate(t, imm->values, imm->type, imm->size); 4682 } 4683 4684 /* texture samplers */ 4685 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) { 4686 if (program->samplers_used & (1 << i)) { 4687 t->samplers[i] = ureg_DECL_sampler(ureg, i); 4688 } 4689 } 4690 4691 /* Emit each instruction in turn: 4692 */ 4693 foreach_iter(exec_list_iterator, iter, program->instructions) { 4694 set_insn_start(t, ureg_get_instruction_number(ureg)); 4695 compile_tgsi_instruction(t, (glsl_to_tgsi_instruction *)iter.get()); 4696 4697 if (t->prevInstWrotePointSize && proginfo->Id) { 4698 /* The previous instruction wrote to the (fake) vertex point size 4699 * result register. Now we need to clamp that value to the min/max 4700 * point size range, putting the result into the real point size 4701 * register. 4702 * Note that we can't do this easily at the end of program due to 4703 * possible early return. 4704 */ 4705 set_insn_start(t, ureg_get_instruction_number(ureg)); 4706 ureg_MAX(t->ureg, 4707 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X), 4708 ureg_src(t->outputs[t->pointSizeOutIndex]), 4709 ureg_swizzle(t->pointSizeConst, 1,1,1,1)); 4710 ureg_MIN(t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X), 4711 ureg_src(t->outputs[t->pointSizeOutIndex]), 4712 ureg_swizzle(t->pointSizeConst, 2,2,2,2)); 4713 } 4714 t->prevInstWrotePointSize = GL_FALSE; 4715 } 4716 4717 /* Fix up all emitted labels: 4718 */ 4719 for (i = 0; i < t->labels_count; i++) { 4720 ureg_fixup_label(ureg, t->labels[i].token, 4721 t->insn[t->labels[i].branch_target]); 4722 } 4723 4724 if (program->shader_program) { 4725 /* This has to be done last. Any operation the can cause 4726 * prog->ParameterValues to get reallocated (e.g., anything that adds a 4727 * program constant) has to happen before creating this linkage. 4728 */ 4729 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) { 4730 if (program->shader_program->_LinkedShaders[i] == NULL) 4731 continue; 4732 4733 _mesa_associate_uniform_storage(ctx, program->shader_program, 4734 program->shader_program->_LinkedShaders[i]->Program->Parameters); 4735 } 4736 } 4737 4738out: 4739 if (t) { 4740 FREE(t->insn); 4741 FREE(t->labels); 4742 FREE(t->constants); 4743 FREE(t->immediates); 4744 4745 if (t->error) { 4746 debug_printf("%s: translate error flag set\n", __FUNCTION__); 4747 } 4748 4749 FREE(t); 4750 } 4751 4752 return ret; 4753} 4754/* ----------------------------- End TGSI code ------------------------------ */ 4755 4756/** 4757 * Convert a shader's GLSL IR into a Mesa gl_program, although without 4758 * generating Mesa IR. 4759 */ 4760static struct gl_program * 4761get_mesa_program(struct gl_context *ctx, 4762 struct gl_shader_program *shader_program, 4763 struct gl_shader *shader, 4764 int num_clip_distances) 4765{ 4766 glsl_to_tgsi_visitor* v = new glsl_to_tgsi_visitor(); 4767 struct gl_program *prog; 4768 struct pipe_screen * screen = st_context(ctx)->pipe->screen; 4769 unsigned pipe_shader_type; 4770 GLenum target; 4771 const char *target_string; 4772 bool progress; 4773 struct gl_shader_compiler_options *options = 4774 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)]; 4775 4776 switch (shader->Type) { 4777 case GL_VERTEX_SHADER: 4778 target = GL_VERTEX_PROGRAM_ARB; 4779 target_string = "vertex"; 4780 pipe_shader_type = PIPE_SHADER_VERTEX; 4781 break; 4782 case GL_FRAGMENT_SHADER: 4783 target = GL_FRAGMENT_PROGRAM_ARB; 4784 target_string = "fragment"; 4785 pipe_shader_type = PIPE_SHADER_FRAGMENT; 4786 break; 4787 case GL_GEOMETRY_SHADER: 4788 target = GL_GEOMETRY_PROGRAM_NV; 4789 target_string = "geometry"; 4790 pipe_shader_type = PIPE_SHADER_GEOMETRY; 4791 break; 4792 default: 4793 assert(!"should not be reached"); 4794 return NULL; 4795 } 4796 4797 validate_ir_tree(shader->ir); 4798 4799 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name); 4800 if (!prog) 4801 return NULL; 4802 prog->Parameters = _mesa_new_parameter_list(); 4803 v->ctx = ctx; 4804 v->prog = prog; 4805 v->shader_program = shader_program; 4806 v->options = options; 4807 v->glsl_version = ctx->Const.GLSLVersion; 4808 v->native_integers = ctx->Const.NativeIntegers; 4809 v->num_clip_distances = num_clip_distances; 4810 4811 _mesa_generate_parameters_list_for_uniforms(shader_program, shader, 4812 prog->Parameters); 4813 4814 if (!screen->get_shader_param(screen, pipe_shader_type, 4815 PIPE_SHADER_CAP_OUTPUT_READ)) { 4816 /* Remove reads to output registers, and to varyings in vertex shaders. */ 4817 lower_output_reads(shader->ir); 4818 } 4819 4820 4821 /* Emit intermediate IR for main(). */ 4822 visit_exec_list(shader->ir, v); 4823 4824 /* Now emit bodies for any functions that were used. */ 4825 do { 4826 progress = GL_FALSE; 4827 4828 foreach_iter(exec_list_iterator, iter, v->function_signatures) { 4829 function_entry *entry = (function_entry *)iter.get(); 4830 4831 if (!entry->bgn_inst) { 4832 v->current_function = entry; 4833 4834 entry->bgn_inst = v->emit(NULL, TGSI_OPCODE_BGNSUB); 4835 entry->bgn_inst->function = entry; 4836 4837 visit_exec_list(&entry->sig->body, v); 4838 4839 glsl_to_tgsi_instruction *last; 4840 last = (glsl_to_tgsi_instruction *)v->instructions.get_tail(); 4841 if (last->op != TGSI_OPCODE_RET) 4842 v->emit(NULL, TGSI_OPCODE_RET); 4843 4844 glsl_to_tgsi_instruction *end; 4845 end = v->emit(NULL, TGSI_OPCODE_ENDSUB); 4846 end->function = entry; 4847 4848 progress = GL_TRUE; 4849 } 4850 } 4851 } while (progress); 4852 4853#if 0 4854 /* Print out some information (for debugging purposes) used by the 4855 * optimization passes. */ 4856 for (i=0; i < v->next_temp; i++) { 4857 int fr = v->get_first_temp_read(i); 4858 int fw = v->get_first_temp_write(i); 4859 int lr = v->get_last_temp_read(i); 4860 int lw = v->get_last_temp_write(i); 4861 4862 printf("Temp %d: FR=%3d FW=%3d LR=%3d LW=%3d\n", i, fr, fw, lr, lw); 4863 assert(fw <= fr); 4864 } 4865#endif 4866 4867 /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */ 4868 v->simplify_cmp(); 4869 v->copy_propagate(); 4870 while (v->eliminate_dead_code_advanced()); 4871 4872 /* FIXME: These passes to optimize temporary registers don't work when there 4873 * is indirect addressing of the temporary register space. We need proper 4874 * array support so that we don't have to give up these passes in every 4875 * shader that uses arrays. 4876 */ 4877 if (!v->indirect_addr_temps) { 4878 v->eliminate_dead_code(); 4879 v->merge_registers(); 4880 v->renumber_registers(); 4881 } 4882 4883 /* Write the END instruction. */ 4884 v->emit(NULL, TGSI_OPCODE_END); 4885 4886 if (ctx->Shader.Flags & GLSL_DUMP) { 4887 printf("\n"); 4888 printf("GLSL IR for linked %s program %d:\n", target_string, 4889 shader_program->Name); 4890 _mesa_print_ir(shader->ir, NULL); 4891 printf("\n"); 4892 printf("\n"); 4893 fflush(stdout); 4894 } 4895 4896 prog->Instructions = NULL; 4897 prog->NumInstructions = 0; 4898 4899 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER); 4900 count_resources(v, prog); 4901 4902 _mesa_reference_program(ctx, &shader->Program, prog); 4903 4904 /* This has to be done last. Any operation the can cause 4905 * prog->ParameterValues to get reallocated (e.g., anything that adds a 4906 * program constant) has to happen before creating this linkage. 4907 */ 4908 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters); 4909 if (!shader_program->LinkStatus) { 4910 return NULL; 4911 } 4912 4913 struct st_vertex_program *stvp; 4914 struct st_fragment_program *stfp; 4915 struct st_geometry_program *stgp; 4916 4917 switch (shader->Type) { 4918 case GL_VERTEX_SHADER: 4919 stvp = (struct st_vertex_program *)prog; 4920 stvp->glsl_to_tgsi = v; 4921 break; 4922 case GL_FRAGMENT_SHADER: 4923 stfp = (struct st_fragment_program *)prog; 4924 stfp->glsl_to_tgsi = v; 4925 break; 4926 case GL_GEOMETRY_SHADER: 4927 stgp = (struct st_geometry_program *)prog; 4928 stgp->glsl_to_tgsi = v; 4929 break; 4930 default: 4931 assert(!"should not be reached"); 4932 return NULL; 4933 } 4934 4935 return prog; 4936} 4937 4938/** 4939 * Searches through the IR for a declaration of gl_ClipDistance and returns the 4940 * declared size of the gl_ClipDistance array. Returns 0 if gl_ClipDistance is 4941 * not declared in the IR. 4942 */ 4943int get_clip_distance_size(exec_list *ir) 4944{ 4945 foreach_iter (exec_list_iterator, iter, *ir) { 4946 ir_instruction *inst = (ir_instruction *)iter.get(); 4947 ir_variable *var = inst->as_variable(); 4948 if (var == NULL) continue; 4949 if (!strcmp(var->name, "gl_ClipDistance")) { 4950 return var->type->length; 4951 } 4952 } 4953 4954 return 0; 4955} 4956 4957extern "C" { 4958 4959struct gl_shader * 4960st_new_shader(struct gl_context *ctx, GLuint name, GLuint type) 4961{ 4962 struct gl_shader *shader; 4963 assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER || 4964 type == GL_GEOMETRY_SHADER_ARB); 4965 shader = rzalloc(NULL, struct gl_shader); 4966 if (shader) { 4967 shader->Type = type; 4968 shader->Name = name; 4969 _mesa_init_shader(ctx, shader); 4970 } 4971 return shader; 4972} 4973 4974struct gl_shader_program * 4975st_new_shader_program(struct gl_context *ctx, GLuint name) 4976{ 4977 struct gl_shader_program *shProg; 4978 shProg = rzalloc(NULL, struct gl_shader_program); 4979 if (shProg) { 4980 shProg->Name = name; 4981 _mesa_init_shader_program(ctx, shProg); 4982 } 4983 return shProg; 4984} 4985 4986/** 4987 * Link a shader. 4988 * Called via ctx->Driver.LinkShader() 4989 * This actually involves converting GLSL IR into an intermediate TGSI-like IR 4990 * with code lowering and other optimizations. 4991 */ 4992GLboolean 4993st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) 4994{ 4995 int num_clip_distances[MESA_SHADER_TYPES]; 4996 assert(prog->LinkStatus); 4997 4998 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) { 4999 if (prog->_LinkedShaders[i] == NULL) 5000 continue; 5001 5002 bool progress; 5003 exec_list *ir = prog->_LinkedShaders[i]->ir; 5004 const struct gl_shader_compiler_options *options = 5005 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)]; 5006 5007 /* We have to determine the length of the gl_ClipDistance array before 5008 * the array is lowered to two vec4s by lower_clip_distance(). 5009 */ 5010 num_clip_distances[i] = get_clip_distance_size(ir); 5011 5012 do { 5013 progress = false; 5014 5015 /* Lowering */ 5016 do_mat_op_to_vec(ir); 5017 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2 5018 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP 5019 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0))); 5020 5021 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress; 5022 5023 progress = do_common_optimization(ir, true, true, 5024 options->MaxUnrollIterations) 5025 || progress; 5026 5027 progress = lower_quadop_vector(ir, false) || progress; 5028 progress = lower_clip_distance(ir) || progress; 5029 5030 if (options->MaxIfDepth == 0) 5031 progress = lower_discard(ir) || progress; 5032 5033 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; 5034 5035 if (options->EmitNoNoise) 5036 progress = lower_noise(ir) || progress; 5037 5038 /* If there are forms of indirect addressing that the driver 5039 * cannot handle, perform the lowering pass. 5040 */ 5041 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput 5042 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) 5043 progress = 5044 lower_variable_index_to_cond_assign(ir, 5045 options->EmitNoIndirectInput, 5046 options->EmitNoIndirectOutput, 5047 options->EmitNoIndirectTemp, 5048 options->EmitNoIndirectUniform) 5049 || progress; 5050 5051 progress = do_vec_index_to_cond_assign(ir) || progress; 5052 } while (progress); 5053 5054 validate_ir_tree(ir); 5055 } 5056 5057 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) { 5058 struct gl_program *linked_prog; 5059 5060 if (prog->_LinkedShaders[i] == NULL) 5061 continue; 5062 5063 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i], 5064 num_clip_distances[i]); 5065 5066 if (linked_prog) { 5067 static const GLenum targets[] = { 5068 GL_VERTEX_PROGRAM_ARB, 5069 GL_FRAGMENT_PROGRAM_ARB, 5070 GL_GEOMETRY_PROGRAM_NV 5071 }; 5072 5073 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, 5074 linked_prog); 5075 if (!ctx->Driver.ProgramStringNotify(ctx, targets[i], linked_prog)) { 5076 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, 5077 NULL); 5078 _mesa_reference_program(ctx, &linked_prog, NULL); 5079 return GL_FALSE; 5080 } 5081 } 5082 5083 _mesa_reference_program(ctx, &linked_prog, NULL); 5084 } 5085 5086 return GL_TRUE; 5087} 5088 5089void 5090st_translate_stream_output_info(struct glsl_to_tgsi_visitor *glsl_to_tgsi, 5091 const GLuint outputMapping[], 5092 struct pipe_stream_output_info *so) 5093{ 5094 static unsigned comps_to_mask[] = { 5095 0, 5096 TGSI_WRITEMASK_X, 5097 TGSI_WRITEMASK_XY, 5098 TGSI_WRITEMASK_XYZ, 5099 TGSI_WRITEMASK_XYZW 5100 }; 5101 unsigned i; 5102 struct gl_transform_feedback_info *info = 5103 &glsl_to_tgsi->shader_program->LinkedTransformFeedback; 5104 5105 for (i = 0; i < info->NumOutputs; i++) { 5106 assert(info->Outputs[i].NumComponents < Elements(comps_to_mask)); 5107 so->output[i].register_index = 5108 outputMapping[info->Outputs[i].OutputRegister]; 5109 so->output[i].register_mask = 5110 comps_to_mask[info->Outputs[i].NumComponents] 5111 << info->Outputs[i].ComponentOffset; 5112 so->output[i].output_buffer = info->Outputs[i].OutputBuffer; 5113 } 5114 so->num_outputs = info->NumOutputs; 5115} 5116 5117} /* extern "C" */ 5118