android_arm.c revision 280afa072a7b829e581d884c2b3276530a6014b7 
1/* Copyright (C) 2007-2008 The Android Open Source Project
2**
3** This software is licensed under the terms of the GNU General Public
4** License version 2, as published by the Free Software Foundation, and
5** may be copied, distributed, and modified under those terms.
6**
7** This program is distributed in the hope that it will be useful,
8** but WITHOUT ANY WARRANTY; without even the implied warranty of
9** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10** GNU General Public License for more details.
11*/
12#include "hw.h"
13#include "boards.h"
14#include "devices.h"
15#include "net.h"
16#include "arm_pic.h"
17#include "sysemu.h"
18#include "goldfish_device.h"
19#include "android/globals.h"
20#include "audio/audio.h"
21#include "arm-misc.h"
22#include "console.h"
23#include "blockdev.h"
24#include "goldfish_pipe.h"
25#ifdef CONFIG_MEMCHECK
26#include "memcheck/memcheck_api.h"
27#endif  // CONFIG_MEMCHECK
28
29#include "android/utils/debug.h"
30
31#define  D(...)  VERBOSE_PRINT(init,__VA_ARGS__)
32
33#define ARM_CPU_SAVE_VERSION  1
34
35char* audio_input_source = NULL;
36
37void goldfish_memlog_init(uint32_t base);
38
39static struct goldfish_device event0_device = {
40    .name = "goldfish_events",
41    .id = 0,
42    .size = 0x1000,
43    .irq_count = 1
44};
45
46static struct goldfish_device nand_device = {
47    .name = "goldfish_nand",
48    .id = 0,
49    .size = 0x1000
50};
51
52/* Board init.  */
53
54#define TEST_SWITCH 1
55#if TEST_SWITCH
56uint32_t switch_test_write(void *opaque, uint32_t state)
57{
58    goldfish_switch_set_state(opaque, state);
59    return state;
60}
61#endif
62static void android_arm_init_(ram_addr_t ram_size,
63    const char *boot_device,
64    const char *kernel_filename,
65    const char *kernel_cmdline,
66    const char *initrd_filename,
67    const char *cpu_model)
68{
69    CPUState *env;
70    qemu_irq *cpu_pic;
71    qemu_irq *goldfish_pic;
72    int i;
73    struct arm_boot_info  info;
74    ram_addr_t ram_offset;
75
76    if (!cpu_model)
77        cpu_model = "arm926";
78
79    env = cpu_init(cpu_model);
80    register_savevm( "cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load, env );
81
82    ram_offset = qemu_ram_alloc(NULL,"android_arm",ram_size);
83    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
84
85    cpu_pic = arm_pic_init_cpu(env);
86    goldfish_pic = goldfish_interrupt_init(0xff000000, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ]);
87    goldfish_device_init(goldfish_pic, 0xff010000, 0x7f0000, 10, 22);
88
89    goldfish_device_bus_init(0xff001000, 1);
90
91    goldfish_timer_and_rtc_init(0xff003000, 3);
92
93    goldfish_tty_add(serial_hds[0], 0, 0xff002000, 4);
94    for(i = 1; i < MAX_SERIAL_PORTS; i++) {
95        //printf("android_arm_init serial %d %x\n", i, serial_hds[i]);
96        if(serial_hds[i]) {
97            goldfish_tty_add(serial_hds[i], i, 0, 0);
98        }
99    }
100
101    for(i = 0; i < MAX_NICS; i++) {
102        if (nd_table[i].vlan) {
103            if (nd_table[i].model == NULL
104                || strcmp(nd_table[i].model, "smc91c111") == 0) {
105                struct goldfish_device *smc_device;
106                smc_device = qemu_mallocz(sizeof(*smc_device));
107                smc_device->name = "smc91x";
108                smc_device->id = i;
109                smc_device->size = 0x1000;
110                smc_device->irq_count = 1;
111                goldfish_add_device_no_io(smc_device);
112                smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
113            } else {
114                fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
115                exit (1);
116            }
117        }
118    }
119
120    goldfish_fb_init(0);
121#ifdef HAS_AUDIO
122    goldfish_audio_init(0xff004000, 0, audio_input_source);
123#endif
124    {
125        DriveInfo* info = drive_get( IF_IDE, 0, 0 );
126        if (info != NULL) {
127            goldfish_mmc_init(0xff005000, 0, info->bdrv);
128        }
129    }
130
131    goldfish_memlog_init(0xff006000);
132
133    if (android_hw->hw_battery)
134        goldfish_battery_init();
135
136    goldfish_add_device_no_io(&event0_device);
137    events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
138
139#ifdef CONFIG_NAND
140    goldfish_add_device_no_io(&nand_device);
141    nand_dev_init(nand_device.base);
142#endif
143#ifdef CONFIG_TRACE
144    extern const char *trace_filename;
145    /* Init trace device if either tracing, or memory checking is enabled. */
146    if (trace_filename != NULL
147#ifdef CONFIG_MEMCHECK
148        || memcheck_enabled
149#endif  // CONFIG_MEMCHECK
150       ) {
151        trace_dev_init();
152    }
153    if (trace_filename != NULL) {
154        D( "Trace file name is set to %s\n", trace_filename );
155    } else  {
156        D("Trace file name is not set\n");
157    }
158#endif
159
160    pipe_dev_init();
161
162#if TEST_SWITCH
163    {
164        void *sw;
165        sw = goldfish_switch_add("test", NULL, NULL, 0);
166        goldfish_switch_set_state(sw, 1);
167        goldfish_switch_add("test2", switch_test_write, sw, 1);
168    }
169#endif
170
171    memset(&info, 0, sizeof info);
172    info.ram_size        = ram_size;
173    info.kernel_filename = kernel_filename;
174    info.kernel_cmdline  = kernel_cmdline;
175    info.initrd_filename = initrd_filename;
176    info.nb_cpus         = 1;
177    info.board_id        = 1441;
178
179    arm_load_kernel(env, &info);
180}
181
182QEMUMachine android_arm_machine = {
183    "android_arm",
184    "ARM Android Emulator",
185    android_arm_init_,
186    0,
187    0,
188    1,
189    NULL
190};
191
192static void android_arm_init(void)
193{
194    qemu_register_machine(&android_arm_machine);
195}
196
197machine_init(android_arm_init);
198