1/* 2 * iwMMXt micro operations for XScale. 3 * 4 * Copyright (c) 2007 OpenedHand, Ltd. 5 * Written by Andrzej Zaborowski <andrew@openedhand.com> 6 * Copyright (c) 2008 CodeSourcery 7 * 8 * This library is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU Lesser General Public 10 * License as published by the Free Software Foundation; either 11 * version 2 of the License, or (at your option) any later version. 12 * 13 * This library is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * Lesser General Public License for more details. 17 * 18 * You should have received a copy of the GNU Lesser General Public 19 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22#include <stdlib.h> 23#include <stdio.h> 24 25#include "cpu.h" 26#include "exec.h" 27#include "helper.h" 28 29/* iwMMXt macros extracted from GNU gdb. */ 30 31/* Set the SIMD wCASF flags for 8, 16, 32 or 64-bit operations. */ 32#define SIMD8_SET( v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n))) 33#define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n))) 34#define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n))) 35#define SIMD64_SET(v, n) ((v != 0) << (32 + (n))) 36/* Flags to pass as "n" above. */ 37#define SIMD_NBIT -1 38#define SIMD_ZBIT -2 39#define SIMD_CBIT -3 40#define SIMD_VBIT -4 41/* Various status bit macros. */ 42#define NBIT8(x) ((x) & 0x80) 43#define NBIT16(x) ((x) & 0x8000) 44#define NBIT32(x) ((x) & 0x80000000) 45#define NBIT64(x) ((x) & 0x8000000000000000ULL) 46#define ZBIT8(x) (((x) & 0xff) == 0) 47#define ZBIT16(x) (((x) & 0xffff) == 0) 48#define ZBIT32(x) (((x) & 0xffffffff) == 0) 49#define ZBIT64(x) (x == 0) 50/* Sign extension macros. */ 51#define EXTEND8H(a) ((uint16_t) (int8_t) (a)) 52#define EXTEND8(a) ((uint32_t) (int8_t) (a)) 53#define EXTEND16(a) ((uint32_t) (int16_t) (a)) 54#define EXTEND16S(a) ((int32_t) (int16_t) (a)) 55#define EXTEND32(a) ((uint64_t) (int32_t) (a)) 56 57uint64_t HELPER(iwmmxt_maddsq)(uint64_t a, uint64_t b) 58{ 59 a = (( 60 EXTEND16S((a >> 0) & 0xffff) * EXTEND16S((b >> 0) & 0xffff) + 61 EXTEND16S((a >> 16) & 0xffff) * EXTEND16S((b >> 16) & 0xffff) 62 ) & 0xffffffff) | ((uint64_t) ( 63 EXTEND16S((a >> 32) & 0xffff) * EXTEND16S((b >> 32) & 0xffff) + 64 EXTEND16S((a >> 48) & 0xffff) * EXTEND16S((b >> 48) & 0xffff) 65 ) << 32); 66 return a; 67} 68 69uint64_t HELPER(iwmmxt_madduq)(uint64_t a, uint64_t b) 70{ 71 a = (( 72 ((a >> 0) & 0xffff) * ((b >> 0) & 0xffff) + 73 ((a >> 16) & 0xffff) * ((b >> 16) & 0xffff) 74 ) & 0xffffffff) | (( 75 ((a >> 32) & 0xffff) * ((b >> 32) & 0xffff) + 76 ((a >> 48) & 0xffff) * ((b >> 48) & 0xffff) 77 ) << 32); 78 return a; 79} 80 81uint64_t HELPER(iwmmxt_sadb)(uint64_t a, uint64_t b) 82{ 83#define abs(x) (((x) >= 0) ? x : -x) 84#define SADB(SHR) abs((int) ((a >> SHR) & 0xff) - (int) ((b >> SHR) & 0xff)) 85 return 86 SADB(0) + SADB(8) + SADB(16) + SADB(24) + 87 SADB(32) + SADB(40) + SADB(48) + SADB(56); 88#undef SADB 89} 90 91uint64_t HELPER(iwmmxt_sadw)(uint64_t a, uint64_t b) 92{ 93#define SADW(SHR) \ 94 abs((int) ((a >> SHR) & 0xffff) - (int) ((b >> SHR) & 0xffff)) 95 return SADW(0) + SADW(16) + SADW(32) + SADW(48); 96#undef SADW 97} 98 99uint64_t HELPER(iwmmxt_mulslw)(uint64_t a, uint64_t b) 100{ 101#define MULS(SHR) ((uint64_t) ((( \ 102 EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \ 103 ) >> 0) & 0xffff) << SHR) 104 return MULS(0) | MULS(16) | MULS(32) | MULS(48); 105#undef MULS 106} 107 108uint64_t HELPER(iwmmxt_mulshw)(uint64_t a, uint64_t b) 109{ 110#define MULS(SHR) ((uint64_t) ((( \ 111 EXTEND16S((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff) \ 112 ) >> 16) & 0xffff) << SHR) 113 return MULS(0) | MULS(16) | MULS(32) | MULS(48); 114#undef MULS 115} 116 117uint64_t HELPER(iwmmxt_mululw)(uint64_t a, uint64_t b) 118{ 119#define MULU(SHR) ((uint64_t) ((( \ 120 ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \ 121 ) >> 0) & 0xffff) << SHR) 122 return MULU(0) | MULU(16) | MULU(32) | MULU(48); 123#undef MULU 124} 125 126uint64_t HELPER(iwmmxt_muluhw)(uint64_t a, uint64_t b) 127{ 128#define MULU(SHR) ((uint64_t) ((( \ 129 ((a >> SHR) & 0xffff) * ((b >> SHR) & 0xffff) \ 130 ) >> 16) & 0xffff) << SHR) 131 return MULU(0) | MULU(16) | MULU(32) | MULU(48); 132#undef MULU 133} 134 135uint64_t HELPER(iwmmxt_macsw)(uint64_t a, uint64_t b) 136{ 137#define MACS(SHR) ( \ 138 EXTEND16((a >> SHR) & 0xffff) * EXTEND16S((b >> SHR) & 0xffff)) 139 return (int64_t) (MACS(0) + MACS(16) + MACS(32) + MACS(48)); 140#undef MACS 141} 142 143uint64_t HELPER(iwmmxt_macuw)(uint64_t a, uint64_t b) 144{ 145#define MACU(SHR) ( \ 146 (uint32_t) ((a >> SHR) & 0xffff) * \ 147 (uint32_t) ((b >> SHR) & 0xffff)) 148 return MACU(0) + MACU(16) + MACU(32) + MACU(48); 149#undef MACU 150} 151 152#define NZBIT8(x, i) \ 153 SIMD8_SET(NBIT8((x) & 0xff), SIMD_NBIT, i) | \ 154 SIMD8_SET(ZBIT8((x) & 0xff), SIMD_ZBIT, i) 155#define NZBIT16(x, i) \ 156 SIMD16_SET(NBIT16((x) & 0xffff), SIMD_NBIT, i) | \ 157 SIMD16_SET(ZBIT16((x) & 0xffff), SIMD_ZBIT, i) 158#define NZBIT32(x, i) \ 159 SIMD32_SET(NBIT32((x) & 0xffffffff), SIMD_NBIT, i) | \ 160 SIMD32_SET(ZBIT32((x) & 0xffffffff), SIMD_ZBIT, i) 161#define NZBIT64(x) \ 162 SIMD64_SET(NBIT64(x), SIMD_NBIT) | \ 163 SIMD64_SET(ZBIT64(x), SIMD_ZBIT) 164#define IWMMXT_OP_UNPACK(S, SH0, SH1, SH2, SH3) \ 165uint64_t HELPER(glue(iwmmxt_unpack, glue(S, b)))(uint64_t a, uint64_t b) \ 166{ \ 167 a = \ 168 (((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \ 169 (((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \ 170 (((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \ 171 (((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \ 172 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 173 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \ 174 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \ 175 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \ 176 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \ 177 return a; \ 178} \ 179uint64_t HELPER(glue(iwmmxt_unpack, glue(S, w)))(uint64_t a, uint64_t b) \ 180{ \ 181 a = \ 182 (((a >> SH0) & 0xffff) << 0) | \ 183 (((b >> SH0) & 0xffff) << 16) | \ 184 (((a >> SH2) & 0xffff) << 32) | \ 185 (((b >> SH2) & 0xffff) << 48); \ 186 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 187 NZBIT8(a >> 0, 0) | NZBIT8(a >> 16, 1) | \ 188 NZBIT8(a >> 32, 2) | NZBIT8(a >> 48, 3); \ 189 return a; \ 190} \ 191uint64_t HELPER(glue(iwmmxt_unpack, glue(S, l)))(uint64_t a, uint64_t b) \ 192{ \ 193 a = \ 194 (((a >> SH0) & 0xffffffff) << 0) | \ 195 (((b >> SH0) & 0xffffffff) << 32); \ 196 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 197 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \ 198 return a; \ 199} \ 200uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ub)))(uint64_t x) \ 201{ \ 202 x = \ 203 (((x >> SH0) & 0xff) << 0) | \ 204 (((x >> SH1) & 0xff) << 16) | \ 205 (((x >> SH2) & 0xff) << 32) | \ 206 (((x >> SH3) & 0xff) << 48); \ 207 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 208 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \ 209 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \ 210 return x; \ 211} \ 212uint64_t HELPER(glue(iwmmxt_unpack, glue(S, uw)))(uint64_t x) \ 213{ \ 214 x = \ 215 (((x >> SH0) & 0xffff) << 0) | \ 216 (((x >> SH2) & 0xffff) << 32); \ 217 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 218 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \ 219 return x; \ 220} \ 221uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ul)))(uint64_t x) \ 222{ \ 223 x = (((x >> SH0) & 0xffffffff) << 0); \ 224 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \ 225 return x; \ 226} \ 227uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sb)))(uint64_t x) \ 228{ \ 229 x = \ 230 ((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \ 231 ((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \ 232 ((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \ 233 ((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \ 234 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 235 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \ 236 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \ 237 return x; \ 238} \ 239uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sw)))(uint64_t x) \ 240{ \ 241 x = \ 242 ((uint64_t) EXTEND16((x >> SH0) & 0xffff) << 0) | \ 243 ((uint64_t) EXTEND16((x >> SH2) & 0xffff) << 32); \ 244 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 245 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \ 246 return x; \ 247} \ 248uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sl)))(uint64_t x) \ 249{ \ 250 x = EXTEND32((x >> SH0) & 0xffffffff); \ 251 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \ 252 return x; \ 253} 254IWMMXT_OP_UNPACK(l, 0, 8, 16, 24) 255IWMMXT_OP_UNPACK(h, 32, 40, 48, 56) 256 257#define IWMMXT_OP_CMP(SUFF, Tb, Tw, Tl, O) \ 258uint64_t HELPER(glue(iwmmxt_, glue(SUFF, b)))(uint64_t a, uint64_t b) \ 259{ \ 260 a = \ 261 CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \ 262 CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \ 263 CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \ 264 CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \ 265 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 266 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \ 267 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \ 268 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \ 269 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \ 270 return a; \ 271} \ 272uint64_t HELPER(glue(iwmmxt_, glue(SUFF, w)))(uint64_t a, uint64_t b) \ 273{ \ 274 a = CMP(0, Tw, O, 0xffff) | CMP(16, Tw, O, 0xffff) | \ 275 CMP(32, Tw, O, 0xffff) | CMP(48, Tw, O, 0xffff); \ 276 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 277 NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | \ 278 NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); \ 279 return a; \ 280} \ 281uint64_t HELPER(glue(iwmmxt_, glue(SUFF, l)))(uint64_t a, uint64_t b) \ 282{ \ 283 a = CMP(0, Tl, O, 0xffffffff) | \ 284 CMP(32, Tl, O, 0xffffffff); \ 285 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 286 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \ 287 return a; \ 288} 289#define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \ 290 (TYPE) ((b >> SHR) & MASK)) ? (uint64_t) MASK : 0) << SHR) 291IWMMXT_OP_CMP(cmpeq, uint8_t, uint16_t, uint32_t, ==) 292IWMMXT_OP_CMP(cmpgts, int8_t, int16_t, int32_t, >) 293IWMMXT_OP_CMP(cmpgtu, uint8_t, uint16_t, uint32_t, >) 294#undef CMP 295#define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \ 296 (TYPE) ((b >> SHR) & MASK)) ? a : b) & ((uint64_t) MASK << SHR)) 297IWMMXT_OP_CMP(mins, int8_t, int16_t, int32_t, <) 298IWMMXT_OP_CMP(minu, uint8_t, uint16_t, uint32_t, <) 299IWMMXT_OP_CMP(maxs, int8_t, int16_t, int32_t, >) 300IWMMXT_OP_CMP(maxu, uint8_t, uint16_t, uint32_t, >) 301#undef CMP 302#define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \ 303 OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR) 304IWMMXT_OP_CMP(subn, uint8_t, uint16_t, uint32_t, -) 305IWMMXT_OP_CMP(addn, uint8_t, uint16_t, uint32_t, +) 306#undef CMP 307/* TODO Signed- and Unsigned-Saturation */ 308#define CMP(SHR, TYPE, OPER, MASK) ((uint64_t) (((TYPE) ((a >> SHR) & MASK) \ 309 OPER (TYPE) ((b >> SHR) & MASK)) & MASK) << SHR) 310IWMMXT_OP_CMP(subu, uint8_t, uint16_t, uint32_t, -) 311IWMMXT_OP_CMP(addu, uint8_t, uint16_t, uint32_t, +) 312IWMMXT_OP_CMP(subs, int8_t, int16_t, int32_t, -) 313IWMMXT_OP_CMP(adds, int8_t, int16_t, int32_t, +) 314#undef CMP 315#undef IWMMXT_OP_CMP 316 317#define AVGB(SHR) ((( \ 318 ((a >> SHR) & 0xff) + ((b >> SHR) & 0xff) + round) >> 1) << SHR) 319#define IWMMXT_OP_AVGB(r) \ 320uint64_t HELPER(iwmmxt_avgb##r)(uint64_t a, uint64_t b) \ 321{ \ 322 const int round = r; \ 323 a = AVGB(0) | AVGB(8) | AVGB(16) | AVGB(24) | \ 324 AVGB(32) | AVGB(40) | AVGB(48) | AVGB(56); \ 325 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 326 SIMD8_SET(ZBIT8((a >> 0) & 0xff), SIMD_ZBIT, 0) | \ 327 SIMD8_SET(ZBIT8((a >> 8) & 0xff), SIMD_ZBIT, 1) | \ 328 SIMD8_SET(ZBIT8((a >> 16) & 0xff), SIMD_ZBIT, 2) | \ 329 SIMD8_SET(ZBIT8((a >> 24) & 0xff), SIMD_ZBIT, 3) | \ 330 SIMD8_SET(ZBIT8((a >> 32) & 0xff), SIMD_ZBIT, 4) | \ 331 SIMD8_SET(ZBIT8((a >> 40) & 0xff), SIMD_ZBIT, 5) | \ 332 SIMD8_SET(ZBIT8((a >> 48) & 0xff), SIMD_ZBIT, 6) | \ 333 SIMD8_SET(ZBIT8((a >> 56) & 0xff), SIMD_ZBIT, 7); \ 334 return a; \ 335} 336IWMMXT_OP_AVGB(0) 337IWMMXT_OP_AVGB(1) 338#undef IWMMXT_OP_AVGB 339#undef AVGB 340 341#define AVGW(SHR) ((( \ 342 ((a >> SHR) & 0xffff) + ((b >> SHR) & 0xffff) + round) >> 1) << SHR) 343#define IWMMXT_OP_AVGW(r) \ 344uint64_t HELPER(iwmmxt_avgw##r)(uint64_t a, uint64_t b) \ 345{ \ 346 const int round = r; \ 347 a = AVGW(0) | AVGW(16) | AVGW(32) | AVGW(48); \ 348 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \ 349 SIMD16_SET(ZBIT16((a >> 0) & 0xffff), SIMD_ZBIT, 0) | \ 350 SIMD16_SET(ZBIT16((a >> 16) & 0xffff), SIMD_ZBIT, 1) | \ 351 SIMD16_SET(ZBIT16((a >> 32) & 0xffff), SIMD_ZBIT, 2) | \ 352 SIMD16_SET(ZBIT16((a >> 48) & 0xffff), SIMD_ZBIT, 3); \ 353 return a; \ 354} 355IWMMXT_OP_AVGW(0) 356IWMMXT_OP_AVGW(1) 357#undef IWMMXT_OP_AVGW 358#undef AVGW 359 360uint64_t HELPER(iwmmxt_msadb)(uint64_t a, uint64_t b) 361{ 362 a = ((((a >> 0 ) & 0xffff) * ((b >> 0) & 0xffff) + 363 ((a >> 16) & 0xffff) * ((b >> 16) & 0xffff)) & 0xffffffff) | 364 ((((a >> 32) & 0xffff) * ((b >> 32) & 0xffff) + 365 ((a >> 48) & 0xffff) * ((b >> 48) & 0xffff)) << 32); 366 return a; 367} 368 369uint64_t HELPER(iwmmxt_align)(uint64_t a, uint64_t b, uint32_t n) 370{ 371 a >>= n << 3; 372 a |= b << (64 - (n << 3)); 373 return a; 374} 375 376uint64_t HELPER(iwmmxt_insr)(uint64_t x, uint32_t a, uint32_t b, uint32_t n) 377{ 378 x &= ~((uint64_t) b << n); 379 x |= (uint64_t) (a & b) << n; 380 return x; 381} 382 383uint32_t HELPER(iwmmxt_setpsr_nz)(uint64_t x) 384{ 385 return SIMD64_SET((x == 0), SIMD_ZBIT) | 386 SIMD64_SET((x & (1ULL << 63)), SIMD_NBIT); 387} 388 389uint64_t HELPER(iwmmxt_bcstb)(uint32_t arg) 390{ 391 arg &= 0xff; 392 return 393 ((uint64_t) arg << 0 ) | ((uint64_t) arg << 8 ) | 394 ((uint64_t) arg << 16) | ((uint64_t) arg << 24) | 395 ((uint64_t) arg << 32) | ((uint64_t) arg << 40) | 396 ((uint64_t) arg << 48) | ((uint64_t) arg << 56); 397} 398 399uint64_t HELPER(iwmmxt_bcstw)(uint32_t arg) 400{ 401 arg &= 0xffff; 402 return 403 ((uint64_t) arg << 0 ) | ((uint64_t) arg << 16) | 404 ((uint64_t) arg << 32) | ((uint64_t) arg << 48); 405} 406 407uint64_t HELPER(iwmmxt_bcstl)(uint32_t arg) 408{ 409 return arg | ((uint64_t) arg << 32); 410} 411 412uint64_t HELPER(iwmmxt_addcb)(uint64_t x) 413{ 414 return 415 ((x >> 0) & 0xff) + ((x >> 8) & 0xff) + 416 ((x >> 16) & 0xff) + ((x >> 24) & 0xff) + 417 ((x >> 32) & 0xff) + ((x >> 40) & 0xff) + 418 ((x >> 48) & 0xff) + ((x >> 56) & 0xff); 419} 420 421uint64_t HELPER(iwmmxt_addcw)(uint64_t x) 422{ 423 return 424 ((x >> 0) & 0xffff) + ((x >> 16) & 0xffff) + 425 ((x >> 32) & 0xffff) + ((x >> 48) & 0xffff); 426} 427 428uint64_t HELPER(iwmmxt_addcl)(uint64_t x) 429{ 430 return (x & 0xffffffff) + (x >> 32); 431} 432 433uint32_t HELPER(iwmmxt_msbb)(uint64_t x) 434{ 435 return 436 ((x >> 7) & 0x01) | ((x >> 14) & 0x02) | 437 ((x >> 21) & 0x04) | ((x >> 28) & 0x08) | 438 ((x >> 35) & 0x10) | ((x >> 42) & 0x20) | 439 ((x >> 49) & 0x40) | ((x >> 56) & 0x80); 440} 441 442uint32_t HELPER(iwmmxt_msbw)(uint64_t x) 443{ 444 return 445 ((x >> 15) & 0x01) | ((x >> 30) & 0x02) | 446 ((x >> 45) & 0x04) | ((x >> 52) & 0x08); 447} 448 449uint32_t HELPER(iwmmxt_msbl)(uint64_t x) 450{ 451 return ((x >> 31) & 0x01) | ((x >> 62) & 0x02); 452} 453 454/* FIXME: Split wCASF setting into a separate op to avoid env use. */ 455uint64_t HELPER(iwmmxt_srlw)(uint64_t x, uint32_t n) 456{ 457 x = (((x & (0xffffll << 0)) >> n) & (0xffffll << 0)) | 458 (((x & (0xffffll << 16)) >> n) & (0xffffll << 16)) | 459 (((x & (0xffffll << 32)) >> n) & (0xffffll << 32)) | 460 (((x & (0xffffll << 48)) >> n) & (0xffffll << 48)); 461 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 462 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | 463 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); 464 return x; 465} 466 467uint64_t HELPER(iwmmxt_srll)(uint64_t x, uint32_t n) 468{ 469 x = ((x & (0xffffffffll << 0)) >> n) | 470 ((x >> n) & (0xffffffffll << 32)); 471 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 472 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); 473 return x; 474} 475 476uint64_t HELPER(iwmmxt_srlq)(uint64_t x, uint32_t n) 477{ 478 x >>= n; 479 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x); 480 return x; 481} 482 483uint64_t HELPER(iwmmxt_sllw)(uint64_t x, uint32_t n) 484{ 485 x = (((x & (0xffffll << 0)) << n) & (0xffffll << 0)) | 486 (((x & (0xffffll << 16)) << n) & (0xffffll << 16)) | 487 (((x & (0xffffll << 32)) << n) & (0xffffll << 32)) | 488 (((x & (0xffffll << 48)) << n) & (0xffffll << 48)); 489 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 490 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | 491 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); 492 return x; 493} 494 495uint64_t HELPER(iwmmxt_slll)(uint64_t x, uint32_t n) 496{ 497 x = ((x << n) & (0xffffffffll << 0)) | 498 ((x & (0xffffffffll << 32)) << n); 499 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 500 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); 501 return x; 502} 503 504uint64_t HELPER(iwmmxt_sllq)(uint64_t x, uint32_t n) 505{ 506 x <<= n; 507 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x); 508 return x; 509} 510 511uint64_t HELPER(iwmmxt_sraw)(uint64_t x, uint32_t n) 512{ 513 x = ((uint64_t) ((EXTEND16(x >> 0) >> n) & 0xffff) << 0) | 514 ((uint64_t) ((EXTEND16(x >> 16) >> n) & 0xffff) << 16) | 515 ((uint64_t) ((EXTEND16(x >> 32) >> n) & 0xffff) << 32) | 516 ((uint64_t) ((EXTEND16(x >> 48) >> n) & 0xffff) << 48); 517 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 518 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | 519 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); 520 return x; 521} 522 523uint64_t HELPER(iwmmxt_sral)(uint64_t x, uint32_t n) 524{ 525 x = (((EXTEND32(x >> 0) >> n) & 0xffffffff) << 0) | 526 (((EXTEND32(x >> 32) >> n) & 0xffffffff) << 32); 527 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 528 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); 529 return x; 530} 531 532uint64_t HELPER(iwmmxt_sraq)(uint64_t x, uint32_t n) 533{ 534 x = (int64_t) x >> n; 535 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x); 536 return x; 537} 538 539uint64_t HELPER(iwmmxt_rorw)(uint64_t x, uint32_t n) 540{ 541 x = ((((x & (0xffffll << 0)) >> n) | 542 ((x & (0xffffll << 0)) << (16 - n))) & (0xffffll << 0)) | 543 ((((x & (0xffffll << 16)) >> n) | 544 ((x & (0xffffll << 16)) << (16 - n))) & (0xffffll << 16)) | 545 ((((x & (0xffffll << 32)) >> n) | 546 ((x & (0xffffll << 32)) << (16 - n))) & (0xffffll << 32)) | 547 ((((x & (0xffffll << 48)) >> n) | 548 ((x & (0xffffll << 48)) << (16 - n))) & (0xffffll << 48)); 549 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 550 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | 551 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); 552 return x; 553} 554 555uint64_t HELPER(iwmmxt_rorl)(uint64_t x, uint32_t n) 556{ 557 x = ((x & (0xffffffffll << 0)) >> n) | 558 ((x >> n) & (0xffffffffll << 32)) | 559 ((x << (32 - n)) & (0xffffffffll << 0)) | 560 ((x & (0xffffffffll << 32)) << (32 - n)); 561 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 562 NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); 563 return x; 564} 565 566uint64_t HELPER(iwmmxt_rorq)(uint64_t x, uint32_t n) 567{ 568 x = (x >> n) | (x << (64 - n)); 569 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x); 570 return x; 571} 572 573uint64_t HELPER(iwmmxt_shufh)(uint64_t x, uint32_t n) 574{ 575 x = (((x >> ((n << 4) & 0x30)) & 0xffff) << 0) | 576 (((x >> ((n << 2) & 0x30)) & 0xffff) << 16) | 577 (((x >> ((n << 0) & 0x30)) & 0xffff) << 32) | 578 (((x >> ((n >> 2) & 0x30)) & 0xffff) << 48); 579 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 580 NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | 581 NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); 582 return x; 583} 584 585/* TODO: Unsigned-Saturation */ 586uint64_t HELPER(iwmmxt_packuw)(uint64_t a, uint64_t b) 587{ 588 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) | 589 (((a >> 32) & 0xff) << 16) | (((a >> 48) & 0xff) << 24) | 590 (((b >> 0) & 0xff) << 32) | (((b >> 16) & 0xff) << 40) | 591 (((b >> 32) & 0xff) << 48) | (((b >> 48) & 0xff) << 56); 592 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 593 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | 594 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | 595 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | 596 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); 597 return a; 598} 599 600uint64_t HELPER(iwmmxt_packul)(uint64_t a, uint64_t b) 601{ 602 a = (((a >> 0) & 0xffff) << 0) | (((a >> 32) & 0xffff) << 16) | 603 (((b >> 0) & 0xffff) << 32) | (((b >> 32) & 0xffff) << 48); 604 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 605 NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | 606 NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); 607 return a; 608} 609 610uint64_t HELPER(iwmmxt_packuq)(uint64_t a, uint64_t b) 611{ 612 a = (a & 0xffffffff) | ((b & 0xffffffff) << 32); 613 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 614 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); 615 return a; 616} 617 618/* TODO: Signed-Saturation */ 619uint64_t HELPER(iwmmxt_packsw)(uint64_t a, uint64_t b) 620{ 621 a = (((a >> 0) & 0xff) << 0) | (((a >> 16) & 0xff) << 8) | 622 (((a >> 32) & 0xff) << 16) | (((a >> 48) & 0xff) << 24) | 623 (((b >> 0) & 0xff) << 32) | (((b >> 16) & 0xff) << 40) | 624 (((b >> 32) & 0xff) << 48) | (((b >> 48) & 0xff) << 56); 625 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 626 NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | 627 NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | 628 NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | 629 NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); 630 return a; 631} 632 633uint64_t HELPER(iwmmxt_packsl)(uint64_t a, uint64_t b) 634{ 635 a = (((a >> 0) & 0xffff) << 0) | (((a >> 32) & 0xffff) << 16) | 636 (((b >> 0) & 0xffff) << 32) | (((b >> 32) & 0xffff) << 48); 637 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 638 NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | 639 NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); 640 return a; 641} 642 643uint64_t HELPER(iwmmxt_packsq)(uint64_t a, uint64_t b) 644{ 645 a = (a & 0xffffffff) | ((b & 0xffffffff) << 32); 646 env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = 647 NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); 648 return a; 649} 650 651uint64_t HELPER(iwmmxt_muladdsl)(uint64_t c, uint32_t a, uint32_t b) 652{ 653 return c + ((int32_t) EXTEND32(a) * (int32_t) EXTEND32(b)); 654} 655 656uint64_t HELPER(iwmmxt_muladdsw)(uint64_t c, uint32_t a, uint32_t b) 657{ 658 c += EXTEND32(EXTEND16S((a >> 0) & 0xffff) * 659 EXTEND16S((b >> 0) & 0xffff)); 660 c += EXTEND32(EXTEND16S((a >> 16) & 0xffff) * 661 EXTEND16S((b >> 16) & 0xffff)); 662 return c; 663} 664 665uint64_t HELPER(iwmmxt_muladdswl)(uint64_t c, uint32_t a, uint32_t b) 666{ 667 return c + (EXTEND32(EXTEND16S(a & 0xffff) * 668 EXTEND16S(b & 0xffff))); 669} 670