msm_mdp.h revision 3d163e306eece14820da529b2d9e98f8d6b269ea
1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _MSM_MDP_H_
20#define _MSM_MDP_H_
21#include <linux/types.h>
22#include <linux/fb.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define MSMFB_IOCTL_MAGIC 'm'
25#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
26#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
27#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
30#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
31#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
32#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
35#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
36#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135,   struct mdp_overlay)
37#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137,   struct msmfb_overlay_data)
40#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
41#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138,   struct mdp_page_protection)
42#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139,   struct mdp_page_protection)
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140,   struct mdp_overlay)
45#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
46#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142,   struct msmfb_overlay_blt)
47#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144,   struct mdp_histogram_start_req)
50#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
51#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
52#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147,   struct msmfb_overlay_3d)
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148,   struct msmfb_mixer_info_req)
55#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149,   struct msmfb_overlay_data)
56#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
57#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
60#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153,   struct msmfb_data)
61#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154,   struct msmfb_data)
62#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
65#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
66#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
67#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
70#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164,   struct mdp_display_commit)
71#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
72#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167,   unsigned int)
75#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
76#define FB_TYPE_3D_PANEL 0x10101010
77#define MDP_IMGTYPE2_START 0x10000
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79#define MSMFB_DRIVER_VERSION 0xF9E8D701
80enum {
81 NOTIFY_UPDATE_START,
82 NOTIFY_UPDATE_STOP,
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84 NOTIFY_UPDATE_POWER_OFF,
85};
86enum {
87 NOTIFY_TYPE_NO_UPDATE,
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89 NOTIFY_TYPE_SUSPEND,
90 NOTIFY_TYPE_UPDATE,
91};
92enum {
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94 MDP_RGB_565,
95 MDP_XRGB_8888,
96 MDP_Y_CBCR_H2V2,
97 MDP_Y_CBCR_H2V2_ADRENO,
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99 MDP_ARGB_8888,
100 MDP_RGB_888,
101 MDP_Y_CRCB_H2V2,
102 MDP_YCRYCB_H2V1,
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104 MDP_CBYCRY_H2V1,
105 MDP_Y_CRCB_H2V1,
106 MDP_Y_CBCR_H2V1,
107 MDP_Y_CRCB_H1V2,
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109 MDP_Y_CBCR_H1V2,
110 MDP_RGBA_8888,
111 MDP_BGRA_8888,
112 MDP_RGBX_8888,
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114 MDP_Y_CRCB_H2V2_TILE,
115 MDP_Y_CBCR_H2V2_TILE,
116 MDP_Y_CR_CB_H2V2,
117 MDP_Y_CR_CB_GH2V2,
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119 MDP_Y_CB_CR_H2V2,
120 MDP_Y_CRCB_H1V1,
121 MDP_Y_CBCR_H1V1,
122 MDP_YCRCB_H1V1,
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124 MDP_YCBCR_H1V1,
125 MDP_BGR_565,
126 MDP_BGR_888,
127 MDP_Y_CBCR_H2V2_VENUS,
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 MDP_BGRX_8888,
130 MDP_IMGTYPE_LIMIT,
131 MDP_RGB_BORDERFILL,
132 MDP_FB_FORMAT = MDP_IMGTYPE2_START,
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 MDP_IMGTYPE_LIMIT2
135};
136enum {
137 PMEM_IMG,
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 FB_IMG,
140};
141enum {
142 HSIC_HUE = 0,
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 HSIC_SAT,
145 HSIC_INT,
146 HSIC_CON,
147 NUM_HSIC_PARAM,
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149};
150#define MDSS_MDP_ROT_ONLY 0x80
151#define MDSS_MDP_RIGHT_MIXER 0x100
152#define MDP_ROT_NOP 0
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define MDP_FLIP_LR 0x1
155#define MDP_FLIP_UD 0x2
156#define MDP_ROT_90 0x4
157#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
160#define MDP_DITHER 0x8
161#define MDP_BLUR 0x10
162#define MDP_BLEND_FG_PREMULT 0x20000
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164#define MDP_IS_FG 0x40000
165#define MDP_DEINTERLACE 0x80000000
166#define MDP_SHARPENING 0x40000000
167#define MDP_NO_DMA_BARRIER_START 0x20000000
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169#define MDP_NO_DMA_BARRIER_END 0x10000000
170#define MDP_NO_BLIT 0x08000000
171#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
172#define MDP_BLIT_WITH_NO_DMA_BARRIERS   (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174#define MDP_BLIT_SRC_GEM 0x04000000
175#define MDP_BLIT_DST_GEM 0x02000000
176#define MDP_BLIT_NON_CACHED 0x01000000
177#define MDP_OV_PIPE_SHARE 0x00800000
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179#define MDP_DEINTERLACE_ODD 0x00400000
180#define MDP_OV_PLAY_NOWAIT 0x00200000
181#define MDP_SOURCE_ROTATED_90 0x00100000
182#define MDP_OVERLAY_PP_CFG_EN 0x00080000
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184#define MDP_BACKEND_COMPOSITION 0x00040000
185#define MDP_BORDERFILL_SUPPORTED 0x00010000
186#define MDP_SECURE_OVERLAY_SESSION 0x00008000
187#define MDP_OV_PIPE_FORCE_DMA 0x00004000
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189#define MDP_MEMORY_ID_TYPE_FB 0x00001000
190#define MDP_BWC_EN 0x00000400
191#define MDP_DECIMATION_EN 0x00000800
192#define MDP_TRANSP_NOP 0xffffffff
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194#define MDP_ALPHA_NOP 0xff
195#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
196#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
197#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
200#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
201#define MDP_FB_PAGE_PROTECTION_INVALID (5)
202#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204struct mdp_rect {
205 uint32_t x;
206 uint32_t y;
207 uint32_t w;
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209 uint32_t h;
210};
211struct mdp_img {
212 uint32_t width;
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214 uint32_t height;
215 uint32_t format;
216 uint32_t offset;
217 int memory_id;
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219 uint32_t priv;
220};
221#define MDP_CCS_RGB2YUV 0
222#define MDP_CCS_YUV2RGB 1
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224#define MDP_CCS_SIZE 9
225#define MDP_BV_SIZE 3
226struct mdp_ccs {
227 int direction;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229 uint16_t ccs[MDP_CCS_SIZE];
230 uint16_t bv[MDP_BV_SIZE];
231};
232struct mdp_csc {
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 int id;
235 uint32_t csc_mv[9];
236 uint32_t csc_pre_bv[3];
237 uint32_t csc_post_bv[3];
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239 uint32_t csc_pre_lv[6];
240 uint32_t csc_post_lv[6];
241};
242#define MDP_BLIT_REQ_VERSION 2
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244struct mdp_blit_req {
245 struct mdp_img src;
246 struct mdp_img dst;
247 struct mdp_rect src_rect;
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249 struct mdp_rect dst_rect;
250 uint32_t alpha;
251 uint32_t transp_mask;
252 uint32_t flags;
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 int sharpening_strength;
255};
256struct mdp_blit_req_list {
257 uint32_t count;
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 struct mdp_blit_req req[];
260};
261#define MSMFB_DATA_VERSION 2
262struct msmfb_data {
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 uint32_t offset;
265 int memory_id;
266 int id;
267 uint32_t flags;
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269 uint32_t priv;
270 uint32_t iova;
271};
272#define MSMFB_NEW_REQUEST -1
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274struct msmfb_overlay_data {
275 uint32_t id;
276 struct msmfb_data data;
277 uint32_t version_key;
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279 struct msmfb_data plane1_data;
280 struct msmfb_data plane2_data;
281 struct msmfb_data dst_data;
282};
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284struct msmfb_img {
285 uint32_t width;
286 uint32_t height;
287 uint32_t format;
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289};
290#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
291struct msmfb_writeback_data {
292 struct msmfb_data buf_info;
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 struct msmfb_img img;
295};
296#define MDP_PP_OPS_ENABLE 0x1
297#define MDP_PP_OPS_READ 0x2
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299#define MDP_PP_OPS_WRITE 0x4
300#define MDP_PP_OPS_DISABLE 0x8
301#define MDP_PP_IGC_FLAG_ROM0 0x10
302#define MDP_PP_IGC_FLAG_ROM1 0x20
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304#define MDSS_PP_DSPP_CFG 0x000
305#define MDSS_PP_SSPP_CFG 0x100
306#define MDSS_PP_LM_CFG 0x200
307#define MDSS_PP_WB_CFG 0x300
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309#define MDSS_PP_ARG_MASK 0x3C00
310#define MDSS_PP_ARG_NUM 4
311#define MDSS_PP_ARG_SHIFT 10
312#define MDSS_PP_LOCATION_MASK 0x0300
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314#define MDSS_PP_LOGICAL_MASK 0x00FF
315#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
316#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
317#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
320struct mdp_qseed_cfg {
321 uint32_t table_num;
322 uint32_t ops;
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324 uint32_t len;
325 uint32_t *data;
326};
327struct mdp_sharp_cfg {
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 uint32_t flags;
330 uint32_t strength;
331 uint32_t edge_thr;
332 uint32_t smooth_thr;
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 uint32_t noise_thr;
335};
336struct mdp_qseed_cfg_data {
337 uint32_t block;
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339 struct mdp_qseed_cfg qseed_data;
340};
341#define MDP_OVERLAY_PP_CSC_CFG 0x1
342#define MDP_OVERLAY_PP_QSEED_CFG 0x2
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344#define MDP_OVERLAY_PP_PA_CFG 0x4
345#define MDP_OVERLAY_PP_IGC_CFG 0x8
346#define MDP_OVERLAY_PP_SHARP_CFG 0x10
347#define MDP_OVERLAY_PP_HIST_CFG 0x20
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
350#define MDP_CSC_FLAG_ENABLE 0x1
351#define MDP_CSC_FLAG_YUV_IN 0x2
352#define MDP_CSC_FLAG_YUV_OUT 0x4
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354struct mdp_csc_cfg {
355 uint32_t flags;
356 uint32_t csc_mv[9];
357 uint32_t csc_pre_bv[3];
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359 uint32_t csc_post_bv[3];
360 uint32_t csc_pre_lv[6];
361 uint32_t csc_post_lv[6];
362};
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364struct mdp_csc_cfg_data {
365 uint32_t block;
366 struct mdp_csc_cfg csc_data;
367};
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369struct mdp_pa_cfg {
370 uint32_t flags;
371 uint32_t hue_adj;
372 uint32_t sat_adj;
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374 uint32_t val_adj;
375 uint32_t cont_adj;
376};
377struct mdp_igc_lut_data {
378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379 uint32_t block;
380 uint32_t len, ops;
381 uint32_t *c0_c1_data;
382 uint32_t *c2_data;
383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384};
385struct mdp_histogram_cfg {
386 uint32_t ops;
387 uint32_t block;
388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389 uint8_t frame_cnt;
390 uint8_t bit_mask;
391 uint16_t num_bins;
392};
393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394struct mdp_hist_lut_data {
395 uint32_t block;
396 uint32_t ops;
397 uint32_t len;
398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399 uint32_t *data;
400};
401struct mdp_overlay_pp_params {
402 uint32_t config_ops;
403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404 struct mdp_csc_cfg csc_cfg;
405 struct mdp_qseed_cfg qseed_cfg[2];
406 struct mdp_pa_cfg pa_cfg;
407 struct mdp_igc_lut_data igc_cfg;
408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409 struct mdp_sharp_cfg sharp_cfg;
410 struct mdp_histogram_cfg hist_cfg;
411 struct mdp_hist_lut_data hist_lut_cfg;
412};
413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414enum mdss_mdp_blend_op {
415 BLEND_OP_NOT_DEFINED = 0,
416 BLEND_OP_OPAQUE,
417 BLEND_OP_PREMULTIPLIED,
418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419 BLEND_OP_COVERAGE,
420 BLEND_OP_MAX,
421};
422struct mdp_overlay {
423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424 struct msmfb_img src;
425 struct mdp_rect src_rect;
426 struct mdp_rect dst_rect;
427 uint32_t z_order;
428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429 uint32_t is_fg;
430 uint32_t alpha;
431 uint32_t blend_op;
432 uint32_t transp_mask;
433/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434 uint32_t flags;
435 uint32_t id;
436 uint32_t user_data[7];
437 uint8_t horz_deci;
438/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
439 uint8_t vert_deci;
440 struct mdp_overlay_pp_params overlay_pp_cfg;
441};
442struct msmfb_overlay_3d {
443/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
444 uint32_t is_3d;
445 uint32_t width;
446 uint32_t height;
447};
448/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
449struct msmfb_overlay_blt {
450 uint32_t enable;
451 uint32_t offset;
452 uint32_t width;
453/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
454 uint32_t height;
455 uint32_t bpp;
456};
457struct mdp_histogram {
458/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
459 uint32_t frame_cnt;
460 uint32_t bin_cnt;
461 uint32_t *r;
462 uint32_t *g;
463/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
464 uint32_t *b;
465};
466enum {
467 DISPLAY_MISR_EDP,
468/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
469 DISPLAY_MISR_DSI0,
470 DISPLAY_MISR_DSI1,
471 DISPLAY_MISR_HDMI,
472 DISPLAY_MISR_LCDC,
473/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
474 DISPLAY_MISR_ATV,
475 DISPLAY_MISR_DSI_CMD,
476 DISPLAY_MISR_MAX
477};
478/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
479enum {
480 MISR_OP_NONE,
481 MISR_OP_SFM,
482 MISR_OP_MFM,
483/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
484 MISR_OP_BM,
485 MISR_OP_MAX
486};
487struct mdp_misr {
488/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
489 uint32_t block_id;
490 uint32_t frame_count;
491 uint32_t crc_op_mode;
492 uint32_t crc_value[32];
493/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
494};
495enum {
496 MDP_BLOCK_RESERVED = 0,
497 MDP_BLOCK_OVERLAY_0,
498/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
499 MDP_BLOCK_OVERLAY_1,
500 MDP_BLOCK_VG_1,
501 MDP_BLOCK_VG_2,
502 MDP_BLOCK_RGB_1,
503/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
504 MDP_BLOCK_RGB_2,
505 MDP_BLOCK_DMA_P,
506 MDP_BLOCK_DMA_S,
507 MDP_BLOCK_DMA_E,
508/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
509 MDP_BLOCK_OVERLAY_2,
510 MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
511 MDP_LOGICAL_BLOCK_DISP_1,
512 MDP_LOGICAL_BLOCK_DISP_2,
513/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
514 MDP_BLOCK_MAX,
515};
516struct mdp_histogram_start_req {
517 uint32_t block;
518/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
519 uint8_t frame_cnt;
520 uint8_t bit_mask;
521 uint16_t num_bins;
522};
523/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
524struct mdp_histogram_data {
525 uint32_t block;
526 uint32_t bin_cnt;
527 uint32_t *c0;
528/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
529 uint32_t *c1;
530 uint32_t *c2;
531 uint32_t *extra_info;
532};
533/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
534struct mdp_pcc_coeff {
535 uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
536};
537struct mdp_pcc_cfg_data {
538/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
539 uint32_t block;
540 uint32_t ops;
541 struct mdp_pcc_coeff r, g, b;
542};
543/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
544#define MDP_GAMUT_TABLE_NUM 8
545enum {
546 mdp_lut_igc,
547 mdp_lut_pgc,
548/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
549 mdp_lut_hist,
550 mdp_lut_max,
551};
552struct mdp_ar_gc_lut_data {
553/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
554 uint32_t x_start;
555 uint32_t slope;
556 uint32_t offset;
557};
558/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
559struct mdp_pgc_lut_data {
560 uint32_t block;
561 uint32_t flags;
562 uint8_t num_r_stages;
563/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
564 uint8_t num_g_stages;
565 uint8_t num_b_stages;
566 struct mdp_ar_gc_lut_data *r_data;
567 struct mdp_ar_gc_lut_data *g_data;
568/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
569 struct mdp_ar_gc_lut_data *b_data;
570};
571struct mdp_lut_cfg_data {
572 uint32_t lut_type;
573/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
574 union {
575 struct mdp_igc_lut_data igc_lut_data;
576 struct mdp_pgc_lut_data pgc_lut_data;
577 struct mdp_hist_lut_data hist_lut_data;
578/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
579 } data;
580};
581struct mdp_bl_scale_data {
582 uint32_t min_lvl;
583/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
584 uint32_t scale;
585};
586struct mdp_pa_cfg_data {
587 uint32_t block;
588/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
589 struct mdp_pa_cfg pa_data;
590};
591struct mdp_dither_cfg_data {
592 uint32_t block;
593/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
594 uint32_t flags;
595 uint32_t g_y_depth;
596 uint32_t r_cr_depth;
597 uint32_t b_cb_depth;
598/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
599};
600struct mdp_gamut_cfg_data {
601 uint32_t block;
602 uint32_t flags;
603/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
604 uint32_t gamut_first;
605 uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
606 uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
607 uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
608/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
609 uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
610};
611struct mdp_calib_config_data {
612 uint32_t ops;
613/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
614 uint32_t addr;
615 uint32_t data;
616};
617struct mdp_calib_config_buffer {
618/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
619 uint32_t ops;
620 uint32_t size;
621 uint32_t *buffer;
622};
623/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
624struct mdp_calib_dcm_state {
625 uint32_t ops;
626 uint32_t dcm_state;
627};
628/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
629enum {
630 DCM_UNINIT,
631 DCM_UNBLANK,
632 DCM_ENTER,
633/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
634 DCM_EXIT,
635 DCM_BLANK,
636};
637#define MDSS_MAX_BL_BRIGHTNESS 255
638/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
639#define AD_BL_LIN_LEN (MDSS_MAX_BL_BRIGHTNESS + 1)
640#define MDSS_AD_MODE_AUTO_BL 0x0
641#define MDSS_AD_MODE_AUTO_STR 0x1
642#define MDSS_AD_MODE_TARG_STR 0x3
643/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
644#define MDSS_AD_MODE_MAN_STR 0x7
645#define MDSS_AD_MODE_CALIB 0xF
646#define MDP_PP_AD_INIT 0x10
647#define MDP_PP_AD_CFG 0x20
648/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
649struct mdss_ad_init {
650 uint32_t asym_lut[33];
651 uint32_t color_corr_lut[33];
652 uint8_t i_control[2];
653/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
654 uint16_t black_lvl;
655 uint16_t white_lvl;
656 uint8_t var;
657 uint8_t limit_ampl;
658/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
659 uint8_t i_dither;
660 uint8_t slope_max;
661 uint8_t slope_min;
662 uint8_t dither_ctl;
663/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
664 uint8_t format;
665 uint8_t auto_size;
666 uint16_t frame_w;
667 uint16_t frame_h;
668/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
669 uint8_t logo_v;
670 uint8_t logo_h;
671 uint32_t bl_lin_len;
672 uint32_t *bl_lin;
673/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
674 uint32_t *bl_lin_inv;
675};
676#define MDSS_AD_BL_CTRL_MODE_EN 1
677#define MDSS_AD_BL_CTRL_MODE_DIS 0
678/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
679struct mdss_ad_cfg {
680 uint32_t mode;
681 uint32_t al_calib_lut[33];
682 uint16_t backlight_min;
683/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
684 uint16_t backlight_max;
685 uint16_t backlight_scale;
686 uint16_t amb_light_min;
687 uint16_t filter[2];
688/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
689 uint16_t calib[4];
690 uint8_t strength_limit;
691 uint8_t t_filter_recursion;
692 uint16_t stab_itr;
693/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
694 uint32_t bl_ctrl_mode;
695};
696struct mdss_ad_init_cfg {
697 uint32_t ops;
698/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
699 union {
700 struct mdss_ad_init init;
701 struct mdss_ad_cfg cfg;
702 } params;
703/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
704};
705struct mdss_ad_input {
706 uint32_t mode;
707 union {
708/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
709 uint32_t amb_light;
710 uint32_t strength;
711 uint32_t calib_bl;
712 } in;
713/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
714 uint32_t output;
715};
716#define MDSS_CALIB_MODE_BL 0x1
717struct mdss_calib_cfg {
718/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
719 uint32_t ops;
720 uint32_t calib_mask;
721};
722enum {
723/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
724 mdp_op_pcc_cfg,
725 mdp_op_csc_cfg,
726 mdp_op_lut_cfg,
727 mdp_op_qseed_cfg,
728/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
729 mdp_bl_scale_cfg,
730 mdp_op_pa_cfg,
731 mdp_op_dither_cfg,
732 mdp_op_gamut_cfg,
733/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
734 mdp_op_calib_cfg,
735 mdp_op_ad_cfg,
736 mdp_op_ad_input,
737 mdp_op_calib_mode,
738/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
739 mdp_op_calib_buffer,
740 mdp_op_calib_dcm_state,
741 mdp_op_max,
742};
743/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
744enum {
745 WB_FORMAT_NV12,
746 WB_FORMAT_RGB_565,
747 WB_FORMAT_RGB_888,
748/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
749 WB_FORMAT_xRGB_8888,
750 WB_FORMAT_ARGB_8888,
751 WB_FORMAT_BGRA_8888,
752 WB_FORMAT_BGRX_8888,
753/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
754 WB_FORMAT_ARGB_8888_INPUT_ALPHA
755};
756struct msmfb_mdp_pp {
757 uint32_t op;
758/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
759 union {
760 struct mdp_pcc_cfg_data pcc_cfg_data;
761 struct mdp_csc_cfg_data csc_cfg_data;
762 struct mdp_lut_cfg_data lut_cfg_data;
763/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
764 struct mdp_qseed_cfg_data qseed_cfg_data;
765 struct mdp_bl_scale_data bl_scale_data;
766 struct mdp_pa_cfg_data pa_cfg_data;
767 struct mdp_dither_cfg_data dither_cfg_data;
768/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
769 struct mdp_gamut_cfg_data gamut_cfg_data;
770 struct mdp_calib_config_data calib_cfg;
771 struct mdss_ad_init_cfg ad_init_cfg;
772 struct mdss_calib_cfg mdss_calib_cfg;
773/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
774 struct mdss_ad_input ad_input;
775 struct mdp_calib_config_buffer calib_buffer;
776 struct mdp_calib_dcm_state calib_dcm;
777 } data;
778/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
779};
780#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
781enum {
782 metadata_op_none,
783/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
784 metadata_op_base_blend,
785 metadata_op_frame_rate,
786 metadata_op_vic,
787 metadata_op_wb_format,
788/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
789 metadata_op_get_caps,
790 metadata_op_crc,
791 metadata_op_max
792};
793/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
794struct mdp_blend_cfg {
795 uint32_t is_premultiplied;
796};
797struct mdp_mixer_cfg {
798/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
799 uint32_t writeback_format;
800 uint32_t alpha;
801};
802struct mdss_hw_caps {
803/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
804 uint32_t mdp_rev;
805 uint8_t rgb_pipes;
806 uint8_t vig_pipes;
807 uint8_t dma_pipes;
808/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
809 uint32_t features;
810};
811struct msmfb_metadata {
812 uint32_t op;
813/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
814 uint32_t flags;
815 union {
816 struct mdp_misr misr_request;
817 struct mdp_blend_cfg blend_cfg;
818/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
819 struct mdp_mixer_cfg mixer_cfg;
820 uint32_t panel_frame_rate;
821 uint32_t video_info_code;
822 struct mdss_hw_caps caps;
823/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
824 } data;
825};
826#define MDP_MAX_FENCE_FD 32
827#define MDP_BUF_SYNC_FLAG_WAIT 1
828/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
829struct mdp_buf_sync {
830 uint32_t flags;
831 uint32_t acq_fen_fd_cnt;
832 int *acq_fen_fd;
833/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
834 int *rel_fen_fd;
835};
836struct mdp_async_blit_req_list {
837 struct mdp_buf_sync sync;
838/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
839 uint32_t count;
840 struct mdp_blit_req req[];
841};
842#define MDP_DISPLAY_COMMIT_OVERLAY 1
843/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
844struct mdp_buf_fence {
845 uint32_t flags;
846 uint32_t acq_fen_fd_cnt;
847 int acq_fen_fd[MDP_MAX_FENCE_FD];
848/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
849 int rel_fen_fd[MDP_MAX_FENCE_FD];
850};
851struct mdp_display_commit {
852 uint32_t flags;
853/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
854 uint32_t wait_for_finish;
855 struct fb_var_screeninfo var;
856 struct mdp_buf_fence buf_fence;
857};
858/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
859struct mdp_page_protection {
860 uint32_t page_protection;
861};
862struct mdp_mixer_info {
863/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
864 int pndx;
865 int pnum;
866 int ptype;
867 int mixer_num;
868/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
869 int z_order;
870};
871#define MAX_PIPE_PER_MIXER 4
872struct msmfb_mixer_info_req {
873/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
874 int mixer_num;
875 int cnt;
876 struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
877};
878/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
879enum {
880 DISPLAY_SUBSYSTEM_ID,
881 ROTATOR_SUBSYSTEM_ID,
882};
883/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
884enum {
885 MDP_IOMMU_DOMAIN_CP,
886 MDP_IOMMU_DOMAIN_NS,
887};
888/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
889enum {
890 MDP_WRITEBACK_MIRROR_OFF,
891 MDP_WRITEBACK_MIRROR_ON,
892 MDP_WRITEBACK_MIRROR_PAUSE,
893/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
894 MDP_WRITEBACK_MIRROR_RESUME,
895};
896#endif
897