endian.h revision 3123853ede6209e485fb7110bdcd38aea0f33d23
13123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */ 23123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 33123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh/* 43123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) 53123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * 63123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * Redistribution and use in source and binary forms, with or without 73123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * modification, are permitted provided that the following conditions 83123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * are met: 93123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * 1. Redistributions of source code must retain the above copyright 103123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * notice, this list of conditions and the following disclaimer. 113123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * 2. Redistributions in binary form must reproduce the above copyright 123123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * notice, this list of conditions and the following disclaimer in the 133123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * documentation and/or other materials provided with the distribution. 143123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * 153123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 163123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 173123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 183123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 193123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 203123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 213123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 223123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 233123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 243123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 253123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * SUCH DAMAGE. 263123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh * 273123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh */ 283123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 293123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#ifndef _MIPS64_ENDIAN_H_ 303123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define _MIPS64_ENDIAN_H_ 313123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 323123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#ifdef __GNUC__ 333123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 343123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) 353123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define __swap16md(x) ({ \ 363123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh register uint16_t _x = (x); \ 373123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh register uint16_t _r; \ 383123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \ 393123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh _r; \ 403123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh}) 413123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 423123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define __swap32md(x) ({ \ 433123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh register uint32_t _x = (x); \ 443123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh register uint32_t _r; \ 453123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \ 463123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh _r; \ 473123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh}) 483123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 493123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define __swap64md(x) ({ \ 503123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh uint64_t _swap64md_x = (x); \ 513123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh (uint64_t) __swap32md(_swap64md_x >> 32) | \ 523123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \ 533123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh}) 543123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 553123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh/* Tell sys/endian.h we have MD variants of the swap macros. */ 563123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define MD_SWAP 573123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 583123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#endif /* __mips32r2__ */ 593123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#endif /* __GNUC__ */ 603123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 613123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#if defined(__MIPSEB__) 623123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define _BYTE_ORDER _BIG_ENDIAN 633123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#else 643123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define _BYTE_ORDER _LITTLE_ENDIAN 653123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#endif 663123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#define __STRICT_ALIGNMENT 673123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#include <sys/types.h> 683123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#include <sys/endian.h> 693123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh 703123853ede6209e485fb7110bdcd38aea0f33d23Andrew Hsieh#endif /* _MIPS64_ENDIAN_H_ */ 71