16ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh/****************************************************************************
26ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ****************************************************************************
36ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***
46ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***   This header was automatically generated from a Linux kernel header
56ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***   of the same name, to make information necessary for userspace to
66ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***   call into the kernel available to libc.  It contains only constants,
76ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***   structures, and macros generated from the original header, and thus,
86ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***   contains no copyrightable information.
96ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ***
106ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ****************************************************************************
116ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh ****************************************************************************/
126ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#ifndef _ASM_LINUX_DMA_MAPPING_H
136ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define _ASM_LINUX_DMA_MAPPING_H
146ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
156ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#include <linux/device.h>
166ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#include <linux/err.h>
176ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
186ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsiehenum dma_data_direction {
196ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh DMA_BIDIRECTIONAL = 0,
206ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh DMA_TO_DEVICE = 1,
216ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh DMA_FROM_DEVICE = 2,
226ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh DMA_NONE = 3,
236ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh};
246ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
256ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_64BIT_MASK 0xffffffffffffffffULL
266ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_48BIT_MASK 0x0000ffffffffffffULL
276ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_40BIT_MASK 0x000000ffffffffffULL
286ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_39BIT_MASK 0x0000007fffffffffULL
296ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_32BIT_MASK 0x00000000ffffffffULL
306ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_31BIT_MASK 0x000000007fffffffULL
316ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_30BIT_MASK 0x000000003fffffffULL
326ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_29BIT_MASK 0x000000001fffffffULL
336ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_28BIT_MASK 0x000000000fffffffULL
346ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_24BIT_MASK 0x0000000000ffffffULL
356ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
366ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#include <asm/dma-mapping.h>
376ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
386ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define dma_sync_single dma_sync_single_for_cpu
396ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define dma_sync_sg dma_sync_sg_for_cpu
406ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
416ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_MEMORY_MAP 0x01
426ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_MEMORY_IO 0x02
436ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
446ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#define DMA_MEMORY_EXCLUSIVE 0x08
456ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh
466ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
476ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#endif
486ecc1bfab1621eaf5a17f82020a26468c537cdeaAndrew Hsieh#endif
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