68e74fda779ca28ecb2b3af10d5193691603b3d0 |
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26-Jul-2013 |
Ben Cheng <bccheng@google.com> |
Minor code cleanup to address warnings found by Clang. cherry-picked from internal Android branch 55617c82a73d84ff3695bdd5526159448262d009 Change-Id: I0f78ca6b8293c13d7dbb535556543f6ea9f4dd45
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62018a643f77d597ca9b32bc2eb5b58b34fe6f46 |
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04-May-2013 |
Brian Carlstrom <bdc@google.com> |
Remove unnecessary JNI_H_INCLUDE from LOCAL_C_INCLUDES Change-Id: I463a62898e5dd8eb01d1dfbaf71f67d8e1b4e67c
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808a7c0e7e39b7ca3c7db1366e6e4089166052bb |
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29-Aug-2012 |
Ian Rogers <irogers@google.com> |
Revert "Revert "Upgrade to dlmalloc 2.8.5."" This reverts commit 729eebbb4e4ec5b826b7230b4c02267da341b70b.
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497b25e87a51b4afd206ba7734971614d00301fb |
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22-Aug-2012 |
Brian Carlstrom <bdc@google.com> |
Revert "Upgrade to dlmalloc 2.8.5." This reverts commit bba37bd191843ef29ef9c7a8839e98b73debfffa.
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729eebbb4e4ec5b826b7230b4c02267da341b70b |
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22-Aug-2012 |
Brian Carlstrom <bdc@google.com> |
Revert "Upgrade to dlmalloc 2.8.5." This reverts commit bba37bd191843ef29ef9c7a8839e98b73debfffa.
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bba37bd191843ef29ef9c7a8839e98b73debfffa |
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18-Aug-2012 |
Ian Rogers <irogers@google.com> |
Upgrade to dlmalloc 2.8.5. Switch to using dlmalloc 2.8.5. Define mspace functionality directly using dlmalloc rather than taking from libcutils. Remove growth limit check in tryMalloc that only checks initial growth limit. Implement trimming at the end of the mspace. Depends upon: https://android-review.googlesource.com/41717 Change-Id: Ia2c6b50bdb0b0d5aae4b18deefbd1bf50dfa49d5
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0c2dc522d0e120f346cf0a40c8cf0c93346131c2 |
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03-Jul-2012 |
Dong-Yuan Chen <dong-yuan.chen@intel.com> |
[X86] X86 trace JIT compiler support This patch provides a fully functional x86 trace JIT compiler for Dalvik VM. It is built on top of the existing x86 fast interpreter with bug fixes and needed extension to support trace JIT interface. The x86 trace JIT code generator was developed independent of the existing template-based code generator and thus does not share exactly the same infrastructure. Included in this patch are: * Deprecated and removed the x86-atom fast interpreter that is no longer functional since ICS. * Augmented x86 fast interpreter to provide interfaces for x86 trace JIT compiler. * Added x86 trace JIT code generator with full JDWP debugging support. * Method JIT and self-verification mode are not supported. The x86 code generator uses the x86 instruction encoder/decoder library from the Apache Harmony project. Additional wrapper extension and bug fixes were added to support the x86 trace JIT code generator. The x86 instruction encoder/decoder is embedded inside the x86 code generator under the libenc subdirectory. Change-Id: I241113681963a16c13a3562390813cbaaa6eedf0 Signed-off-by: Dong-Yuan Chen <dong-yuan.chen@intel.com> Signed-off-by: Yixin Shou <yixin.shou@intel.com> Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com> Signed-off-by: Udayan <udayan.banerji@intel.com> Signed-off-by: Sushma Kyasaralli Thimmappa <sushma.kyasaralli.thimmappa@intel.com> Signed-off-by: Bijoy Jose <bijoy.a.jose@intel.com> Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com> Signed-off-by: Tim Hartley <timothy.d.hartley@intel.com>
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1a341025776a7677353e5d8e6d8c4dbf6d5441b7 |
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18-Jul-2012 |
Elliott Hughes <enh@google.com> |
Remove untested SH "support"; bionic long since stopped supporting SH. Hello world! Change-Id: I4660c8905b2641f90d90987938498e8693dc33da
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a8b91c52fd8a90b784835dfe1f8898035266c4dd |
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02-May-2012 |
Raghu Gandham <raghu@mips.com> |
[MIPS] Dalvik fast interpreter support and JIT implementation Change-Id: I9bb4f6875b7061d3ffaee73f204026cb8ba3ed39 Signed-off-by: Raghu Gandham <raghu@mips.com> Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Douglas Leung <douglas@mips.com> Signed-off-by: Don Padgett <don@mips.com>
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737e7c2b77b026ab44c6bbf775b77e953b6f79c6 |
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12-Jul-2011 |
Jeff Brown <jeffbrown@google.com> |
Remove the simulator target from all makefiles. Bug: 5010576 Change-Id: I544b54b673d9fd42197a5c97a291578a0bd0db5f
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e6c0ef210ee6c62cf4c63d50c04f451d5fa505f5 |
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15-Jun-2011 |
Elliott Hughes <enh@google.com> |
Break a dependency on frameworks/base when building a host VM. These aren't necessarily good abstractions, but they're no worse than what we had, and having them factored out is a step in the right direction. Change-Id: I5b839608317d2ca1ca54d8a38624fb686f2c37de
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ac518bce0e538749b12c09d4400cb0d30c350391 |
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09-Jun-2011 |
Elliott Hughes <enh@google.com> |
Tidy up some includes. Change-Id: I5abd4f8ab06db0c77fa369fcd97d8f1259b343df
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0fbb7030fff58e25718291811394487d95d95a3e |
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07-Jun-2011 |
Elliott Hughes <enh@google.com> |
Use std::string rather than malloc/free for saneDirName. Also use std::vector instead of the cutils/array cruft. Change-Id: I273147335cafbac5d336955f53b0b29d015f0589
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c67c23bc6f5f3621f31c41bd48553b196ab0325e |
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28-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Eliminate the PROFILE_FIELD_ACCESS feature. Change-Id: I27bf2d18c4c0735913ea8698825b05e393b046b2
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cd8f5e701547739f241594b43e9470c92d98e9cf |
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21-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the interpreter into C++. Change-Id: I4b7d6ed9c54dbf3244304a7ea0f13e6c37cca2aa
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5d5b94c8d14b166af580d5dd5906db4f9527d6ca |
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20-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the compiler into C++. Change-Id: Idffbdb02c29e2be03a75f5a0a664603f2299504a
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d5c36b9040bd26a81219a7f399513526f9b46324 |
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16-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the remaining non-compiler VM code into C++. Change-Id: Id8693208d2741c55a7b0474d1264f2112019d11f
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1813ab265f691e93401c7307c0b34247842ab35e |
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16-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the verifier and parts of the interpreter into C++. Change-Id: I8ce5fb558871d9709b251512dd01206be5ca8497
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0647d294bab9312be67a9032adfa4f0b9ba0984a |
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15-Apr-2011 |
Elliott Hughes <enh@google.com> |
Switch the JNI code over to C++. Change-Id: I82dbaf8931bda5a466fd5ad6b08f7f9b36d7ce37
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2d63bc57d5fcbcd54f0bd3e9491e1704b98ec0bf |
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14-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move JDWP into C++ and add extern "C" to remaining non-compiler includes. Change-Id: I19cba56e8f75b76f902c87ff5c5b3e2c17cb5c00
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dabd15a98449c6554579457aa4639bcdc3434eaa |
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14-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move fundamental object definitions and operations to C++ Change-Id: Ibc3766edfbf7fdbde2d762d6e88a0bb02df2be31
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056a24a06b2d166c8e8f380488253964db6d7dcd |
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14-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the reflection code into C++. Smart pointers would make dvmGenerateProxyClass cleaner. This code should be revisited once those interfaces come into existence. Change-Id: If25abb87e22d658ad88f997324c35703b23f623c
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db0c9549818d9f6e508d26e45ff9d886802aa1da |
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13-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Convert the internal and in-line natives to C++. Change-Id: I2ece682bc3b4d3b55ab27c60fd84a0b3243d7ca6
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ae188c676c681e47a93ade7fdf0144099b470e03 |
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08-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Compile the garbage collector and heap profiler as C++. Change-Id: I25d8fa821987a3dd6d7109d07fd42dbf2fe0e589
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ce87bfed41bbe4248b2770fb1a90f34b2518f6fa |
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31-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Delegate the queuing of cleared references to managed code. Previously, the garbage collector would pass each cleared reference to the heap worker thread for queuing. The heap worker thread would then perform a callback into managed code for each cleared reference which assigned the reference to its reference queue. With this change, the garbage collector instead links together all of the cleared references and calls back into managed code exactly once to hand off the references for processing. This change makes the heap worker thread and its data structures obsolete. Change-Id: I28e02638f0877a7fd2ac96b9c3f5597a38541ebb
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9a3147c7412f4794434b4c2604aa2ba784867774 |
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03-Mar-2011 |
buzbee <buzbee@google.com> |
Interpreter restructuring This is a restructuring of the Dalvik ARM and x86 interpreters: o Combine the old portstd and portdbg interpreters into a single portable interpreter. o Add debug/profiling support to the fast (mterp) interpreters. o Delete old mechansim of switching between interpreters. Now, once you choose an interpreter at startup, you stick with it. o Allow JIT to co-exist with profiling & debugging (necessary for first-class support of debugging with the JIT active). o Adds single-step capability to the fast assembly interpreters without slowing them down (and, in fact, measurably improves their performance). o Remove old "polling for safe point" mechanism. Breakouts now achieved via modifying base of interpreter handler table. o Simplify interpeter control mechanism. o Allow thread-granularity control for profiling & debugging The primary motivation behind this change was to improve the responsiveness of debugging and profiling and to make it easier to add new debugging and profiling capabilities in the future. Instead of always bailing out to the slow debug portable interpreter, we can now stay in the fast interpreter. A nice side effect of the change is that the fast interpreters got a healthy speed boost because we were able to replace the polling safepoint check that involved a dozen or so instructions with a single table-base reload. When combined with the two earlier CLs related to this restructuring, we show a 5.6% performance improvement using libdvm_interp.so on the Checkers benchmark relative to Honeycomb. Change-Id: I8d37e866b3618def4e582fc73f1cf69ffe428f3c
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f60f48e917d715fff9ec1ce24a75b7fb0d000a58 |
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22-Mar-2011 |
Elliott Hughes <enh@google.com> |
Remove more dead SecurityManager cruft. (Requires corresponding libcore change.) Change-Id: I86aac9dda6708173fd2b5a1c660ef20ea11fca03
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5fac7a456f1e53650c0044f1dff99747976bee2a |
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22-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove TEST_VM_IN_ECLAIR. Change-Id: I819a15680a50ea2d53fce6f8ebae01bc7d88fecb
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46cd4fb73824ab57160994c149ce2d7a06923b83 |
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17-Mar-2011 |
Ben Cheng <bccheng@android.com> |
Extend a trace with a backward branch into a loop. When seeing a trace that ends with a backward branch, exhaust all code blocks reachable from that trace and try to identify if there exists a non-nested loop. If the derived loop is found to be too complex or only acyclic code is seen, revert to the original compilation mechanism to translate a simple trace. This CL uses the whole-method parser/dataflow analysis framework to identify such loops. No optimization/codegen are performed yet. Bug: 4086718 Change-Id: I19ed3ee53ea1cbda33940c533de8e9220e647156
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701abba5119f17a3b786fbb940aa62353a186100 |
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09-Mar-2011 |
Carl Shapiro <cshapiro@google.com> |
Use indirect references in JNI by default. This change removes support for direct references. Change-Id: I2af043ecfc5811c16a7d02a5bbb6c071ec6f0a82
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3111b0c80ca3f90e966371cbab606ac38ed17cad |
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07-Mar-2011 |
Dan Bornstein <danfuzz@android.com> |
Collate more of the low-level class lookups. I pulled out all the initialization code that I could find that was merely looking up class and member names during early VM initialization, putting them all in a new file, InitRefs.c. I didn't do any real restructuring of the code, though. That will come in a follow-up. This was instigated by discussion surrounding bug #3500987, but it's not directly related to it. Change-Id: I59e93e552d29a5518f2cc4e1e30c4a8d51750d7b
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a7d59bbafea5430fe81fc21ba94ddf6f6a63b0b3 |
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24-Feb-2011 |
buzbee <buzbee@google.com> |
New interpreter breakout mechanism Introduce parallel handler entry points for mterp interpreters as a step towards fully supporting debug, profile and JIT within mterp (instead of bailing out to the portable debug interpreter). This CL contains most of the structural changes that need to happen, but does not yet enable the new switch mode. In short, within the mterp assembly interpreter register rIBASE points to an array of handlers for Dalvik opcodes. Instead of periodically checking for suspend, debug, profiling and JIT trace selection breakouts, rIBASE may simply be altered to point to the parallel breakout handlers when control needs to be rerouted. This will enable us to eliminate the separate portable debug interpreter and the entire mechanism of switching between the fast and portable interpreters. The x86 implementation required a large number of changes because of the need to dedicate a register to holding the table base. It will now use %edx (which was previously scratch). Changes include: o Support for two styles of mterp assembly code generation: computed goto and jump table (ARM uses computed goto, x86 uses jump table) o New mterp config operators to trigger generation of alternate entry points. o Alternate entries route execution through new dvmCheckInst(). That's where the checking code will go. o For x86, reserved register edx as dedicated rIBASE. o For jump-table mterps, ignore "%break" operator and allow variable-sized handlers with no "sister" region. Note that the x86-atom implementation will need substantial changes to function in this new model. Change-Id: I3a22048adb7dcfdeba4f94fbb977b26c3ab2fcb3
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69ee8f605ad4139c8b9a39821fd7a4cadb9d9337 |
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16-Feb-2011 |
Elliott Hughes <enh@google.com> |
Ensure we always call inline natives. Even though execute-inline is now a mandatory optimization, you can't be sure the inline natives will be invoked that way. There's reflection and JNI, for example, and there's the special case of String.equals that might be invoked as Object.equals. This patch adds a regular native method corresponding to each inline native, so that a corresponding libcore patch can drop its implementations. (For example, despite the fact that we all believed last week that the Java implementation of String.equals is never used, that turned out not to be true: every HashMap lookup will have used it. This pair of patches brings reality in line with our existing belief.) Change-Id: I19e64c23bea83e91696206ca40ce4e3faf853040
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9b45c4caf300ca764260bdcfb410fd4f12962965 |
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10-Feb-2011 |
Elliott Hughes <enh@google.com> |
Move more system property handling into managed code. Bug: 3413364 Change-Id: I0f22ea9ed5327e4fef9d4395025173a839ea9ce2
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67f9be7f5d77cc0ab2237ce4281eede9e496bb89 |
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09-Feb-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove the private CLZ implementation in the GC. This was a hold over from a time when the compiler did not properly support the CLZ intrinsic. Change-Id: I224481868c8d6fd3e0382d9cde3a2ffd02cfd39c
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01605d2b668e8e1701cfdfa302dde847b9171fc9 |
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01-Feb-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove the unused monitor tracking and deadlock prediction code. This feature has been in the code base for several releases but has never been enabled. Change-Id: Ia770b03ebc90a3dc7851c0cd8ef301f9762f50db
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83ff618a3e5a63b1930ed546c3d2ef194d29d642 |
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01-Feb-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove the HPROF stack trace collection feature. Change-Id: I0eab9c496b07212fb2c86fe122dc422e70af891e
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0d1aac383a4bdce9feaad2f614df42234c2dcced |
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22-Dec-2010 |
Jesse Wilson <jessewilson@google.com> |
Revert "Remove inline natives for an unused performance test." This reverts commit 7ecd89dc02ce00c425788bd4989bdb6cde9a618a. Change-Id: I427635b7e3f7be45cfde78b8046dab3b23b64562
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7ecd89dc02ce00c425788bd4989bdb6cde9a618a |
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22-Dec-2010 |
Jesse Wilson <jessewilson@google.com> |
Remove inline natives for an unused performance test. Change-Id: I80cfb918bdf174aeb6de83909c840563f6b945dd
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e9224fbea5e7aaa120847aac9d1fe9f38cad9222 |
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18-Dec-2010 |
Andy McFadden <fadden@android.com> |
Rename BackwardFlow --> Liveness Changed my mind. Change-Id: I16cdba8ba20a4dc60db5fbd70e591fb375c48008
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9fd527f3258381b33365cb18fd37c7864e2bbb40 |
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11-Dec-2010 |
Andy McFadden <fadden@android.com> |
Progress on live-precise GC. This implements computation of register liveness. This is still a work in progress. The computation is disabled by default, and when enabled it's not yet used during the generation of register maps. The code has not been thoughly tested. While working on this I fiddled around with the verifier's verbose debugging stuff a bit. This also changes some stuff in BitVector. Unsigned ints are now prevalent, and functions like dvmSetBit abort rather than returning a boolean value when an illegal operation is attempted. (Some parallel functions in the compiler were also updated.) Bug 2534655 Change-Id: Iea161c6d63a310e1dbdac2aeeb7b7aeadda8807c
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00603079b8723b32c955513eae63a8f97898074d |
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28-Oct-2010 |
Ben Cheng <bccheng@android.com> |
Implement method parser and SSA transformation. Change-Id: If3fb3a36f33aaee8e5fdded4e9fa607be54f0bfb
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2867f0b3f48d3dcbdba9b4ba7db27f6107313663 |
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10-Dec-2010 |
Andy McFadden <fadden@android.com> |
Split BitVector into its own file. This just pulls the BitVector stuff out into separate files. IIRC the motivation for building Misc.c for ARM rather than Thumb was the bit-manipulation going on in BitVector (e.g. the use of ffs()), so I switched that around in the makefile. The only change of any substance was relocation of the kBitVectorGrowth define from the .h to the .c. Change-Id: Ib35fda81809081bd629b4f344e41f21966e1441c
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701d2720fa693621a3c0c4d0bdf9e32e3eb8e731 |
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02-Dec-2010 |
Andy McFadden <fadden@android.com> |
Progress on liveness analysis. Compute basic blocks and their predecessors, necessary for backward flow analysis. This is a work in progress and isn't yet enabled. (When enabled, verification takes 20% longer, so there's some room for improvement on performance.) Also, this changes the "generate register maps" setting to be enabled by default, and allows a "no" prefix on -Xgenregmap to disable it. Bug 2534655 Change-Id: Id2e8512f53fc454ce2184879ab663ed7121274b6
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fc75f3ed87b55d625b6054e18645da5cbdba31c6 |
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07-Dec-2010 |
Carl Shapiro <cshapiro@google.com> |
Fix implicit conversions, rename reserved works, enable -Wc++-compat. Change-Id: I06292964a6882ea2d0c17c5c962db95e46b01543
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4d31eb383881b817fe7e68ea04d1049e8bc7c78a |
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30-Nov-2010 |
Dan Bornstein <danfuzz@android.com> |
Punch opcode info access from libcore to the vm. I looked at doing this as a native file in libcore, but that seemed to pull in too many dependencies. Change-Id: I1753b9b78bc593b9467a877a5fea0ba5d5161cfe
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202e3d9948a658324e339d58c70adb82cb75efcd |
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02-Nov-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove allocation limit checking. Change-Id: Ie9a23da2baf201c50cad5ba0d0992cec9bcace54
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a5a46928b486725ed624fa0ae6c469645a209e87 |
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01-Nov-2010 |
Carl Shapiro <cshapiro@google.com> |
HPROF is here to stay, make WITH_HPROF the default. Change-Id: Ic9947461daa21641fd9d34d52b6c7998716d8ab2
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dbe52e8f50c87cfd38bb738bb6edb6e18e11e720 |
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22-Oct-2010 |
Elliott Hughes <enh@google.com> |
Remove armv4t support. This was never finished, and hasn't been maintained. And the hardware's totally obsolete. Change-Id: Icbf78e507de3b8be8a8f995b8423cc3c678ab0d3
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f6789277a9d25379bf43ffc39ef091db722dd5af |
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25-Sep-2010 |
buzbee <buzbee@google.com> |
JIT: Source code reorganization to isolate target independent code Much of the register utility code is target independent. Move it up a level so the x86 JIT can use it. Change-Id: Id9895a42281fd836cb1a2c942e106de94df62a9a
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629e692379a8b12641a4402ff1c9f67af879f68e |
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23-Sep-2010 |
Ben Cheng <bccheng@google.com> |
Print the JIT codegen type in the VM configuration list. Example: Configured with: debugger profiler hprof jit(armv7-a-neon) show_exception=1 So that the CPU capability on JIT-enabled devices can be exposed. (cherry-picked from dalvik-dev) Change-Id: I887201e7023ca94cd9c3d690f03b7b042175e6ed
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ab961da1c0b29cbca354e6a71e1739df116afa52 |
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23-Sep-2010 |
Ben Cheng <bccheng@google.com> |
Print the JIT codegen type in the VM configuration list. Example: Configured with: debugger profiler hprof jit(armv7-a-neon) show_exception=1 So that the CPU capability on JIT-enabled devices can be exposed. Change-Id: Id35c0f68e0b9885279917ddef00b74f5c92a6786
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7520ee7ff226e12e06818561b15741d2575072e3 |
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18-Sep-2010 |
buzbee <buzbee@google.com> |
Add source code skeletons for x86 work. No actual JIT'ng yet. Change-Id: Ic94a916e777e9bc5163cf205899daf9c18dcafe1
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d394371bd84bacc51e96e2d2eacb8549d9110b1e |
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09-Sep-2010 |
Dan Bornstein <danfuzz@android.com> |
Remove the functionality in ReduceConstants.[ch]. It was a good experiment to try, but it was never made production-ready, and it doesn't look like it would be a net win at this point. We metaphorically pour out a beer in its honor. Change-Id: I7f6ac95f5b7c963df0a3015ed33595fa1a928636
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c415aaf5d72862084cf58ccf53b6d0e8370109de |
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01-Sep-2010 |
Brian Carlstrom <bdc@google.com> |
Removal of more sampling profiler bits dalvik/vm/native/SystemThread.[ch] was added for the old sampling profiler, and can be removed as it's not needed for the new one. Bug: 2967741 Change-Id: Ibd306b4ba579f9796facbf7a69719b3cb6640762
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0f68087322e3a43df3763d3500fc564d147793e7 |
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18-Aug-2010 |
Brian Carlstrom <bdc@google.com> |
New Java-based SamplingProfiler Summary: - libcore: new Java based SamplingProfiler - dalvik: remove old SamplingProfiler native bits - frameworks/base: New placeholder SamplingProfilerIntegration - vendor/google: remove old profiler snapshot parsing code Details: libcore A new 100% Java SamplingProfiler. While it has more overhead that the old native one, the new one can actually collect more than the current PC and frame pointer, so you can get useful context of where your app is spending time. It currently provides ASCII hprof format output for use with tools like PerfAnal dalvik/src/main/java/dalvik/system/SamplingProfiler.java Unit test for the new SamplingProfiler dalvik/src/test/java/dalvik/system/SamplingProfilerTest.java Add core-tests-dalvik JavaLibrary.mk dalvik Removing native code that supported the old SamplingProfiler vm/Dvm.mk vm/native/InternalNative.c vm/native/dalvik_system_SamplingProfiler.c frameworks/base Placeholder SamplingProfilerIntegration. Later plans include generating EventStackTrace protobufs. New SamplingProfiler does not have a global instance, so SamplingProfilerIntegration provides one in INSTANCE. Old binary snapshot format is temporily replaced with ASCII hprof data. core/java/com/android/internal/os/SamplingProfilerIntegration.java Simplified interface for zygote profile snapshotting core/java/com/android/internal/os/ZygoteInit.java Current SamplingProfilerIntegration does not track event loop explicitly, but hprof information does include thread information. core/java/android/app/ActivityThread.java vendor/google Removing code for parsing old SamplingProfiler snapshot format tools/samplingprofiler/Android.mk tools/samplingprofiler/NOTICE tools/samplingprofiler/profiler.iml tools/samplingprofiler/profiler.ipr tools/samplingprofiler/pull-snapshots.sh tools/samplingprofiler/sorttable.js tools/samplingprofiler/src/com/android/profiler/PrintHtml.java
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26111f7e330b6d38f568648d6bdf1fcd9ca7534f |
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18-Aug-2010 |
Brian Carlstrom <bdc@google.com> |
New Java-based SamplingProfiler Summary: - libcore: new Java based SamplingProfiler - dalvik: remove old SamplingProfiler native bits - frameworks/base: New placeholder SamplingProfilerIntegration - vendor/google: remove old profiler snapshot parsing code Details: libcore A new 100% Java SamplingProfiler. While it has more overhead that the old native one, the new one can actually collect more than the current PC and frame pointer, so you can get useful context of where your app is spending time. It currently provides ASCII hprof format output for use with tools like PerfAnal dalvik/src/main/java/dalvik/system/SamplingProfiler.java Unit test for the new SamplingProfiler dalvik/src/test/java/dalvik/system/SamplingProfilerTest.java Add core-tests-dalvik JavaLibrary.mk dalvik Removing native code that supported the old SamplingProfiler vm/Dvm.mk vm/native/InternalNative.c vm/native/dalvik_system_SamplingProfiler.c frameworks/base Placeholder SamplingProfilerIntegration. Later plans include generating EventStackTrace protobufs. New SamplingProfiler does not have a global instance, so SamplingProfilerIntegration provides one in INSTANCE. Old binary snapshot format is temporily replaced with ASCII hprof data. core/java/com/android/internal/os/SamplingProfilerIntegration.java Simplified interface for zygote profile snapshotting core/java/com/android/internal/os/ZygoteInit.java Current SamplingProfilerIntegration does not track event loop explicitly, but hprof information does include thread information. core/java/android/app/ActivityThread.java vendor/google Removing code for parsing old SamplingProfiler snapshot format tools/samplingprofiler/Android.mk tools/samplingprofiler/NOTICE tools/samplingprofiler/profiler.iml tools/samplingprofiler/profiler.ipr tools/samplingprofiler/pull-snapshots.sh tools/samplingprofiler/sorttable.js tools/samplingprofiler/src/com/android/profiler/PrintHtml.java Change-Id: Idb4defff0005ef203e577b5b5956506e3cd8dbf1
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3e9bfe0bed2f27d01efdb03a71025c421d321956 |
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18-Aug-2010 |
Jesse Wilson <jessewilson@google.com> |
Support dalvikvm on a Linux x86 host Change-Id: Id166ab03a01833e06ec1a9aa0059e4eb28ec04ce
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0d615c3ce5bf97ae65b9347ee77968f38620d5e8 |
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18-Aug-2010 |
Andy McFadden <fadden@android.com> |
Always support debugging and profiling. This eliminates the use of the WITH_DEBUGGER and WITH_PROFILER conditional compilation flags. We've never shipped a device without these features, and it's unlikely we ever will. They're not worth the code clutter they cause. As usual, since I can't test the x86-atom code I left that alone and added an item to the TODO list. Bug 2923442. Change-Id: I335ebd5193bc86f7641513b1b41c0378839be1fe
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7a2697d327936e20ef5484f7819e2e4bf91c891f |
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07-Jun-2010 |
Ben Cheng <bccheng@android.com> |
Implement method inlining for getters/setters Changes include: 1) Force the trace that ends with an invoke instruction to include the next instruction if it is a move-result (because both need to be turned into no-ops if callee is inlined). 2) Interpreter entry point/trace builder changes so that return target won't automatically be considered as trace starting points (to avoid duplicate traces that include the move result instructions). 3) Codegen changes to handle getters/setters invoked from both monomorphic and polymorphic callsites. 4) Extend/fix self-verification to form identical trace regions and handle traces with inlined callees. 5) Apply touchups to the method based parsing - still not in use. Change-Id: I116b934df01bf9ada6d5a25187510e352bccd13c
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de66fcbc1d7fde20bdafb508b769028d8f2ec9bc |
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30-Jul-2010 |
Elliott Hughes <enh@google.com> |
Switch -Xjnitrace over to using a custom JNI bridge. This now works without needing to specify -Xint:portable, and no longer needs to be manually enabled at compile-time. If you're using -Xjnitrace, you'll pay to look up the real JNI bridge on every invocation of a native method, but doing so leads to a really simple implementation, and you're writing to the log on every invocation anyway, so -Xjnitrace and performance don't go together anyway. Bug: 2846017 Change-Id: I3108c4f35f27b72e8849c41077ae3e8768550e96
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8afa9dfe04354e5b3917e31e3e2772885f507580 |
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07-Jul-2010 |
Elliott Hughes <enh@google.com> |
Tracing for developers of native methods. The existing -verbose:jni is mainly useful for VM developers hacking on the JNI implementation; this is intended to replace the ad hoc logging developers of native methods need to write. Use "-Xint:portable -Xjnitrace:ClassNameSubstring" on the command line. To trace all native methods (mainly useful for testing the tracing), use "-Xjnitrace:"; to trace just methods in java.util.regex.Matcher, use "-Xjnitrace:Matcher" or "-Xjnitrace:Ljava/util/regex/Matcher;" or whatever. To trace all the methods in Matcher and Pattern, you have to use something like "-Xjnitrace:java/util/regex/". There's no facility for tracing an individual method or group of methods because I haven't needed such a thing. Here's a basic example: -> Ljava/nio/charset/Charsets;.toUtf8Bytes([CII)[B (0x400474b8, 0, 5) <- Ljava/nio/charset/Charsets;.toUtf8Bytes([CII)[B returned 0x40047548 Here's an example of a non-static native method: -> Lorg/apache/harmony/luni/platform/OSFileSystem;.writeImpl(I[BII)J this=0x40012e78 (1, 0x400476d0, 0, 5) <- Lorg/apache/harmony/luni/platform/OSFileSystem;.writeImpl(I[BII)J returned 5 Here's an interesting example showing another native method being called, and an exception being thrown by a native method: -> Ljava/lang/VMClassLoader;.loadClass(Ljava/lang/String;Z)Ljava/lang/Class; (0x400466b8, false) -> Ljava/lang/Throwable;.nativeFillInStackTrace()Ljava/lang/Object; () <- Ljava/lang/Throwable;.nativeFillInStackTrace()Ljava/lang/Object; returned 0x400467c8 <- Ljava/lang/VMClassLoader;.loadClass(Ljava/lang/String;Z)Ljava/lang/Class; threw Ljava/lang/ClassNotFoundException; (This functionality needs to be enabled at compile time. A later patch will address that.) Change-Id: I6da8930bd4b4f228e07b05cc59a3aea331c5cee1
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6e5cf6021b2f3e00e18ab402f23ab93b27c6061b |
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22-Jun-2010 |
Barry Hayes <bhayes@google.com> |
Quicker partial collection by using card marking. Add calls to the card marking from the write barrier routines, so that a write to an Object marks the appropriate card. Add code in the GC to use and rebuild the cards at a partial GC, clearing cards in the Zygote heap which do not in fact contain references to the application heap. Change-Id: Ie6f29fd096e029f48085715b282b6db8a7122555
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c6b25c79a4ec5cc83e2bc14af24e8eabad931743 |
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22-Jun-2010 |
Andy McFadden <fadden@android.com> |
Relocate OpCodeNames.[ch]. The JIT was pulling it out of the dexdump directory, which is Just Plain Wrong[tm]. Now it's part of libdex, for all to enjoy. Change-Id: Ic1e4c981eb2d70ccc3c841ceb5a54f4f77af2008
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38a17866b31e0b6dee320f32a8644e358583ab23 |
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17-Jun-2010 |
Andy McFadden <fadden@android.com> |
Implement 64-bit atomic ops for ARMv6K+. This implements the "quasi-atomic" 64-bit operations using LDREXD/STREXD when those instructions are available (e.g. our ARMv7-A devices). Also, folded in an expanded version of AtomicSpeed.c that has been floating around my hard drive for a while. (This time, without Condition Code Roulette.) Change-Id: I90803794994373e2c620be423c081f0da4469fdf
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edd405f8ea4342f76c0cdd07484104b560a8cebe |
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17-Jun-2010 |
Brian Carlstrom <bdc@google.com> |
Revert "Implement 64-bit atomic ops for ARMv6K+." This reverts commit 05ce82aa4685beb59d37b4ef655ff2750808aca2.
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05ce82aa4685beb59d37b4ef655ff2750808aca2 |
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17-Jun-2010 |
Andy McFadden <fadden@android.com> |
Implement 64-bit atomic ops for ARMv6K+. This implements the "quasi-atomic" 64-bit operations using LDREXD/STREXD when those instructions are available (e.g. our ARMv7-A devices). Also, folded in an expanded version of AtomicSpeed.c that has been floating around my hard drive for a while. Change-Id: I2d10c60ce2bce846218c3ac6dc22a54bc6627919
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cf7fa53b1410eb1033b94267d89867a416523cc6 |
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09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Treat warnings as errors for ARM target builds. Change-Id: Icbc4867a001f33abebb759ddcc69dd877950b69a
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adc346f4145e409959ec1c657bbd8fecef6d2042 |
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04-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Add a callback driven visitor routine and make verify use it. This is the first step along the way to ending the proliferation of one-off object walking routines. This code should supersede similar code in the mark sweep collector, the copying collector, the hprof tool, etc.. Once all of its uses have been debugged the routines in the .c file should be hoisted into the .h file and marked as inline. Soon, the signature of the visitor will probably have to be converted to a functor with members specialized to reference type and, in addition, given an extra parameter for a context structure. Change-Id: Ib00850f22374c5aca51fa3708304774da90d8bc4
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fbdcfb9ea9e2a78f295834424c3f24986ea45dac |
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29-May-2010 |
Brian Carlstrom <bdc@google.com> |
Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master Change-Id: I0c0edb3ebf0d5e040d6bbbf60269fab0deb70ef9
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2f4e2889a31da3eb6d825695a21f36629a3a7e51 |
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27-May-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove unused mark tracking code. Change-Id: I5164f0a357b3823db8fb3ee33da953c1bf293674
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e3c01dac83e6eea7f82fe81ed89cfbdd9791dbc9 |
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21-May-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove unused labels, variables, and functions. Enable warnings. Change-Id: Icbe24eaf1ad499f28b68b6a5f05368271a0a7e86
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6a877083893fb466ebb6ee6bcbdc5f1ca8609cb1 |
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20-May-2010 |
Andy McFadden <fadden@android.com> |
Atomic/SMP update. Moved quasiatomic 64-bit operations in here. They still need work. Use the new libcutils atomic-inline header for our memory barriers. Adjust makefiles to set SMP definition appropriately. Change-Id: Id2ab2123724bb0baeb32f862b5568392aba35a59
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d28668cf8740d1f913b4e9140a8c685013c1ad18 |
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16-Apr-2010 |
Carl Shapiro <cshapiro@google.com> |
Import the copying collector. Change-Id: I48ef17afd9e5e8453e560a96d307f4f949d4ab5e
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2e1ee50a08cc3dd07ce4e956b925c1f0f28cf329 |
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24-Mar-2010 |
Andy McFadden <fadden@android.com> |
Rearrange some things. This splits DexOptimize into DexPrepare (which deals with file shuffling and fork/exec) and Optimize (which does the actual quickening of instructions). The Optimize functions are now effectively private to the "analysis" directory. Twiddled some comments. No substantive code changes. Change-Id: Ia51865b259fb32822132e2373997866e360ca86a
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1e714bbd8230ac6fb9e3a8e9e25bca687132c82a |
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16-Mar-2010 |
Carl Shapiro <cshapiro@google.com> |
Import the heap verification code from the copying collector. The reference verification routine adds an extra argument so the base address of an object can be passed to the verification code without provoking a warning from GCC about breaking alias analysis. Change-Id: Idd921bcc0e084c18bff1e209a8591ef55f57843a
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dd4feb31fc1bce7a4be05407c2b2393450f00537 |
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26-Feb-2010 |
Andy McFadden <fadden@android.com> |
Don't set x86 arch variant. This was a workaround for a missing bit in the core build. No longer needed.
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98740d6436340f17f5427d5923184fcace0e38cc |
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25-Feb-2010 |
Carl Shapiro <cshapiro@google.com> |
Eliminate the unused hprof "unreachable" feature. This code dates back to the Perforce repository and has never been enabled. Nobody seems to know what it was once, if ever, used for so it may as well go.
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22d404a75a00cda0b0ebed1034c2808ba060b05f |
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07-Apr-2009 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
This is a contribution of x86-atom targeted assembly for the fast byte-code interpreter engine. This is an initial contribution with minimal optimizations that target the Intel ATOM processor. We expect to continuously improve this code. It is expected that there will be a discussion on the potential merge of this code and similar efforts (i.e. the mterp/x86 directory first included with cupcake). While this code is intended to target ATOM and not a generic X-86 processor, we were able to show the following improvements over the c-portable interpreter using the simulator build: Build: TARGET_SIMULATOR: true TARGET_BUILD_TYPE: release TARGET_PRODUCT: sim Environment: Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz PI = Portable Interpreter IA = Fast IA Interpreter Embedded CaffeineMark: (IA-PI)/PI: Average of 70% improvement on overall score SPECjbb2000*: (IA-PI)/PI: Average of 37% improvement on raw score SPECjvm98*: (PI/IA) Speedup: Mtrt: 1.2; Jess: 1.34; Compress: 1.57; Db: 1.46; Jack: 1.28 * SPECjbb2000 - 1 warehouse. Noncompliant - modified to run on Dalvik * SPECjvm98 - Noncompliant - modified to run on Dalivk
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c3b92b26df6416d3179e865adccb283ee4170ab1 |
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27-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Fix performance issues related to chaining and unchaining. 1) Patching requests for predicted chaining cells (used by virtual/interface methods) are now batched in a queue and processed when the VM is paused for GC. 2) When the code cache is full the reset operation is also conducted at the end of GC pauses so this totally eliminates the need for the compiler thread to issue suspend-all requests. This is a very rare event and when happening it takes less than 5ms to finish. 3) Change the initial value of the branch in a predicted chaining cell from 0 (ie lsl r0, r0, #0) to 0xe7fe (ie branch to self) so that initializing a predicted chaining cell doesn't need to suspend all threads. Together with 1) seeing 20% speedup on some benchmarks. 4) Add TestCompability.c where defining "TEST_VM_IN_ECLAIR := true" in buildspec.mk will activate dummy symbols needed to run libdvm.so in older releases. Bug: 2397689 Bug: 2396513 Bug: 2331313
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6999d84e2c55dc4a46a6c311b55bd5811336d9c4 |
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27-Jan-2010 |
Ben Cheng <bccheng@android.com> |
Fix performance issues related to chaining and unchaining. 1) Patching requests for predicted chaining cells (used by virtual/interface methods) are now batched in a queue and processed when the VM is paused for GC. 2) When the code cache is full the reset operation is also conducted at the end of GC pauses so this totally eliminates the need for the compiler thread to issue suspend-all requests. This is a very rare event and when happening it takes less than 5ms to finish. 3) Change the initial value of the branch in a predicted chaining cell from 0 (ie lsl r0, r0, #0) to 0xe7fe (ie branch to self) so that initializing a predicted chaining cell doesn't need to suspend all threads. Together with 1) seeing 20% speedup on some benchmarks. 4) Add TestCompability.c where defining "TEST_VM_IN_ECLAIR := true" in buildspec.mk will activate dummy symbols needed to run libdvm.so in older releases. Bug: 2397689 Bug: 2396513 Bug: 2331313
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24ac537cf8d214f7f1bcb07aace429521247d1eb |
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16-Dec-2009 |
Ben Cheng <bccheng@google.com> |
Move VFP register save/restore routines from template to codegen. Code in the template directory will occupy space in the code cache and is invoked from JIT'ed code. Since these routines are only invoked from statically compiled functions we can move them to the codegen directory which also has arch-variant configurations.
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12def722ecb5d5a1e2f800ef545d8019e443b293 |
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02-Dec-2009 |
Andy McFadden <fadden@android.com> |
Update makefile comments. The "make clean" note was out of date -- it only cleaned one of our four targets.
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5d90c20bd7903d7bba966b224e576bf137bf8b4b |
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23-Nov-2009 |
Ben Cheng <bccheng@google.com> |
Restructure the codegen to make architectural depedency explicit. The original Codegen.c is broken into three components: - CodegenCommon.c (arch-independend) - CodegenFactory.c (Thumb1/2 dependent) - CodegenDriver.c (Dalvik dependent) For the Thumb/Thumb2 directories, each contain the followin three files: - Factory.c (low-level routines for instruction selections) - Gen.c (invoke the ISA-specific instruction selection routines) - Ralloc.c (arch-dependent register pools) The FP directory contains FP-specific codegen routines depending on Thumb/Thumb2/VFP/PortableFP: - Thumb2VFP.c - ThumbVFP.c - ThumbPortableFP.c Then the hierarchy is formed by stacking these files in the following top-down order: 1 CodegenCommon.c 2 Thumb[2]/Factory.c 3 CodegenFactory.c 4 Thumb[2]/Gen.c 5 FP stuff 6 Thumb[2]/Ralloc.c 7 CodegenDriver.c
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72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
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13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
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bb0dce59d58b10ed18947d94a65a9a665e104793 |
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04-Nov-2009 |
Ben Cheng <bccheng@google.com> |
Remove cruft in the default libdvm.so and add 3 more special targets. The idea is similar to having libc.so as the default/optimal build and libc_debug.so at a handy place. libdvm.so : default build to be installed with JIT on and assertion off. libdvm_interp.so: JIT statically compiled out and assertion off. libdvm_assert.so: assert/JIT-tuning enabled. libdvm_sv.so : assert/JIT-self-verification enabled. Compile time of "mmm dalvik" from clean build with -j1: real 2m36.144s user 2m23.029s sys 0m12.253s Compile time of "mmm dalvik" from touching Interp.c with -j1: real 0m8.493s user 0m7.416s sys 0m1.280s Code size: 638152 Nov 3 16:17 libdvm.so 785604 Nov 3 16:17 libdvm_assert.so 556888 Nov 3 16:17 libdvm_interp.so 793804 Nov 3 16:17 libdvm_sv.so
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1465db5ee2d3c4c4dcc8e017a294172e858765cb |
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24-Sep-2009 |
Bill Buzbee <buzbee@google.com> |
Major registor allocation rework - stage 1. Direct usage of registers abstracted out. Live values tracked locally. Redundant loads and stores suppressed. Address of registers and register pairs unified w/ single "location" mechanism Register types inferred using existing dataflow analysis pass. Interim (i.e. Hack) mechanism for storing register liveness info. Rewrite TBD. Stubbed-out code for linear scan allocation (for loop and long traces) Moved optimistic lock check for monitor-enter/exit inline for Thumb2 Minor restructuring, renaming and general cleanup of codegen Renaming of enums to follow coding convention Formatting fixes introduced by the enum renaming Rewrite of RallocUtil.c and addition of linear scan to come in stage 2.
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524fea166f6d2fabe516462a7aeedcdec3ad688b |
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23-Oct-2009 |
Dan Bornstein <danfuzz@android.com> |
Sort out libnativehelper, and make related comments less redundant. Change-Id: If25babc7b3232449a3ba8503431865273d4f481a
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22620b855a2e79e71939c301d1b7c1e3160e57ee |
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16-Oct-2009 |
Dan Bornstein <danfuzz@android.com> |
Another couple of tweaks in my attempt to make a sane host build. Change-Id: I49938c6aa933cca19874432b127ad9b1b49e3e79
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2fe146a3650e9ccf5da2d24f60841513713f5029 |
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10-Sep-2009 |
Bob Lee <crazybob@google.com> |
Addressed reviewer comments.
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500464deb29dc8bfc7b5e51ab0fdffa6fa51b5d7 |
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09-Sep-2009 |
Ben Cheng <bccheng@google.com> |
DO NOT MERGE: Do not enable JIT_TUNING and assertion by default with JIT.
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4238ec2ad1ace5103b2206a483f5f03d2e96c476 |
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25-Aug-2009 |
Ben Cheng <bccheng@android.com> |
Implement SSA-based loop optimizations. For traces of simple natural loops (ie no invokes/side exits) null and range checks will be hoisted in to entry block. For acyclic traces SSA representation will be formed but no optimizations are applied (for now). SSA representation will be printed with the normal verbose output. For example: D/dalvikvm( 1248): Dumping LIR insns D/dalvikvm( 1248): installed code is at 0x428559d4 D/dalvikvm( 1248): total size is 324 bytes D/dalvikvm( 1248): 0x428559d4 (0000): data 0x012c(300) D/dalvikvm( 1248): -------- entry offset: 0x002b D/dalvikvm( 1248): -------- MIR_OP_NULL_N_RANGE_UP_CHECK D/dalvikvm( 1248): 0x428559d6 (0002): ldr r0, [r5, #36] D/dalvikvm( 1248): 0x428559d8 (0004): ldr r1, [r5, #12] D/dalvikvm( 1248): 0x428559da (0006): cbz r0,0x42855a06 D/dalvikvm( 1248): 0x428559dc (0008): ldr r0, [r0, #8] D/dalvikvm( 1248): 0x428559de (000a): subs r1, #1 D/dalvikvm( 1248): 0x428559e0 (000c): cmp r1, r0 D/dalvikvm( 1248): 0x428559e2 (000e): bge 0x42855a06 D/dalvikvm( 1248): -------- MIR_OP_NULL_N_RANGE_UP_CHECK D/dalvikvm( 1248): 0x428559e4 (0010): ldr r0, [r5, #40] D/dalvikvm( 1248): 0x428559e6 (0012): ldr r1, [r5, #12] D/dalvikvm( 1248): 0x428559e8 (0014): cbz r0,0x42855a06 D/dalvikvm( 1248): 0x428559ea (0016): ldr r0, [r0, #8] D/dalvikvm( 1248): 0x428559ec (0018): subs r1, #1 D/dalvikvm( 1248): 0x428559ee (001a): cmp r1, r0 D/dalvikvm( 1248): 0x428559f0 (001c): bge 0x42855a06 D/dalvikvm( 1248): -------- MIR_OP_NULL_N_RANGE_UP_CHECK D/dalvikvm( 1248): 0x428559f2 (001e): ldr r0, [r5, #32] D/dalvikvm( 1248): 0x428559f4 (0020): ldr r1, [r5, #12] D/dalvikvm( 1248): 0x428559f6 (0022): cbz r0,0x42855a06 D/dalvikvm( 1248): 0x428559f8 (0024): ldr r0, [r0, #8] D/dalvikvm( 1248): 0x428559fa (0026): cmp r1, r0 D/dalvikvm( 1248): 0x428559fc (0028): bge 0x42855a06 D/dalvikvm( 1248): -------- MIR_OP_LOWER_BOUND_CHECK D/dalvikvm( 1248): 0x428559fe (002a): ldr r0, [r5, #44] D/dalvikvm( 1248): 0x42855a00 (002c): cmp r0, #1 D/dalvikvm( 1248): 0x42855a02 (002e): blt 0x42855a06 D/dalvikvm( 1248): 0x42855a04 (0030): b 0x42855a08 D/dalvikvm( 1248): 0x42855a06 (0032): b 0x42855af0 D/dalvikvm( 1248): L0x002b: D/dalvikvm( 1248): -------- MIR_OP_PHI D/dalvikvm( 1248): -------- s20(v11_1) <- s11(v11_0) s46(v11_2) D/dalvikvm( 1248): -------- dalvik offset: 0x002b @ aget-wide D/dalvikvm( 1248): -------- s21(v12_1) s22(v13_1) <- s9(v9_0) s20(v11_1) D/dalvikvm( 1248): 0x42855a08 (0034): ldr r2, [r5, #36] D/dalvikvm( 1248): 0x42855a0a (0036): ldr r3, [r5, #44] D/dalvikvm( 1248): 0x42855a0c (0038): adds r2, r2, #16 D/dalvikvm( 1248): 0x42855a0e (003a): lsls r3, r3, #3 D/dalvikvm( 1248): 0x42855a10 (003c): ldr r0, [r2, r3] D/dalvikvm( 1248): 0x42855a12 (003e): adds r2, r2, #4 D/dalvikvm( 1248): 0x42855a14 (0040): ldr r1, [r2, r3] D/dalvikvm( 1248): -------- dalvik offset: 0x002d @ aget-wide D/dalvikvm( 1248): -------- s23(v14_1) s24(v15_1) <- s10(v10_0) s20(v11_1) D/dalvikvm( 1248): 0x42855a16 (0042): ldr r3, [r5, #40] D/dalvikvm( 1248): 0x42855a18 (0044): str r0, [r5, #48] D/dalvikvm( 1248): 0x42855a1a (0046): ldr r0, [r5, #44] D/dalvikvm( 1248): 0x42855a1c (0048): adds r3, r3, #16 D/dalvikvm( 1248): 0x42855a1e (004a): lsls r0, r0, #3 D/dalvikvm( 1248): 0x42855a20 (004c): str r1, [r5, #52] D/dalvikvm( 1248): 0x42855a22 (004e): ldr r1, [r3, r0] D/dalvikvm( 1248): 0x42855a24 (0050): adds r3, r3, #4 D/dalvikvm( 1248): 0x42855a26 (0052): ldr r2, [r3, r0] D/dalvikvm( 1248): -------- dalvik offset: 0x002f @ add-double/2addr D/dalvikvm( 1248): -------- s25(v12_2) s26(v13_2) <- s21(v12_1) s22(v13_1) s23(v14_1) s24(v15_1) D/dalvikvm( 1248): 0x42855a28 (0054): str r1, [r5, #56] D/dalvikvm( 1248): 0x42855a2a (0056): str r2, [r5, #60] D/dalvikvm( 1248): 0x42855a2c (0058): vldr d1, [r5, #48] D/dalvikvm( 1248): 0x42855a30 (005c): vldr d2, [r5, #56] D/dalvikvm( 1248): 0x42855a34 (0060): vadd d0, d1, d2 D/dalvikvm( 1248): -------- dalvik offset: 0x0030 @ const/4 D/dalvikvm( 1248): -------- s27(v14_2) <- D/dalvikvm( 1248): 0x42855a38 (0064): movs r2, #1 D/dalvikvm( 1248): -------- dalvik offset: 0x0031 @ sub-int D/dalvikvm( 1248): -------- s28(v14_3) <- s20(v11_1) s27(v14_2) D/dalvikvm( 1248): 0x42855a3a (0066): ldr r3, [r5, #44] D/dalvikvm( 1248): 0x42855a3c (0068): subs r0, r3, r2 D/dalvikvm( 1248): -------- dalvik offset: 0x0033 @ aget-wide D/dalvikvm( 1248): -------- s29(v14_4) s30(v15_2) <- s8(v8_0) s28(v14_3) D/dalvikvm( 1248): 0x42855a3e (006a): ldr r3, [r5, #32] D/dalvikvm( 1248): 0x42855a40 (006c): adds r3, r3, #16 D/dalvikvm( 1248): 0x42855a42 (006e): str r0, [r5, #56] D/dalvikvm( 1248): 0x42855a44 (0070): lsls r0, r0, #3 D/dalvikvm( 1248): 0x42855a46 (0072): vstr d0, [r5, #48] D/dalvikvm( 1248): 0x42855a4a (0076): ldr r1, [r3, r0] D/dalvikvm( 1248): 0x42855a4c (0078): adds r3, r3, #4 D/dalvikvm( 1248): 0x42855a4e (007a): ldr r2, [r3, r0] D/dalvikvm( 1248): -------- dalvik offset: 0x0035 @ add-double/2addr D/dalvikvm( 1248): -------- s31(v12_3) s32(v13_3) <- s25(v12_2) s26(v13_2) s29(v14_4) s30(v15_2) D/dalvikvm( 1248): 0x42855a50 (007c): str r1, [r5, #56] D/dalvikvm( 1248): 0x42855a52 (007e): str r2, [r5, #60] D/dalvikvm( 1248): 0x42855a54 (0080): vldr d1, [r5, #48] D/dalvikvm( 1248): 0x42855a58 (0084): vldr d2, [r5, #56] D/dalvikvm( 1248): 0x42855a5c (0088): vadd d0, d1, d2 D/dalvikvm( 1248): -------- dalvik offset: 0x0036 @ add-int/lit8 D/dalvikvm( 1248): -------- s33(v14_5) <- s20(v11_1) D/dalvikvm( 1248): 0x42855a60 (008c): ldr r2, [r5, #44] D/dalvikvm( 1248): 0x42855a62 (008e): adds r2, r2, #1 D/dalvikvm( 1248): -------- dalvik offset: 0x0038 @ aget-wide D/dalvikvm( 1248): -------- s34(v14_6) s35(v15_3) <- s8(v8_0) s33(v14_5) D/dalvikvm( 1248): 0x42855a64 (0090): ldr r1, [r5, #32] D/dalvikvm( 1248): 0x42855a66 (0092): adds r1, r1, #16 D/dalvikvm( 1248): 0x42855a68 (0094): str r2, [r5, #56] D/dalvikvm( 1248): 0x42855a6a (0096): lsls r2, r2, #3 D/dalvikvm( 1248): 0x42855a6c (0098): vstr d0, [r5, #48] D/dalvikvm( 1248): 0x42855a70 (009c): ldr r3, [r1, r2] D/dalvikvm( 1248): 0x42855a72 (009e): adds r1, r1, #4 D/dalvikvm( 1248): 0x42855a74 (00a0): ldr r0, [r1, r2] D/dalvikvm( 1248): -------- dalvik offset: 0x003a @ add-double/2addr D/dalvikvm( 1248): -------- s36(v12_4) s37(v13_4) <- s31(v12_3) s32(v13_3) s34(v14_6) s35(v15_3) D/dalvikvm( 1248): 0x42855a76 (00a2): str r3, [r5, #56] D/dalvikvm( 1248): 0x42855a78 (00a4): str r0, [r5, #60] D/dalvikvm( 1248): 0x42855a7a (00a6): vldr d1, [r5, #48] D/dalvikvm( 1248): 0x42855a7e (00aa): vldr d2, [r5, #56] D/dalvikvm( 1248): 0x42855a82 (00ae): vadd d0, d1, d2 D/dalvikvm( 1248): 0x42855a86 (00b2): vstr d0, [r5, #48] D/dalvikvm( 1248): -------- dalvik offset: 0x003b @ mul-double/2addr D/dalvikvm( 1248): -------- s38(v12_5) s39(v13_5) <- s36(v12_4) s37(v13_4) s4(v4_0) s5(v5_0) D/dalvikvm( 1248): 0x42855a8a (00b6): vmov.f64 s2, s0 D/dalvikvm( 1248): 0x42855a8e (00ba): vldr d2, [r5, #16] D/dalvikvm( 1248): 0x42855a92 (00be): vmuld d0, d1, d2 D/dalvikvm( 1248): -------- dalvik offset: 0x003c @ aget-wide D/dalvikvm( 1248): -------- s40(v14_7) s41(v15_4) <- s8(v8_0) s20(v11_1) D/dalvikvm( 1248): 0x42855a96 (00c2): ldr r2, [r5, #32] D/dalvikvm( 1248): 0x42855a98 (00c4): ldr r3, [r5, #44] D/dalvikvm( 1248): 0x42855a9a (00c6): adds r2, r2, #16 D/dalvikvm( 1248): 0x42855a9c (00c8): lsls r3, r3, #3 D/dalvikvm( 1248): 0x42855a9e (00ca): vstr d0, [r5, #48] D/dalvikvm( 1248): 0x42855aa2 (00ce): ldr r0, [r2, r3] D/dalvikvm( 1248): 0x42855aa4 (00d0): adds r2, r2, #4 D/dalvikvm( 1248): 0x42855aa6 (00d2): ldr r1, [r2, r3] D/dalvikvm( 1248): 0x42855aa8 (00d4): str r0, [r5, #56] D/dalvikvm( 1248): 0x42855aaa (00d6): str r1, [r5, #60] D/dalvikvm( 1248): -------- dalvik offset: 0x003e @ mul-double D/dalvikvm( 1248): -------- s42(v14_8) s43(v15_5) <- s40(v14_7) s41(v15_4) s16(v16_0) s17(v17_0) D/dalvikvm( 1248): 0x42855aac (00d8): vldr d1, [r5, #56] D/dalvikvm( 1248): 0x42855ab0 (00dc): vldr d2, [r5, #64] D/dalvikvm( 1248): 0x42855ab4 (00e0): vmuld d0, d1, d2 D/dalvikvm( 1248): 0x42855ab8 (00e4): vstr d0, [r5, #56] D/dalvikvm( 1248): -------- dalvik offset: 0x0040 @ add-double/2addr D/dalvikvm( 1248): -------- s44(v12_6) s45(v13_6) <- s38(v12_5) s39(v13_5) s42(v14_8) s43(v15_5) D/dalvikvm( 1248): 0x42855abc (00e8): vldr d1, [r5, #48] D/dalvikvm( 1248): 0x42855ac0 (00ec): vldr d2, [r5, #56] D/dalvikvm( 1248): 0x42855ac4 (00f0): vadd d0, d1, d2 D/dalvikvm( 1248): 0x42855ac8 (00f4): vstr d0, [r5, #48] D/dalvikvm( 1248): -------- dalvik offset: 0x0041 @ aput-wide D/dalvikvm( 1248): -------- s44(v12_6) s45(v13_6) s8(v8_0) s20(v11_1) D/dalvikvm( 1248): 0x42855acc (00f8): ldr r3, [r5, #32] D/dalvikvm( 1248): 0x42855ace (00fa): ldr r0, [r5, #44] D/dalvikvm( 1248): 0x42855ad0 (00fc): adds r3, r3, #16 D/dalvikvm( 1248): 0x42855ad2 (00fe): ldr r1, [r5, #48] D/dalvikvm( 1248): 0x42855ad4 (0100): ldr r2, [r5, #52] D/dalvikvm( 1248): 0x42855ad6 (0102): lsls r0, r0, #3 D/dalvikvm( 1248): 0x42855ad8 (0104): str r1, [r3, r0] D/dalvikvm( 1248): 0x42855ada (0106): adds r3, r3, #4 D/dalvikvm( 1248): 0x42855adc (0108): str r2, [r3, r0] D/dalvikvm( 1248): -------- dalvik offset: 0x0043 @ add-int/lit8 D/dalvikvm( 1248): -------- s46(v11_2) <- s20(v11_1) D/dalvikvm( 1248): 0x42855ade (010a): ldr r2, [r5, #44] D/dalvikvm( 1248): 0x42855ae0 (010c): adds r2, r2, #1 D/dalvikvm( 1248): 0x42855ae2 (010e): str r2, [r5, #44] D/dalvikvm( 1248): -------- dalvik offset: 0x0045 @ goto D/dalvikvm( 1248): -------- D/dalvikvm( 1248): L0x0029: D/dalvikvm( 1248): -------- dalvik offset: 0x0029 @ if-ge D/dalvikvm( 1248): -------- s46(v11_2) s3(v3_0) D/dalvikvm( 1248): 0x42855ae4 (0110): ldr r0, [r5, #44] D/dalvikvm( 1248): 0x42855ae6 (0112): ldr r1, [r5, #12] D/dalvikvm( 1248): 0x42855ae8 (0114): cmp r0, r1 D/dalvikvm( 1248): 0x42855aea (0116): bge 0x42855aee D/dalvikvm( 1248): 0x42855aec (0118): b 0x42855a08 D/dalvikvm( 1248): -------- exit offset: 0x0046 D/dalvikvm( 1248): 0x42855aee (011a): b 0x42855af8 D/dalvikvm( 1248): -------- reconstruct dalvik PC : 0x42a644d6 @ +0x002b D/dalvikvm( 1248): 0x42855af0 (011c): ldr r0, [pc, #32] D/dalvikvm( 1248): Exception_Handling: D/dalvikvm( 1248): 0x42855af2 (011e): ldr r1, [r6, #84] D/dalvikvm( 1248): 0x42855af4 (0120): blx r1 D/dalvikvm( 1248): 0x42855af6 (0122): .align4 D/dalvikvm( 1248): -------- chaining cell (normal): 0x0046 D/dalvikvm( 1248): 0x42855af8 (0124): ldr r0, [r6, #76] D/dalvikvm( 1248): 0x42855afa (0126): blx r0 D/dalvikvm( 1248): 0x42855afc (0128): data 0x450c(17676) D/dalvikvm( 1248): 0x42855afe (012a): data 0x42a6(17062) D/dalvikvm( 1248): 0x42855b14 (0140): .word (0x42a644d6) D/dalvikvm( 1248): End Ljnt/scimark2/SOR;execute, 18 Dalvik instructions
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93194e943d11e30ec459c514c824e0db7b20a438 |
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25-Aug-2009 |
Dan Bornstein <danfuzz@android.com> |
More work on getting Dalvik to build on the host (particularly OSX). The dalvikvm executable still doesn't quite build (fails in linker), which is probably due to the core library native code not getting compiled and linked. Unfortunately, it looks like that will be pretty hairy to untangle. Change-Id: Ib5de623e43a40116c4b7459a45a246d76886edf3
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d5ab726b65d7271be261864c7e224fb90bfe06e0 |
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25-Aug-2009 |
Andy McFadden <fadden@android.com> |
Another round of scary indirect ref changes. This change adds a not-really-working implementation to Jni.c, with various changes #ifdefed throughout the code. The ifdef is currently disabled, so the old behavior should continue. Eventually the old version will be stripped out and the ifdefs removed. This renames the stack's "localRefTop" field, which nudged a bunch of code. The name wasn't really right before (it's the *bottom* of the local references), and it's even less right now. This and one other mterp-visible constant were changed, which caused some ripples through mterp and the JIT, but the ifdeffing was limited to one in asm-constants.h (and the constant is the same both ways, so toggling the ifdef won't require rebuilding asm sources). Some comments and arg names in ReferenceTable were updated for the correct orientation of bottom vs. top. Some adjustments were made to the JNI code, e.g. dvmCallMethod now needs to understand if it needs to convert reference arguments from local/global refs to pointers (it's called from various places throughout the VM).
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97319a8a234e9fe1cf90ca39aa6eca37d729afd5 |
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13-Aug-2009 |
Jeff Hao <jeffhao@google.com> |
New changes to enable self verification mode.
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a66a01ad2a9e5c6aefc93d12a5c18d6bba570a3e |
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19-Aug-2009 |
Andy McFadden <fadden@android.com> |
Turn down RegisterMap paranoia. This disables verification of RegisterMap contents and compressed output, as well as a GC-time check that double-checked the validity of a register known to hold a reference. For internal bug 1896437.
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3f02aa4d3b68b28bbdb6fd1320b613a68dc91fb9 |
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14-Aug-2009 |
Ben Cheng <bccheng@google.com> |
Enable VM assert properly for JIT and fix new compilation/assertion failures.
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4212241f98a49adcb955aee67a302cea57f3d984 |
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22-Jul-2009 |
Dan Bornstein <danfuzz@android.com> |
First parts of enabling a host Dalvik build. Most of this is just factoring out common make defs to include both on the host and device side, though there is a little bit of code change to be slightly POSIX friendlier and to avoid unnecessary sanity checks when compiling without an asm version of the interpreter. This patch should cause no difference in build results, except if you turn on the newly-defined WITH_HOST_DALVIK build flag. If you do turn it on, at this point you should probably expect the build to fail due to insufficient dependencies, which I of course expect to address in upcoming patches.
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