Lines Matching defs:base
19 #include "base/casts.h"
489 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base,
493 Lb(reg, base, offset);
496 Lbu(reg, base, offset);
499 Lh(reg, base, offset);
502 Lhu(reg, base, offset);
505 Lw(reg, base, offset);
515 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) {
516 Lwc1(reg, base, offset);
519 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) {
520 Ldc1(reg, base, offset);
523 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base,
527 Sb(reg, base, offset);
530 Sh(reg, base, offset);
533 Sw(reg, base, offset);
543 void MipsAssembler::StoreFToOffset(FRegister reg, Register base, int32_t offset) {
544 Swc1(reg, base, offset);
547 void MipsAssembler::StoreDToOffset(DRegister reg, Register base, int32_t offset) {
548 Sdc1(reg, base, offset);
693 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base,
698 base.AsMips().AsCoreRegister(), offs.Int32Value());
701 void MipsAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base,
706 base.AsMips().AsCoreRegister(), offs.Int32Value());
913 MipsManagedRegister base = mbase.AsMips();
915 CHECK(base.IsCoreRegister()) << base;
918 base.AsCoreRegister(), offset.Int32Value());
923 void MipsAssembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) {
926 // Call *(*(SP + base) + offset)
928 SP, base.Int32Value());