Cross Reference: /art/compiler/utils/mips/assembler

Lines Matching defs:dest
608 void MipsAssembler::Store(FrameOffset dest, ManagedRegister msrc, size_t size) {
614     StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
617     StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value());
619                   SP, dest.Int32Value() + 4);
621     StoreFToOffset(src.AsFRegister(), SP, dest.Int32Value());
624     StoreDToOffset(src.AsDRegister(), SP, dest.Int32Value());
628 void MipsAssembler::StoreRef(FrameOffset dest, ManagedRegister msrc) {
631   StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
634 void MipsAssembler::StoreRawPtr(FrameOffset dest, ManagedRegister msrc) {
637   StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
640 void MipsAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm,
645   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
648 void MipsAssembler::StoreImmediateToThread(ThreadOffset dest, uint32_t imm,
653   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), S1, dest.Int32Value());
670 void MipsAssembler::StoreSpanning(FrameOffset dest, ManagedRegister msrc,
674   StoreToOffset(kStoreWord, src.AsCoreRegister(), SP, dest.Int32Value());
676   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4);
688   MipsManagedRegister dest = mdest.AsMips();
689   CHECK(dest.IsCoreRegister());
690   LoadFromOffset(kLoadWord, dest.AsCoreRegister(), SP, src.Int32Value());
695   MipsManagedRegister dest = mdest.AsMips();
696   CHECK(dest.IsCoreRegister() && dest.IsCoreRegister());
697   LoadFromOffset(kLoadWord, dest.AsCoreRegister(),
703   MipsManagedRegister dest = mdest.AsMips();
704   CHECK(dest.IsCoreRegister() && dest.IsCoreRegister()) << dest;
705   LoadFromOffset(kLoadWord, dest.AsCoreRegister(),
711   MipsManagedRegister dest = mdest.AsMips();
712   CHECK(dest.IsCoreRegister());
713   LoadFromOffset(kLoadWord, dest.AsCoreRegister(), S1, offs.Int32Value());
725   MipsManagedRegister dest = mdest.AsMips();
727   if (!dest.Equals(src)) {
728     if (dest.IsCoreRegister()) {
730       Move(dest.AsCoreRegister(), src.AsCoreRegister());
731     } else if (dest.IsFRegister()) {
733       MovS(dest.AsFRegister(), src.AsFRegister());
734     } else if (dest.IsDRegister()) {
736       MovD(dest.AsDRegister(), src.AsDRegister());
738       CHECK(dest.IsRegisterPair()) << dest;
741       if (src.AsRegisterPairHigh() != dest.AsRegisterPairLow()) {
742         Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow());
743         Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh());
745         Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh());
746         Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow());
752 void MipsAssembler::CopyRef(FrameOffset dest, FrameOffset src,
757   StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
782 void MipsAssembler::Copy(FrameOffset dest, FrameOffset src,
789     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
792     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value());
794     StoreToOffset(kStoreWord, scratch.AsCoreRegister(), SP, dest.Int32Value() + 4);
798 void MipsAssembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset src_offset,
803   StoreToOffset(kStoreWord, scratch, SP, dest.Int32Value());
814 void MipsAssembler::Copy(FrameOffset /*dest*/, FrameOffset /*src_base*/, Offset /*src_offset*/,
819 void MipsAssembler::Copy(ManagedRegister dest, Offset dest_offset,
825   StoreToOffset(kStoreWord, scratch, dest.AsMips().AsCoreRegister(), dest_offset.Int32Value());
828 void MipsAssembler::Copy(FrameOffset /*dest*/, Offset /*dest_offset*/, FrameOffset /*src*/, Offset /*src_offset*/,