Cross Reference: /dalvik/vm/compiler/codegen/arm/CodegenDriver.cpp

Lines Matching refs:tReg
732             int tReg = dvmCompilerAllocTemp(cUnit);
735             loadConstantNoClobber(cUnit, tReg, 0);
737                         tReg, rlSrc2.lowReg);
738             opRegReg(cUnit, kOpSbc, tReg, rlSrc2.highReg);
739             genRegCopy(cUnit, rlResult.highReg, tReg);
756             int tReg = r12; // Using fixed registers during call sequence
757             opRegRegReg(cUnit, kOpOr, tReg, r2, r3);
758             genRegImmCheck(cUnit, kArmCondEq, tReg, 0, mir->offset, NULL);
864                 int tReg = dvmCompilerAllocTemp(cUnit);
865                 opRegRegImm(cUnit, kOpAnd, tReg, rlSrc2.lowReg, 31);
868                             rlSrc1.lowReg, tReg);
869                 dvmCompilerFreeTemp(cUnit, tReg);
1632             int tReg = dvmCompilerAllocTemp(cUnit);
1664             loadConstant(cUnit, tReg,  (int) fieldPtr + valOffset);
1670             loadWordDisp(cUnit, tReg, 0, rlResult.lowReg);
1689             int tReg = dvmCompilerAllocTemp(cUnit);
1692             loadConstant(cUnit, tReg,  (int) fieldPtr + valOffset);
1695             loadPair(cUnit, tReg, rlResult.lowReg, rlResult.highReg);
1710             int tReg = dvmCompilerAllocTemp(cUnit);
1739             loadConstant(cUnit, tReg,  (int) fieldPtr);
1742                 loadWordDisp(cUnit, tReg, OFFSETOF_MEMBER(Field, clazz), objHead);
1748             storeWordDisp(cUnit, tReg, valOffset ,rlSrc.lowReg);
1749             dvmCompilerFreeTemp(cUnit, tReg);
1763             int tReg = dvmCompilerAllocTemp(cUnit);
1778             loadConstant(cUnit, tReg,  (int) fieldPtr + valOffset);
1781             storePair(cUnit, tReg, rlSrc.lowReg, rlSrc.highReg);
2190         int tReg = dvmCompilerAllocTemp(cUnit);
2193             opRegRegImm(cUnit, kOpLsr, tReg, rlSrc.lowReg, 32 - k);
2194             opRegRegReg(cUnit, kOpAdd, tReg, tReg, rlSrc.lowReg);
2195             opRegRegImm(cUnit, kOpAsr, rlResult.lowReg, tReg, k);
2197             opRegRegImm(cUnit, kOpAsr, tReg, rlSrc.lowReg, 31);
2198             opRegRegImm(cUnit, kOpLsr, tReg, tReg, 32 - k);
2199             opRegRegReg(cUnit, kOpAdd, tReg, tReg, rlSrc.lowReg);
2200             opRegRegImm(cUnit, kOpAsr, rlResult.lowReg, tReg, k);
2280             int tReg;
2283             tReg = dvmCompilerAllocTemp(cUnit);
2284             loadConstant(cUnit, tReg, lit);
2287                         tReg, rlSrc.lowReg);
3486         int tReg = dvmCompilerAllocTemp(cUnit);
3487         opRegReg(cUnit, kOpNeg, tReg, rlResult.lowReg);
3488         opRegRegReg(cUnit, kOpAdc, rlResult.lowReg, rlResult.lowReg, tReg);
3905         int tReg = dvmCompilerAllocTemp(cUnit);
3906         opRegRegImm(cUnit, kOpAdd, tReg, rlIdxEnd.lowReg, delta);
3907         rlIdxEnd.lowReg = tReg;
3908         dvmCompilerFreeTemp(cUnit, tReg);
3942         int tReg = dvmCompilerAllocTemp(cUnit);
3943         opRegRegImm(cUnit, kOpAdd, tReg, rlIdxInit.lowReg, maxC);
3944         rlIdxInit.lowReg = tReg;
3945         dvmCompilerFreeTemp(cUnit, tReg);