Searched defs:base (Results 1 - 23 of 23) sorted by relevance

/art/test/072-precise-gc/src/
H A DMain.java61 static String generateString(String base, int num) { argument
62 return base + num;
/art/compiler/dex/
H A Dlocal_value_numbering.cc437 uint16_t base = GetOperandValue(mir->ssa_rep->uses[0]); local
438 if (null_checked_.find(base) != null_checked_.end()) {
444 null_checked_.insert(base);
448 uint16_t memory_version = GetMemoryVersion(base, field_ref);
450 uint16_t res = LookupValue(Instruction::IGET_WIDE, base, field_ref, memory_version);
453 uint16_t res = LookupValue(Instruction::IGET, base, field_ref, memory_version);
467 uint16_t base = GetOperandValue(mir->ssa_rep->uses[base_reg]); local
468 if (null_checked_.find(base) != null_checked_.end()) {
474 null_checked_.insert(base);
478 AdvanceMemoryVersion(base, field_re
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H A Dlocal_value_numbering.h62 uint16_t GetMemoryVersion(uint16_t base, uint16_t field) { argument
63 uint32_t key = (base << 16) | field;
75 void AdvanceMemoryVersion(uint16_t base, uint16_t field) { argument
76 uint32_t key = (base << 16) | field;
/art/runtime/base/
H A Dtiming_logger.h20 #include "base/histogram.h"
21 #include "base/macros.h"
22 #include "base/mutex.h"
30 namespace base { namespace in namespace:art
32 } // namespace base
47 void AddLogger(const base::TimingLogger& logger) LOCKS_EXCLUDED(lock_);
67 namespace base { namespace in namespace:art
164 } // namespace base
H A Dtiming_logger.cc24 #include "base/logging.h"
26 #include "base/stl_util.h"
27 #include "base/histogram-inl.h"
77 void CumulativeLogger::AddLogger(const base::TimingLogger &logger) {
79 const base::TimingLogger::SplitTimings& splits = logger.GetSplits();
80 for (base::TimingLogger::SplitTimingsIterator it = splits.begin(), end = splits.end();
82 base::TimingLogger::SplitTiming split = *it;
122 namespace base { namespace in namespace:art
158 for (base::TimingLogger::SplitTimingsIterator it = splits_.begin(), end = splits_.end();
160 base
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/art/runtime/arch/x86/
H A Dthread_x86.cc23 #include "base/macros.h"
47 const uintptr_t base = reinterpret_cast<uintptr_t>(this); local
64 entry.base0 = (base & 0x0000ffff);
65 entry.base1 = (base & 0x00ff0000) >> 16;
66 entry.base2 = (base & 0xff000000) >> 24;
100 ldt_entry.base_addr = base;
/art/runtime/
H A Dmem_map.cc21 #include "base/stringprintf.h"
50 uint32_t base = reinterpret_cast<size_t>(addr); local
51 uint32_t limit = base + byte_count;
55 CHECK(!(base >= m->start && base < m->end) // start of new within old
57 && !(base <= m->start && limit > m->end)) // start/end of new includes all of old
59 base, limit,
H A Ddisassembler_x86.cc21 #include "base/logging.h"
22 #include "base/stringprintf.h"
632 uint8_t base = sib & 7; local
634 if (base != 5 || mod != 0) {
635 DumpBaseReg(address, rex, base);
H A Doat_file.cc21 #include "base/stl_util.h"
22 #include "base/unix_file/fd_file.h"
420 OatFile::OatMethod::OatMethod(const byte* base, argument
428 : begin_(base),
H A Dcommon_test.h27 #include "base/macros.h"
28 #include "base/stl_util.h"
29 #include "base/stringprintf.h"
30 #include "base/unix_file/fd_file.h"
233 uintptr_t base = RoundDown(data, kPageSize); local
235 uintptr_t len = limit - base;
236 int result = mprotect(reinterpret_cast<void*>(base), len, PROT_READ | PROT_WRITE | PROT_EXEC);
242 __builtin___clear_cache(reinterpret_cast<void*>(base), reinterpret_cast<void*>(base + len));
473 base
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H A Ddex_file.cc27 #include "base/logging.h"
28 #include "base/stringprintf.h"
258 const DexFile* DexFile::OpenMemory(const byte* base, argument
263 CHECK_ALIGNED(base, 4); // various dex file structures must be word aligned
264 UniquePtr<DexFile> dex_file(new DexFile(base, size, location, location_checksum, mem_map));
H A Ddex_file.h23 #include "base/logging.h"
24 #include "base/mutex.h"
25 #include "base/stringpiece.h"
134 uint32_t string_data_off_; // offset in bytes from the base address
357 static const DexFile* Open(const uint8_t* base, size_t size, argument
360 return OpenMemory(base, size, location, location_checksum, NULL);
691 // Get the base of the encoded data for the given DexCode.
837 DexFile(const byte* base, size_t size, argument
841 : begin_(base),
871 // The base addres
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/art/compiler/utils/x86/
H A Dassembler_x86.h21 #include "base/macros.h"
67 Register base() const { function in class:art::x86::Operand
98 void SetSIB(ScaleFactor scale, Register index, Register base) { argument
101 encoding_[1] = (scale << 6) | (index << 3) | base;
139 Address(Register base, int32_t disp) { argument
140 Init(base, disp);
143 Address(Register base, Offset disp) { argument
144 Init(base, disp.Int32Value());
147 Address(Register base, FrameOffset disp) { argument
148 CHECK_EQ(base, ES
152 Address(Register base, MemberOffset disp) argument
156 Init(Register base, int32_t disp) argument
179 Address(Register base, Register index, ScaleFactor scale, int32_t disp) argument
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H A Dassembler_x86.cc19 #include "base/casts.h"
1571 void X86Assembler::LoadRef(ManagedRegister mdest, ManagedRegister base, argument
1575 movl(dest.AsCpuRegister(), Address(base.AsX86().AsCpuRegister(), offs));
1578 void X86Assembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, argument
1582 movl(dest.AsCpuRegister(), Address(base.AsX86().AsCpuRegister(), offs));
1795 X86ManagedRegister base = mbase.AsX86(); local
1796 CHECK(base.IsCpuRegister());
1797 call(Address(base.AsCpuRegister(), offset.Int32Value()));
1801 void X86Assembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) { argument
1803 movl(scratch, Address(ESP, base));
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/art/compiler/dex/quick/x86/
H A Dassemble_x86.cc333 static size_t ComputeSize(const X86EncodingMap* entry, int base, int displacement, bool has_sib) { argument
349 if (has_sib || base == rX86_SP) {
353 if (displacement != 0 || base == rBP) {
375 case kMem: // lir operands - 0: base, 1: disp
377 case kArray: // lir operands - 0: base, 1: index, 2: scale, 3: disp
379 case kMemReg: // lir operands - 0: base, 1: disp, 2: reg
381 case kArrayReg: // lir operands - 0: base, 1: index, 2: scale, 3: disp, 4: reg
389 case kRegMem: // lir operands - 0: reg, 1: base, 2: disp
391 case kRegArray: // lir operands - 0: reg, 1: base, 2: index, 3: scale, 4: disp
405 case kMemImm: // lir operands - 0: base,
491 ModrmForDisp(int base, int disp) argument
502 EmitDisp(int base, int disp) argument
551 EmitOpMem(const X86EncodingMap* entry, uint8_t base, int disp) argument
572 EmitMemReg(const X86EncodingMap* entry, uint8_t base, int disp, uint8_t reg) argument
615 EmitRegMem(const X86EncodingMap* entry, uint8_t reg, uint8_t base, int disp) argument
621 EmitRegArray(const X86EncodingMap* entry, uint8_t reg, uint8_t base, uint8_t index, int scale, int disp) argument
660 EmitArrayReg(const X86EncodingMap* entry, uint8_t base, uint8_t index, int scale, int disp, uint8_t reg) argument
1028 EmitCallMem(const X86EncodingMap* entry, uint8_t base, int disp) argument
1120 uint8_t base = static_cast<uint8_t>(base_or_table); local
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H A Dint_x86.cc30 int reg1, int base, int offset, ThrowKind kind) {
32 current_dalvik_offset_, reg1, base, offset);
33 OpRegMem(kOpCmp, reg1, base, offset);
29 GenRegMemCheck(ConditionCode c_code, int reg1, int base, int offset, ThrowKind kind) argument
/art/compiler/dex/quick/arm/
H A Dtarget_arm.cc272 static char* DecodeFPCSRegList(int count, int base, char* buf) { argument
273 sprintf(buf, "s%d", base);
275 sprintf(buf + strlen(buf), ", s%d", base + i);
H A Dint_arm.cc463 int reg1, int base, int offset, ThrowKind kind) {
825 // Offset base, then use indexed load
462 GenRegMemCheck(ConditionCode c_code, int reg1, int base, int offset, ThrowKind kind) argument
/art/compiler/dex/quick/mips/
H A Dint_mips.cc221 int reg1, int base, int offset, ThrowKind kind) {
220 GenRegMemCheck(ConditionCode c_code, int reg1, int base, int offset, ThrowKind kind) argument
/art/compiler/
H A Dimage_writer.cc23 #include "base/logging.h"
24 #include "base/unix_file/fd_file.h"
706 uint8_t* base = reinterpret_cast<uint8_t*>(reinterpret_cast<uint32_t>(oat_code) & ~0x1); local
707 uint32_t* patch_location = reinterpret_cast<uint32_t*>(base + patch->GetLiteralOffset());
/art/compiler/llvm/
H A Dir_builder.h219 ::llvm::Value* CreatePtrDisp(::llvm::Value* base, argument
222 ::llvm::Value* base_int = CreatePtrToInt(base, getPtrEquivIntTy());
229 ::llvm::Value* CreatePtrDisp(::llvm::Value* base, argument
237 return CreatePtrDisp(base, total_offset, ret_ty);
/art/compiler/utils/mips/
H A Dassembler_mips.cc19 #include "base/casts.h"
489 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, argument
493 Lb(reg, base, offset);
496 Lbu(reg, base, offset);
499 Lh(reg, base, offset);
502 Lhu(reg, base, offset);
505 Lw(reg, base, offset);
515 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { argument
516 Lwc1(reg, base, offset);
519 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_ argument
523 StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset) argument
543 StoreFToOffset(FRegister reg, Register base, int32_t offset) argument
547 StoreDToOffset(DRegister reg, Register base, int32_t offset) argument
693 LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs) argument
701 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
913 MipsManagedRegister base = mbase.AsMips(); local
923 Call(FrameOffset base, Offset offset, ManagedRegister mscratch) argument
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/art/compiler/utils/arm/
H A Dassembler_arm.cc19 #include "base/logging.h"
33 W = 1 << 21, // writeback base register (or leave unchanged)
201 Register base,
203 CHECK_NE(base, kNoRegister);
209 (static_cast<int32_t>(base) << kRnShift) |
516 Register base,
519 EmitMultiMemOp(cond, am, true, base, regs);
524 Register base,
527 EmitMultiMemOp(cond, am, false, base, regs);
1250 Register base,
198 EmitMultiMemOp(Condition cond, BlockAddressMode am, bool load, Register base, RegList regs) argument
515 ldm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
523 stm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
1248 LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset, Condition cond) argument
1287 LoadSFromOffset(SRegister reg, Register base, int32_t offset, Condition cond) argument
1304 LoadDFromOffset(DRegister reg, Register base, int32_t offset, Condition cond) argument
1321 StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset, Condition cond) argument
1355 StoreSToOffset(SRegister reg, Register base, int32_t offset, Condition cond) argument
1372 StoreDToOffset(DRegister reg, Register base, int32_t offset, Condition cond) argument
1547 LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs) argument
1561 LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) argument
1830 ArmManagedRegister base = mbase.AsArm(); local
1840 Call(FrameOffset base, Offset offset, ManagedRegister mscratch) argument
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