/external/valgrind/main/VEX/priv/ |
H A D | guest_generic_x87.c | 775 imm8 is the original immediate from the instruction. isSTRM 779 If the given imm8 case can be handled, the return value is True. 788 UInt imm8, Bool isxSTRM ) 790 vassert(imm8 < 0x80); 794 /* Explicitly reject any imm8 values that haven't been validated, 797 switch (imm8) { 807 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 808 UInt agg = (imm8 >> 2) & 3; // imm8[ 784 compute_PCMPxSTRx( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument 1035 compute_PCMPxSTRx_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | host_mips_defs.h | 250 MIPSri84_I84 = 5, /* imm8 `ror` (2 * imm4) */ 258 UShort imm8; member in struct:__anon26720::__anon26721::__anon26722 267 extern MIPSRI84 *MIPSRI84_I84(UShort imm8, UShort imm4);
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H A D | guest_amd64_helpers.c | 3108 UInt imm8 = imm_and_return_control_bit & 7; local 3110 UInt srcOffsL = imm8 & 3; /* src offs in 32-bit (L) chunks */ 3111 UInt dstOffsL = (imm8 >> 2) & 1; /* dst offs in ditto chunks */ 3175 opc_and_imm contains (4th byte of opcode << 8) | the-imm8-byte so 3213 HWord imm8 = opc4_and_imm & 0xFF; local 3217 HWord wide = (imm8 & 1); 3258 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3282 zmaskL, zmaskR, imm8, (Bool)isxSTRM 3286 // front end shouldn't pass us any imm8 variants we can't 3612 HWord imm8, 3610 amd64g_dirtyhelper_AESKEYGENASSIST( VexGuestAMD64State* gst, HWord imm8, HWord gstOffL, HWord gstOffR ) argument [all...] |
H A D | host_amd64_isel.c | 1794 /* Add64( Add64(expr1, Shl64(expr2, imm8)), simm32 ) */ 1808 IRExpr* imm8 = mi.bindee[2]; local 1810 if (imm8->tag == Iex_Const 1811 && imm8->Iex.Const.con->tag == Ico_U8 1812 && imm8->Iex.Const.con->Ico.U8 < 4 1813 /* imm8 is OK, now check simm32 */ 1817 UInt shift = imm8->Iex.Const.con->Ico.U8;
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H A D | host_arm_defs.c | 437 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) { argument 440 ri84->ARMri84.I84.imm8 = imm8; 442 vassert(imm8 >= 0 && imm8 <= 255); 456 vex_printf("0x%x", ROR32(ri84->ARMri84.I84.imm8, 547 ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 ) { 550 i->imm8 = imm8; 556 ULong y, x = imm->imm8; [all...] |
H A D | host_arm_defs.h | 153 ARMam2_RI=3, /* reg +/- imm8 */ 229 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */ 239 UShort imm8; member in struct:__anon26623::__anon26624::__anon26625 249 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ); 284 /* imm8 = abcdefgh, B = NOT(b); 309 UInt imm8; member in struct:__anon26632 313 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
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H A D | guest_arm_toIR.c | 2465 IRExpr* mk_EA_reg_plusminus_imm8 ( UInt rN, UInt bU, UInt imm8, argument 2470 vassert(imm8 < 0x100); 2472 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm8); 2476 mkU32(imm8) ); 2576 UInt imm1, UInt imm3, UInt imm8 ) 2580 vassert(imm8 < (1<<8)); 2581 UInt i_imm3_a = (imm1 << 4) | (imm3 << 1) | ((imm8 >> 7) & 1); 2582 UInt abcdefgh = imm8; 2583 UInt lbcdefgh = imm8 | 0x80; 2615 UInt imm8 local 11449 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local 11465 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local 13295 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local 14369 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local 15661 UInt imm8 = INSN0(7,0); local 16171 UInt imm8 = INSN0(7,0); local 16183 UInt imm8 = INSN0(7,0); local 16225 UInt imm8 = INSN0(7,0); local 16333 UInt imm8 = INSN0(7,0); local 17450 UInt imm8 = INSN1(7,0); local 17880 UInt imm8 = INSN1(7,0); local 18551 UInt imm8 = INSN1(7,0); local 18616 UInt imm8 = INSN1(7,0); local 18753 UInt imm8 = INSN1(7,0); local [all...] |
H A D | guest_x86_toIR.c | 5985 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */ 7143 Int imm8, Bool all_lanes, Int sz ) 7145 imm8 &= 7; 7148 if (imm8 >= 4) { 7150 imm8 -= 4; 7154 switch (imm8) { 7163 switch (imm8) { 7172 switch (imm8) { 7181 switch (imm8) { 7198 Int alen, imm8; local 7142 findSSECmpOp( Bool* needNot, IROp* op, Int imm8, Bool all_lanes, Int sz ) argument [all...] |
H A D | guest_amd64_toIR.c | 7282 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */ 8588 UInt imm8, Bool all_lanes, Int sz ) 8590 if (imm8 >= 32) return False; 8593 the supplied imm8. */ 8601 switch (imm8) { 8645 /* Don't forget to add test cases to VCMPSS_128_<imm8> in 8710 UInt imm8; local 8720 imm8 = getUChar(delta+1); 8721 if (imm8 >= 8) return delta0; /* FAIL */ 8722 Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lane 8585 findSSECmpOp( Bool* preSwapP, IROp* opP, Bool* postNotP, UInt imm8, Bool all_lanes, Int sz ) argument 10681 UInt imm8; local 10735 UInt imm8; local 13279 Int imm8 = 0; local 17126 Int imm8; local 17560 Int imm8; local 17597 Int imm8; local 17633 Int imm8; local 17722 Int imm8; local 17753 UInt imm8; local 17858 Int imm8; local 17891 Int imm8; local 17923 Int imm8; local 17961 Int imm8; local 21004 UInt imm8; local 21114 UInt imm8; local 23725 Int imm8; local 23769 Int imm8 = 0; local 23799 Int imm8 = 0; local 23829 Int imm8 = 0; local 23859 Int imm8 = 0; local 25291 UInt imm8 = 0; local 25321 UInt imm8 = 0; local 25349 UInt imm8 = 0; local 25382 UInt imm8 = 0; local 25420 UInt imm8 = 0; local 25722 UInt imm8; local 25753 UInt imm8; local 25787 UInt imm8; local 25818 UInt imm8; local 25852 UInt imm8; local 25890 UInt imm8; local 26035 Int imm8; local 26070 UInt imm8; local 26177 Int imm8; local 26207 Int imm8; local 26245 Int imm8; local 26276 Int imm8; local 26318 Int imm8; local [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 1449 uint8_t imm8; local 1469 if (consumeByte(insn, &imm8)) 1471 insn->immediates[insn->numImmediatesConsumed] = imm8;
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/external/valgrind/main/none/tests/amd64/ |
H A D | pcmpstr64.c | 182 imm8 is the original immediate from the instruction. isSTRM 186 If the given imm8 case can be handled, the return value is True. 195 UInt imm8, Bool isSTRM ) 197 assert(imm8 < 0x80); 201 /* Explicitly reject any imm8 values that haven't been validated, 204 switch (imm8) { 213 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 214 UInt agg = (imm8 >> 2) & 3; // imm8[ 191 pcmpXstrX_WRK( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isSTRM ) argument [all...] |
H A D | pcmpstr64w.c | 188 imm8 is the original immediate from the instruction. isSTRM 192 If the given imm8 case can be handled, the return value is True. 201 UInt imm8, Bool isxSTRM ) 203 assert(imm8 < 0x80); 207 /* Explicitly reject any imm8 values that haven't been validated, 210 switch (imm8) { 219 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 220 UInt agg = (imm8 >> 2) & 3; // imm8[ 197 pcmpXstrX_WRK_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
/external/chromium_org/v8/src/ia32/ |
H A D | disasm-ia32.cc | 585 int imm8 = -1; local 600 imm8 = 1; 602 imm8 = *(data+2); 609 if (imm8 > 0) { 610 AppendToBuffer("%d", imm8); 1112 case 0xC6: // imm8 1211 int8_t imm8 = static_cast<int8_t>(data[1]); local 1215 static_cast<int>(imm8)); 1221 int8_t imm8 = static_cast<int8_t>(data[1]); local 1225 static_cast<int>(imm8)); 1231 int8_t imm8 = static_cast<int8_t>(data[1]); local 1241 int8_t imm8 = static_cast<int8_t>(data[1]); local 1312 int8_t imm8 = static_cast<int8_t>(data[1]); local 1341 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-ia32.cc | 576 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument 580 EMIT(imm8); 810 void Assembler::cmpb(const Operand& op, int8_t imm8) { argument 818 EMIT(imm8); 1031 void Assembler::rcl(Register dst, uint8_t imm8) { argument 1033 ASSERT(is_uint5(imm8)); // illegal shift count 1034 if (imm8 == 1) { 1040 EMIT(imm8); 1045 void Assembler::rcr(Register dst, uint8_t imm8) { argument 1047 ASSERT(is_uint5(imm8)); // illega 1059 ror(Register dst, uint8_t imm8) argument 1080 sar(Register dst, uint8_t imm8) argument 1116 shl(Register dst, uint8_t imm8) argument 1145 shr(Register dst, uint8_t imm8) argument 1193 uint8_t imm8 = imm.x_; local 1241 test_b(const Operand& op, uint8_t imm8) argument 2366 extractps(Register dst, XMMRegister src, byte imm8) argument 2604 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
/external/v8/src/ia32/ |
H A D | disasm-ia32.cc | 583 int imm8 = -1; local 598 imm8 = 1; 600 imm8 = *(data+2); 607 if (imm8 > 0) { 608 AppendToBuffer("%d", imm8); 1101 case 0xC6: // imm8 1200 int8_t imm8 = static_cast<int8_t>(data[1]); local 1204 static_cast<int>(imm8)); 1210 int8_t imm8 = static_cast<int8_t>(data[1]); local 1214 static_cast<int>(imm8)); 1220 int8_t imm8 = static_cast<int8_t>(data[1]); local 1230 int8_t imm8 = static_cast<int8_t>(data[1]); local 1293 int8_t imm8 = static_cast<int8_t>(data[1]); local 1314 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | assembler-ia32.cc | 585 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument 589 EMIT(imm8); 819 void Assembler::cmpb(const Operand& op, int8_t imm8) { argument 827 EMIT(imm8); 1040 void Assembler::rcl(Register dst, uint8_t imm8) { argument 1042 ASSERT(is_uint5(imm8)); // illegal shift count 1043 if (imm8 == 1) { 1049 EMIT(imm8); 1054 void Assembler::rcr(Register dst, uint8_t imm8) { argument 1056 ASSERT(is_uint5(imm8)); // illega 1068 sar(Register dst, uint8_t imm8) argument 1104 shl(Register dst, uint8_t imm8) argument 1133 shr(Register dst, uint8_t imm8) argument 1181 uint8_t imm8 = imm.x_; local 1225 test_b(const Operand& op, uint8_t imm8) argument 2272 extractps(Register dst, XMMRegister src, byte imm8) argument 2513 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
/external/chromium_org/v8/src/x64/ |
H A D | disasm-x64.cc | 746 int imm8 = -1; local 781 imm8 = 1; 783 imm8 = *(data + 2); 794 AppendToBuffer("%d", imm8); 1036 AppendToBuffer("extractps "); // reg/m32, xmm, imm8 1042 // roundsd xmm, xmm/m64, imm8 1521 case 0xC6: // imm8 1605 // mov reg8,imm8 or mov reg32,imm32
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H A D | assembler-x64.cc | 981 void Assembler::cmpb_al(Immediate imm8) { argument 982 ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_)); 985 emit(imm8.value_); 2626 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument 2628 ASSERT(is_uint8(imm8)); 2636 emit(imm8);
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/external/qemu/ |
H A D | arm-dis.c | 3369 unsigned int bits = 0, imm, imm8, mod; local 3373 imm8 = (bits & 0x0ff); 3377 case 0: imm = imm8; break; 3378 case 1: imm = ((imm8<<16) | imm8); break; 3379 case 2: imm = ((imm8<<24) | (imm8 << 8)); break; 3380 case 3: imm = ((imm8<<24) | (imm8 << 16) | (imm8 << [all...] |
/external/v8/src/x64/ |
H A D | disasm-x64.cc | 738 int imm8 = -1; local 773 imm8 = 1; 775 imm8 = *(data + 2); 786 AppendToBuffer("%d", imm8); 1028 AppendToBuffer("extractps "); // reg/m32, xmm, imm8 1034 // roundsd xmm, xmm/m64, imm8 1506 case 0xC6: // imm8 1590 // mov reg8,imm8 or mov reg32,imm32
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H A D | assembler-x64.cc | 1005 void Assembler::cmpb_al(Immediate imm8) { argument 1006 ASSERT(is_int8(imm8.value_) || is_uint8(imm8.value_)); 1009 emit(imm8.value_); 2591 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument 2593 ASSERT(is_uint8(imm8)); 2601 emit(imm8);
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/external/chromium_org/v8/src/arm/ |
H A D | assembler-arm.cc | 922 uint32_t imm8 = (imm32 << 2*rot) | (imm32 >> (32 - 2*rot)); local 923 if ((imm8 <= 0xff)) { 925 *immed_8 = imm8;
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