/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
H A D | r200_fragshader.c | 49 GLuint reg2 = 0; local 54 reg2 |= R200_TXC_REPL_RED << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 59 reg2 |= R200_TXC_REPL_GREEN << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 65 reg2 |= R200_TXC_REPL_BLUE << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 80 reg2 |= (index - GL_CON_0_ATI) << R200_TXC_TFACTOR_SEL_SHIFT; 85 reg2 |= (index - GL_CON_0_ATI) << R200_TXC_TFACTOR1_SEL_SHIFT; 109 SET_INST_2(opnum, optype) |= reg2;
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | r200_fragshader.c | 49 GLuint reg2 = 0; local 54 reg2 |= R200_TXC_REPL_RED << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 59 reg2 |= R200_TXC_REPL_GREEN << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 65 reg2 |= R200_TXC_REPL_BLUE << (R200_TXC_REPL_ARG_A_SHIFT + (2*argPos)); 80 reg2 |= (index - GL_CON_0_ATI) << R200_TXC_TFACTOR_SEL_SHIFT; 85 reg2 |= (index - GL_CON_0_ATI) << R200_TXC_TFACTOR1_SEL_SHIFT; 109 SET_INST_2(opnum, optype) |= reg2;
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/external/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 229 Register reg2, 233 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 234 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); 235 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 238 mov(reg1, reg2, LeaveCC, cond); 239 mov(reg2, scratch, LeaveCC, cond); 2949 Register reg2, 2953 tst(reg2, Operand(kSmiTagMask), eq); 2975 Register reg2, 228 Swap(Register reg1, Register reg2, Register scratch, Condition cond) argument [all...] |
H A D | regexp-macro-assembler-arm.cc | 436 int reg2, 439 __ ldr(r1, register_location(reg2)); 435 CheckNotRegistersEqual(int reg1, int reg2, Label* on_not_equal) argument
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/external/chromium_org/v8/src/arm/ |
H A D | macro-assembler-arm.cc | 209 Register reg2, 213 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 214 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); 215 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); 218 mov(reg1, reg2, LeaveCC, cond); 219 mov(reg2, scratch, LeaveCC, cond); 3008 Register reg2, 3012 tst(reg2, Operand(kSmiTagMask), eq); 3034 Register reg2, 208 Swap(Register reg1, Register reg2, Register scratch, Condition cond) argument [all...] |
/external/pixman/pixman/ |
H A D | pixman-arm-neon-asm.h | 84 .macro pixldst2 op, elem_size, reg1, reg2, mem_operand, abits variable 86 op&.&elem_size {d®1, d®2}, [&mem_operand&, :&abits&]! 88 op&.&elem_size {d®1, d®2}, [&mem_operand&]! 92 .macro pixldst4 op, elem_size, reg1, reg2, reg3, reg4, mem_operand, abits variable 94 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&, :&abits&]! variable 96 op&.&elem_size {d®1, d®2, d®3, d®4}, [&mem_operand&]! variable 104 .macro pixldst3 op, elem_size, reg1, reg2, reg3, mem_operand variable 105 op&.&elem_size {d®1, d®2, d®3}, [&mem_operand&]! variable 108 .macro pixldst30 op, elem_size, reg1, reg2, reg3, idx, mem_operand variable 109 op&.&elem_size {d®1[idx], d®2[id variable 256 .macro pixld2_s elem_size, reg1, reg2, mem_operand variable 276 pixld1_s elem_size, reg2, mem_operand variable [all...] |
H A D | pixman-arm-simd-asm.h | 99 .macro pixldst op, cond=al, numbytes, reg0, reg1, reg2, reg3, base, unaligned=0 variable 104 op&r&cond WK®2, [base], #4 variable 107 op&m&cond&ia base!, {WK®0,WK®1,WK®2,WK®3} variable 127 .macro pixst_baseupdated cond, numbytes, reg0, reg1, reg2, reg3, base variable 129 stm&cond&db base, {WK®0,WK®1,WK®2,WK®3} variable
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H A D | pixman-region.c | 295 PREFIX (_equal) (region_type_t *reg1, region_type_t *reg2) argument 301 if (reg1->extents.x1 != reg2->extents.x1) 304 if (reg1->extents.x2 != reg2->extents.x2) 307 if (reg1->extents.y1 != reg2->extents.y1) 310 if (reg1->extents.y2 != reg2->extents.y2) 313 if (PIXREGION_NUMRECTS (reg1) != PIXREGION_NUMRECTS (reg2)) 317 rects2 = PIXREGION_RECTS (reg2); 750 region_type_t * reg2, /* 2d region in operation */ 784 if (PIXREGION_NAR (reg1) || PIXREGION_NAR (reg2)) 799 numRects = PIXREGION_NUMRECTS (reg2); 748 pixman_op(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2, overlap_proc_ptr overlap_func, int append_non1, int append_non2 ) argument 1157 _intersect(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2) argument 1371 _union(region_type_t *new_reg, region_type_t *reg1, region_type_t *reg2) argument [all...] |
/external/v8/src/mips/ |
H A D | regexp-macro-assembler-mips.cc | 448 int reg2, 447 CheckNotRegistersEqual(int reg1, int reg2, Label* on_not_equal) argument
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H A D | macro-assembler-mips.cc | 464 Register reg2) { 485 // reg2 - Used for the index into the dictionary. 499 // Use reg2 for index calculations and keep the hash intact in reg0. 500 mov(reg2, reg0); 503 Addu(reg2, reg2, Operand(SeededNumberDictionary::GetProbeOffset(i))); 505 and_(reg2, reg2, reg1); 509 sll(at, reg2, 1); // 2x. 510 addu(reg2, reg 458 LoadFromNumberDictionary(Label* miss, Register elements, Register key, Register result, Register reg0, Register reg1, Register reg2) argument 4754 JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi) argument 4764 JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi) argument [all...] |
/external/v8/src/ |
H A D | regexp-macro-assembler-tracer.cc | 300 int reg2, 302 PrintF(" CheckNotRegistersEqual(reg1=%d, reg2=%d, label[%08x]);\n", 304 reg2, 306 assembler_->CheckNotRegistersEqual(reg1, reg2, on_not_equal); 299 CheckNotRegistersEqual(int reg1, int reg2, Label* on_not_equal) argument
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H A D | regexp-macro-assembler-irregexp.cc | 375 int reg2, 380 Emit32(reg2); 374 CheckNotRegistersEqual(int reg1, int reg2, Label* on_not_equal) argument
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/external/aac/libFDK/src/ |
H A D | fixpoint_math.cpp | 430 FIXP_DBL reg1, reg2, regtmp ; local 446 reg2 = FL2FXCONST_DBL(0.0625f); /* 0.5 >> 3 */ 449 regtmp= reg2 - fMultDiv2(regtmp, val); /* b = 0.5 - 2 * V * Q^2 */ 454 reg2 = FL2FXCONST_DBL(0.707106781186547524400844362104849f); /* 1/sqrt(2); */ 455 reg1 = fMultDiv2(reg1, reg2) << 2;
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/external/v8/src/ia32/ |
H A D | regexp-macro-assembler-ia32.cc | 486 int reg2, 489 __ cmp(eax, register_location(reg2)); 485 CheckNotRegistersEqual(int reg1, int reg2, Label* on_not_equal) argument
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/external/chromium_org/third_party/sqlite/src/src/ |
H A D | build.c | 868 int reg1, reg2, reg3; local 881 reg2 = pParse->regRoot = ++pParse->nMem; 905 sqlite3VdbeAddOp2(v, OP_Integer, 0, reg2); 909 sqlite3VdbeAddOp2(v, OP_CreateTable, iDb, reg2);
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/external/qemu/tcg/ |
H A D | tcg.c | 1483 /* Allocate a register belonging to reg1 & ~reg2 */ 1484 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) argument 1489 tcg_regset_andnot(reg_ct, reg1, reg2);
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/external/valgrind/main/VEX/priv/ |
H A D | host_s390_isel.c | 2089 HReg reg1, reg2; local 2129 reg2 = newVRegI(env); 2130 addInstr(env, s390_insn_unop(4, op, reg2, op2)); /* zero extend */ 2132 op2 = s390_opnd_reg(reg2);
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/external/chromium_org/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 464 Register reg2) { 485 // reg2 - Used for the index into the dictionary. 499 // Use reg2 for index calculations and keep the hash intact in reg0. 500 mov(reg2, reg0); 503 Addu(reg2, reg2, Operand(SeededNumberDictionary::GetProbeOffset(i))); 505 and_(reg2, reg2, reg1); 509 sll(at, reg2, 1); // 2x. 510 addu(reg2, reg 458 LoadFromNumberDictionary(Label* miss, Register elements, Register key, Register result, Register reg0, Register reg1, Register reg2) argument 4873 JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi) argument 4883 JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi) argument [all...] |
/external/chromium_org/v8/src/x64/ |
H A D | lithium-codegen-x64.cc | 1153 Register reg2 = ToRegister(instr->result()); local 1176 __ movq(reg2, multiplier, RelocInfo::NONE64); 1178 __ imul(reg2, reg1); 1180 __ addq(reg2, Immediate(1 << 30)); 1181 __ sar(reg2, Immediate(shift)); 4067 Register reg2 = ToRegister(instr->index()); local 4069 __ AssertZeroExtended(reg2); 4071 __ cmpq(reg, reg2);
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/external/v8/src/x64/ |
H A D | lithium-codegen-x64.cc | 3364 Register reg2 = ToRegister(instr->index()); local 3366 __ AbortIfNotZeroExtended(reg2); 3368 __ cmpq(reg, reg2);
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/external/valgrind/main/coregrind/m_debuginfo/ |
H A D | readdwarf.c | 2925 Int off, reg, reg2, nleb, len; local 3056 reg2 = read_leb128( &instr[i], &nleb, 0); 3060 if (reg2 < 0 || reg2 >= N_CFI_REGS) 3063 ctxs->reg[reg].arg = reg2; 3066 (Int)reg, (Int)reg2); 3358 Int off, coff, reg, reg2, nleb, len; local 3440 reg2 = read_leb128( &instr[i], &nleb, 0); 3442 VG_(printf)(" sci:DW_CFA_register(r%d, r%d)\n", reg, reg2);
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/external/valgrind/main/perf/ |
H A D | tinycc.c | 15103 int8_t reg2; /* second register, -1 if none */ 16186 /* address(reg,reg2,shift) with all variants */ 16189 op->reg2 = -1; 16207 op->reg2 = asm_parse_reg(); 16214 if (op->reg == -1 && op->reg2 == -1) 16262 int mod, reg1, reg2, sib_reg1; 16266 } else if (op->reg == -1 && op->reg2 == -1) { 16285 if (op->reg2 != -1) 16290 reg2 = op->reg2; 15101 int8_t reg2; /* second register, -1 if none */ member in struct:Operand 16260 int mod, reg1, reg2, sib_reg1; local [all...] |
/external/chromium_org/third_party/sqlite/amalgamation/ |
H A D | sqlite3.c | 77884 int reg1, reg2, reg3; local [all...] |
/external/sqlite/dist/orig/ |
H A D | sqlite3.c | 82059 int reg1, reg2, reg3; local [all...] |
/external/sqlite/dist/ |
H A D | sqlite3.c | 82095 int reg1, reg2, reg3; local [all...] |