Searched refs:DstReg (Results 151 - 164 of 164) sorted by relevance
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| /external/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1372 unsigned &SrcReg, unsigned &DstReg,
1393 DstReg = MI.getOperand(0).getReg();
2875 unsigned DstReg,
2881 MRI.getRegClass(DstReg)->getSize(),
2883 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(FalseReg).addReg(TrueReg);
3540 unsigned DstReg = Instr.getOperand(0).getReg(); local
3541 NewOpc = getCMovFromCond(NewCC, MRI->getRegClass(DstReg)->getSize(),
3892 unsigned DstReg = NewMI->getOperand(0).getReg(); local
3893 if (TargetRegisterInfo::isPhysicalRegister(DstReg))
3894 NewMI->getOperand(0).setReg(RI.getSubReg(DstReg,
1371 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument
2873 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DstReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument
[all...] |
| H A D | X86FastISel.cpp | 813 unsigned DstReg = VA.getLocReg(); local
816 if (!SrcRC->contains(DstReg))
819 DstReg).addReg(SrcReg);
1782 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC); local
1788 ResultReg).addReg(DstReg, getKillRegState(true));
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| H A D | X86FloatingPoint.cpp | 316 unsigned DstReg = MI->getOperand(0).getReg();
319 return X86::RFP80RegClass.contains(DstReg) ||
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| H A D | X86FrameLowering.cpp | 538 unsigned DstReg = MI.getOperand(0).getReg();
540 if (DstReg != FramePtr || SrcReg != StackPtr)
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| H A D | X86ISelLowering.cpp | 13682 unsigned DstReg, SrcReg; local
13687 DstReg = MI->getOperand(CurOp++).getReg();
13692 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
13895 TII->get(TargetOpcode::COPY), DstReg)
14981 unsigned DstReg; local
14986 DstReg = MI->getOperand(CurOp++).getReg();
14987 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
15089 TII->get(X86::PHI), DstReg)
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2159 unsigned DstReg = VA.getLocReg(); local
2162 if (!SrcRC->contains(DstReg))
2165 DstReg).addReg(SrcReg);
3057 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC); local
3063 ResultReg).addReg(DstReg, getKillRegState(true));
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1149 unsigned DstReg = MI->getOperand(0).getReg(); local
1181 BuildMI(*RemBB, RemBB->begin(), dl, TII.get(MSP430::PHI), DstReg)
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 87 unsigned &SrcReg, unsigned &DstReg,
94 DstReg = MI.getOperand(0).getReg();
86 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const argument
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| H A D | PPCISelLowering.cpp | 6055 unsigned DstReg = MI->getOperand(0).getReg(); local
6056 const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
6178 TII->get(PPC::PHI), DstReg)
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| /external/chromium_org/third_party/mesa/src/chromium_gensrc/mesa/program/ |
| H A D | program_parse.tab.c | 2500 (yyval.inst)->Base.DstReg.CondMask = (yyvsp[(2) - (2)].dst_reg).CondMask;
2501 (yyval.inst)->Base.DstReg.CondSwizzle = (yyvsp[(2) - (2)].dst_reg).CondSwizzle;
2502 (yyval.inst)->Base.DstReg.CondSrc = (yyvsp[(2) - (2)].dst_reg).CondSrc;
5390 init_dst_reg(& inst->Base.DstReg);
5392 inst->Base.DstReg = *dst;
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| H A D | r200_vertprog.c | 693 dst = vpi->DstReg;
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| H A D | r200_vertprog.c | 693 dst = vpi->DstReg;
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| /external/chromium_org/third_party/mesa/src/src/mesa/main/ |
| H A D | ffvertex_prog.c | 620 emit_dst( &inst->DstReg, dest, mask );
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| /external/mesa3d/src/mesa/main/ |
| H A D | ffvertex_prog.c | 620 emit_dst( &inst->DstReg, dest, mask );
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Completed in 947 milliseconds
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